sbi_timer.c 1.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768
  1. /*
  2. * SPDX-License-Identifier: BSD-2-Clause
  3. *
  4. * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  5. *
  6. * Authors:
  7. * Anup Patel <anup.patel@wdc.com>
  8. */
  9. #include <sbi/riscv_asm.h>
  10. #include <sbi/riscv_encoding.h>
  11. #include <sbi/sbi_platform.h>
  12. #include <sbi/sbi_timer.h>
  13. #if __riscv_xlen == 32
  14. u64 get_ticks(void)
  15. {
  16. u32 lo, hi, tmp;
  17. __asm__ __volatile__("1:\n"
  18. "rdtimeh %0\n"
  19. "rdtime %1\n"
  20. "rdtimeh %2\n"
  21. "bne %0, %2, 1b"
  22. : "=&r"(hi), "=&r"(lo), "=&r"(tmp));
  23. return ((u64)hi << 32) | lo;
  24. }
  25. #else
  26. u64 get_ticks(void)
  27. {
  28. unsigned long n;
  29. __asm__ __volatile__("rdtime %0" : "=r"(n));
  30. return n;
  31. }
  32. #endif
  33. u64 sbi_timer_value(struct sbi_scratch *scratch)
  34. {
  35. const struct sbi_platform *plat = sbi_platform_ptr(scratch);
  36. if (sbi_platform_has_timer_value(plat))
  37. return sbi_platform_timer_value(plat);
  38. else
  39. return get_ticks();
  40. }
  41. void sbi_timer_event_stop(struct sbi_scratch *scratch)
  42. {
  43. sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
  44. }
  45. void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
  46. {
  47. sbi_platform_timer_event_start(sbi_platform_ptr(scratch), next_event);
  48. csr_clear(CSR_MIP, MIP_STIP);
  49. csr_set(CSR_MIE, MIP_MTIP);
  50. }
  51. void sbi_timer_process(struct sbi_scratch *scratch)
  52. {
  53. csr_clear(CSR_MIE, MIP_MTIP);
  54. csr_set(CSR_MIP, MIP_STIP);
  55. }
  56. int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
  57. {
  58. return sbi_platform_timer_init(sbi_platform_ptr(scratch), cold_boot);
  59. }