platform.c 4.2 KB

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  1. /*
  2. * SPDX-License-Identifier: BSD-2-Clause
  3. *
  4. * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  5. *
  6. * Authors:
  7. * Damien Le Moal <damien.lemoal@wdc.com>
  8. */
  9. #include <sbi/riscv_asm.h>
  10. #include <sbi/riscv_encoding.h>
  11. #include <sbi/sbi_console.h>
  12. #include <sbi/sbi_const.h>
  13. #include <sbi/sbi_platform.h>
  14. #include <sbi/sbi_system.h>
  15. #include <sbi_utils/fdt/fdt_helper.h>
  16. #include <sbi_utils/fdt/fdt_fixup.h>
  17. #include <sbi_utils/ipi/aclint_mswi.h>
  18. #include <sbi_utils/irqchip/plic.h>
  19. #include <sbi_utils/serial/sifive-uart.h>
  20. #include <sbi_utils/timer/aclint_mtimer.h>
  21. #include "platform.h"
  22. extern const char dt_k210_start[];
  23. unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
  24. unsigned long arg2, unsigned long arg3,
  25. unsigned long arg4)
  26. {
  27. return (unsigned long)&dt_k210_start[0];
  28. }
  29. static struct plic_data plic = {
  30. .addr = K210_PLIC_BASE_ADDR,
  31. .num_src = K210_PLIC_NUM_SOURCES,
  32. };
  33. static struct aclint_mswi_data mswi = {
  34. .addr = K210_ACLINT_MSWI_ADDR,
  35. .size = ACLINT_MSWI_SIZE,
  36. .first_hartid = 0,
  37. .hart_count = K210_HART_COUNT,
  38. };
  39. static struct aclint_mtimer_data mtimer = {
  40. .mtime_freq = K210_ACLINT_MTIMER_FREQ,
  41. .mtime_addr = K210_ACLINT_MTIMER_ADDR +
  42. ACLINT_DEFAULT_MTIME_OFFSET,
  43. .mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
  44. .mtimecmp_addr = K210_ACLINT_MTIMER_ADDR +
  45. ACLINT_DEFAULT_MTIMECMP_OFFSET,
  46. .mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
  47. .first_hartid = 0,
  48. .hart_count = K210_HART_COUNT,
  49. .has_64bit_mmio = true,
  50. };
  51. static u32 k210_get_clk_freq(void)
  52. {
  53. u32 clksel0, pll0;
  54. u64 pll0_freq, clkr0, clkf0, clkod0, div;
  55. /*
  56. * If the clock selector is not set, use the base frequency.
  57. * Otherwise, use PLL0 frequency with a frequency divisor.
  58. */
  59. clksel0 = k210_read_sysreg(K210_CLKSEL0);
  60. if (!(clksel0 & 0x1))
  61. return K210_CLK0_FREQ;
  62. /*
  63. * Get PLL0 frequency:
  64. * freq = base frequency * clkf0 / (clkr0 * clkod0)
  65. */
  66. pll0 = k210_read_sysreg(K210_PLL0);
  67. clkr0 = 1 + (pll0 & 0x0000000f);
  68. clkf0 = 1 + ((pll0 & 0x000003f0) >> 4);
  69. clkod0 = 1 + ((pll0 & 0x00003c00) >> 10);
  70. pll0_freq = clkf0 * K210_CLK0_FREQ / (clkr0 * clkod0);
  71. /* Get the frequency divisor from the clock selector */
  72. div = 2ULL << ((clksel0 & 0x00000006) >> 1);
  73. return pll0_freq / div;
  74. }
  75. static int k210_system_reset_check(u32 type, u32 reason)
  76. {
  77. return 1;
  78. }
  79. static void k210_system_reset(u32 type, u32 reason)
  80. {
  81. u32 val;
  82. val = k210_read_sysreg(K210_RESET);
  83. val |= K210_RESET_MASK;
  84. k210_write_sysreg(val, K210_RESET);
  85. while (1);
  86. }
  87. static struct sbi_system_reset_device k210_reset = {
  88. .name = "kendryte_k210_reset",
  89. .system_reset_check = k210_system_reset_check,
  90. .system_reset = k210_system_reset
  91. };
  92. static int k210_early_init(bool cold_boot)
  93. {
  94. if (cold_boot)
  95. sbi_system_reset_add_device(&k210_reset);
  96. return 0;
  97. }
  98. static int k210_final_init(bool cold_boot)
  99. {
  100. void *fdt;
  101. if (!cold_boot)
  102. return 0;
  103. fdt = fdt_get_address();
  104. fdt_cpu_fixup(fdt);
  105. fdt_fixups(fdt);
  106. return 0;
  107. }
  108. static int k210_console_init(void)
  109. {
  110. return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
  111. K210_UART_BAUDRATE);
  112. }
  113. static int k210_irqchip_init(bool cold_boot)
  114. {
  115. int rc;
  116. u32 hartid = current_hartid();
  117. if (cold_boot) {
  118. rc = plic_cold_irqchip_init(&plic);
  119. if (rc)
  120. return rc;
  121. }
  122. return plic_warm_irqchip_init(&plic, hartid * 2, hartid * 2 + 1);
  123. }
  124. static int k210_ipi_init(bool cold_boot)
  125. {
  126. int rc;
  127. if (cold_boot) {
  128. rc = aclint_mswi_cold_init(&mswi);
  129. if (rc)
  130. return rc;
  131. }
  132. return aclint_mswi_warm_init();
  133. }
  134. static int k210_timer_init(bool cold_boot)
  135. {
  136. int rc;
  137. if (cold_boot) {
  138. rc = aclint_mtimer_cold_init(&mtimer, NULL);
  139. if (rc)
  140. return rc;
  141. }
  142. return aclint_mtimer_warm_init();
  143. }
  144. const struct sbi_platform_operations platform_ops = {
  145. .early_init = k210_early_init,
  146. .final_init = k210_final_init,
  147. .console_init = k210_console_init,
  148. .irqchip_init = k210_irqchip_init,
  149. .ipi_init = k210_ipi_init,
  150. .timer_init = k210_timer_init,
  151. };
  152. const struct sbi_platform platform = {
  153. .opensbi_version = OPENSBI_VERSION,
  154. .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
  155. .name = "Kendryte K210",
  156. .features = 0,
  157. .hart_count = K210_HART_COUNT,
  158. .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
  159. .platform_ops_addr = (unsigned long)&platform_ops
  160. };