plic.c 3.9 KB

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  1. /*
  2. * SPDX-License-Identifier: BSD-2-Clause
  3. *
  4. * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  5. *
  6. * Authors:
  7. * Anup Patel <anup.patel@wdc.com>
  8. * Samuel Holland <samuel@sholland.org>
  9. */
  10. #include <sbi/riscv_io.h>
  11. #include <sbi/riscv_encoding.h>
  12. #include <sbi/sbi_console.h>
  13. #include <sbi/sbi_error.h>
  14. #include <sbi/sbi_string.h>
  15. #include <sbi_utils/irqchip/plic.h>
  16. #define PLIC_PRIORITY_BASE 0x0
  17. #define PLIC_PENDING_BASE 0x1000
  18. #define PLIC_ENABLE_BASE 0x2000
  19. #define PLIC_ENABLE_STRIDE 0x80
  20. #define PLIC_CONTEXT_BASE 0x200000
  21. #define PLIC_CONTEXT_STRIDE 0x1000
  22. static u32 plic_get_priority(const struct plic_data *plic, u32 source)
  23. {
  24. volatile void *plic_priority = (char *)plic->addr +
  25. PLIC_PRIORITY_BASE + 4 * source;
  26. return readl(plic_priority);
  27. }
  28. static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
  29. {
  30. volatile void *plic_priority = (char *)plic->addr +
  31. PLIC_PRIORITY_BASE + 4 * source;
  32. writel(val, plic_priority);
  33. }
  34. void plic_priority_save(const struct plic_data *plic, u8 *priority)
  35. {
  36. for (u32 i = 1; i <= plic->num_src; i++)
  37. priority[i] = plic_get_priority(plic, i);
  38. }
  39. void plic_priority_restore(const struct plic_data *plic, const u8 *priority)
  40. {
  41. for (u32 i = 1; i <= plic->num_src; i++)
  42. plic_set_priority(plic, i, priority[i]);
  43. }
  44. static u32 plic_get_thresh(const struct plic_data *plic, u32 cntxid)
  45. {
  46. volatile void *plic_thresh;
  47. plic_thresh = (char *)plic->addr +
  48. PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
  49. return readl(plic_thresh);
  50. }
  51. static void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val)
  52. {
  53. volatile void *plic_thresh;
  54. plic_thresh = (char *)plic->addr +
  55. PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
  56. writel(val, plic_thresh);
  57. }
  58. static u32 plic_get_ie(const struct plic_data *plic, u32 cntxid,
  59. u32 word_index)
  60. {
  61. volatile void *plic_ie;
  62. plic_ie = (char *)plic->addr +
  63. PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid +
  64. 4 * word_index;
  65. return readl(plic_ie);
  66. }
  67. static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
  68. u32 word_index, u32 val)
  69. {
  70. volatile void *plic_ie;
  71. plic_ie = (char *)plic->addr +
  72. PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid +
  73. 4 * word_index;
  74. writel(val, plic_ie);
  75. }
  76. void plic_context_save(const struct plic_data *plic, int context_id,
  77. u32 *enable, u32 *threshold)
  78. {
  79. u32 ie_words = (plic->num_src + 31) / 32;
  80. for (u32 i = 0; i < ie_words; i++)
  81. enable[i] = plic_get_ie(plic, context_id, i);
  82. *threshold = plic_get_thresh(plic, context_id);
  83. }
  84. void plic_context_restore(const struct plic_data *plic, int context_id,
  85. const u32 *enable, u32 threshold)
  86. {
  87. u32 ie_words = (plic->num_src + 31) / 32;
  88. for (u32 i = 0; i < ie_words; i++)
  89. plic_set_ie(plic, context_id, i, enable[i]);
  90. plic_set_thresh(plic, context_id, threshold);
  91. }
  92. int plic_context_init(const struct plic_data *plic, int context_id,
  93. bool enable, u32 threshold)
  94. {
  95. u32 ie_words, ie_value;
  96. if (!plic || context_id < 0)
  97. return SBI_EINVAL;
  98. ie_words = (plic->num_src + 31) / 32;
  99. ie_value = enable ? 0xffffffffU : 0U;
  100. for (u32 i = 0; i < ie_words; i++)
  101. plic_set_ie(plic, context_id, i, ie_value);
  102. plic_set_thresh(plic, context_id, threshold);
  103. return 0;
  104. }
  105. int plic_warm_irqchip_init(const struct plic_data *plic,
  106. int m_cntx_id, int s_cntx_id)
  107. {
  108. int ret;
  109. /* By default, disable all IRQs for M-mode of target HART */
  110. if (m_cntx_id > -1) {
  111. ret = plic_context_init(plic, m_cntx_id, false, 0x7);
  112. if (ret)
  113. return ret;
  114. }
  115. /* By default, disable all IRQs for S-mode of target HART */
  116. if (s_cntx_id > -1) {
  117. ret = plic_context_init(plic, s_cntx_id, false, 0x7);
  118. if (ret)
  119. return ret;
  120. }
  121. return 0;
  122. }
  123. int plic_cold_irqchip_init(const struct plic_data *plic)
  124. {
  125. int i;
  126. if (!plic)
  127. return SBI_EINVAL;
  128. /* Configure default priorities of all IRQs */
  129. for (i = 1; i <= plic->num_src; i++)
  130. plic_set_priority(plic, i, 0);
  131. return 0;
  132. }