fdt_pmu.c 3.3 KB

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  1. // SPDX-License-Identifier: BSD-2-Clause
  2. /*
  3. * fdt_pmu.c - Flat Device Tree PMU helper routines
  4. *
  5. * Copyright (c) 2021 Western Digital Corporation or its affiliates.
  6. *
  7. * Authors:
  8. * Atish Patra <atish.patra@wdc.com>
  9. */
  10. #include <libfdt.h>
  11. #include <sbi/sbi_hart.h>
  12. #include <sbi/sbi_error.h>
  13. #include <sbi/sbi_pmu.h>
  14. #include <sbi/sbi_scratch.h>
  15. #include <sbi_utils/fdt/fdt_helper.h>
  16. #define FDT_PMU_HW_EVENT_MAX (SBI_PMU_HW_EVENT_MAX * 2)
  17. struct fdt_pmu_hw_event_select {
  18. uint32_t eidx;
  19. uint64_t select;
  20. };
  21. static struct fdt_pmu_hw_event_select fdt_pmu_evt_select[FDT_PMU_HW_EVENT_MAX] = {0};
  22. static uint32_t hw_event_count;
  23. uint64_t fdt_pmu_get_select_value(uint32_t event_idx)
  24. {
  25. int i;
  26. struct fdt_pmu_hw_event_select *event;
  27. for (i = 0; i < SBI_PMU_HW_EVENT_MAX; i++) {
  28. event = &fdt_pmu_evt_select[i];
  29. if (event->eidx == event_idx)
  30. return event->select;
  31. }
  32. return 0;
  33. }
  34. int fdt_pmu_fixup(void *fdt)
  35. {
  36. int pmu_offset;
  37. struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
  38. if (!fdt)
  39. return SBI_EINVAL;
  40. pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
  41. if (pmu_offset < 0)
  42. return SBI_EFAIL;
  43. fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters");
  44. fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmevent");
  45. fdt_delprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters");
  46. if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
  47. fdt_delprop(fdt, pmu_offset, "interrupts-extended");
  48. return 0;
  49. }
  50. int fdt_pmu_setup(void *fdt)
  51. {
  52. int i, pmu_offset, len, result;
  53. const u32 *event_val;
  54. const u32 *event_ctr_map;
  55. struct fdt_pmu_hw_event_select *event;
  56. uint64_t raw_selector, select_mask;
  57. u32 event_idx_start, event_idx_end, ctr_map;
  58. if (!fdt)
  59. return SBI_EINVAL;
  60. pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
  61. if (pmu_offset < 0)
  62. return SBI_EFAIL;
  63. event_ctr_map = fdt_getprop(fdt, pmu_offset,
  64. "riscv,event-to-mhpmcounters", &len);
  65. if (event_ctr_map && len >= 8) {
  66. len = len / (sizeof(u32) * 3);
  67. for (i = 0; i < len; i++) {
  68. event_idx_start = fdt32_to_cpu(event_ctr_map[3 * i]);
  69. event_idx_end = fdt32_to_cpu(event_ctr_map[3 * i + 1]);
  70. ctr_map = fdt32_to_cpu(event_ctr_map[3 * i + 2]);
  71. result = sbi_pmu_add_hw_event_counter_map(
  72. event_idx_start, event_idx_end, ctr_map);
  73. if (result)
  74. return result;
  75. }
  76. }
  77. event_val = fdt_getprop(fdt, pmu_offset,
  78. "riscv,event-to-mhpmevent", &len);
  79. if (event_val && len >= 8) {
  80. len = len / (sizeof(u32) * 3);
  81. for (i = 0; i < len; i++) {
  82. event = &fdt_pmu_evt_select[hw_event_count];
  83. event->eidx = fdt32_to_cpu(event_val[3 * i]);
  84. event->select = fdt32_to_cpu(event_val[3 * i + 1]);
  85. event->select = (event->select << 32) |
  86. fdt32_to_cpu(event_val[3 * i + 2]);
  87. hw_event_count++;
  88. }
  89. }
  90. event_val = fdt_getprop(fdt, pmu_offset,
  91. "riscv,raw-event-to-mhpmcounters", &len);
  92. if (event_val && len >= 20) {
  93. len = len / (sizeof(u32) * 5);
  94. for (i = 0; i < len; i++) {
  95. raw_selector = fdt32_to_cpu(event_val[5 * i]);
  96. raw_selector = (raw_selector << 32) |
  97. fdt32_to_cpu(event_val[5 * i + 1]);
  98. select_mask = fdt32_to_cpu(event_val[5 * i + 2]);
  99. select_mask = (select_mask << 32) |
  100. fdt32_to_cpu(event_val[5 * i + 3]);
  101. ctr_map = fdt32_to_cpu(event_val[5 * i + 4]);
  102. result = sbi_pmu_add_raw_event_counter_map(
  103. raw_selector, select_mask, ctr_map);
  104. if (result)
  105. return result;
  106. }
  107. }
  108. return 0;
  109. }