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@@ -12,20 +12,20 @@
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#include <sbi/riscv_barrier.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_unpriv.h>
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+#include <sbi/sbi_fifo.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_bitops.h>
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-#include <sbi/sbi_console.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_timer.h>
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+#include <plat/string.h>
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static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
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u32 event, void *data)
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{
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struct sbi_scratch *remote_scratch = NULL;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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- struct sbi_tlb_info *tlb_info = data;
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- struct sbi_tlb_info *ipi_tlb_data;
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+ struct sbi_fifo *ipi_tlb_fifo;
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if (sbi_platform_hart_disabled(plat, hartid))
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return -1;
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@@ -36,10 +36,19 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
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remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
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if (event == SBI_IPI_EVENT_SFENCE_VMA ||
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event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
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- ipi_tlb_data = sbi_tlb_info_ptr(remote_scratch);
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- ipi_tlb_data->start = tlb_info->start;
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- ipi_tlb_data->size = tlb_info->size;
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- ipi_tlb_data->asid = tlb_info->asid;
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+ ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(remote_scratch);
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+ while(sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
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+ /**
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+ * For now, Busy loop until there is space in the fifo.
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+ * There may be case where target hart is also
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+ * enqueue in source hart's fifo. Both hart may busy
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+ * loop leading to a deadlock.
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+ * TODO: Introduce a wait/wakeup event mechansim to handle
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+ * this properly.
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+ */
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+ __asm__ __volatile("nop");
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+ __asm__ __volatile("nop");
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+ }
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}
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atomic_raw_set_bit(event, &sbi_ipi_data_ptr(remote_scratch)->ipi_type);
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mb();
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@@ -132,11 +141,13 @@ static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
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void sbi_ipi_process(struct sbi_scratch *scratch)
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{
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- const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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volatile unsigned long ipi_type;
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+ struct sbi_tlb_info tinfo;
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unsigned int ipi_event;
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- u32 hartid = sbi_current_hartid();
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+ const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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+ struct sbi_fifo *ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(scratch);
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+ u32 hartid = sbi_current_hartid();
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sbi_platform_ipi_clear(plat, hartid);
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do {
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@@ -151,10 +162,14 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
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__asm__ __volatile("fence.i");
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break;
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case SBI_IPI_EVENT_SFENCE_VMA:
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- sbi_ipi_sfence_vma(sbi_tlb_info_ptr(scratch));
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- break;
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case SBI_IPI_EVENT_SFENCE_VMA_ASID:
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- sbi_ipi_sfence_vma_asid(sbi_tlb_info_ptr(scratch));
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+ while(!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
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+ if (tinfo.type == SBI_TLB_FLUSH_VMA)
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+ sbi_ipi_sfence_vma(&tinfo);
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+ else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
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+ sbi_ipi_sfence_vma_asid(&tinfo);
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+ memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
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+ }
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break;
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case SBI_IPI_EVENT_HALT:
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sbi_hart_hang();
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@@ -166,10 +181,11 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
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int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
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{
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+ struct sbi_fifo *tlb_info_q = sbi_tlb_fifo_head_ptr(scratch);
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+
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sbi_ipi_data_ptr(scratch)->ipi_type = 0x00;
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- sbi_tlb_info_ptr(scratch)->start = 0x00;
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- sbi_tlb_info_ptr(scratch)->size = 0x00;
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- sbi_tlb_info_ptr(scratch)->asid = 0x00;
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+ tlb_info_q->queue = sbi_tlb_fifo_mem_ptr(scratch);
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+ sbi_fifo_init(tlb_info_q, SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
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/* Enable software interrupts */
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csr_set(CSR_MIE, MIP_MSIP);
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