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+OpenSBI Platform Requirements
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+=============================
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+
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+The RISC-V platform requirements for OpenSBI can change over time
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+with advances in RISC-V specifications and ecosystem.
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+
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+To handle this, we have two types of RISC-V platform requirements:
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+
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+1. **Base platform requirements** which apply to all OpenSBI releases
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+2. **Release specific platform requirements** which apply to a OpenSBI
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+ release and later releases
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+
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+Currently, we don't have any **Release specific platform requirements**
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+but such platform requirements will be added in future.
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+
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+Base Platform Requirements
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+--------------------------
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+
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+The base RISC-V platform requirements for OpenSBI are as follows:
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+
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+1. At least rv32ima or rv64ima required on all HARTs
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+2. At least one HART should have S-mode support because:
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+
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+ * SBI calls are meant for RISC-V S-mode (Supervisor mode)
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+ * OpenSBI implements SBI calls for S-mode software
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+
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+3. The MTVEC CSR on all HARTs must support direct mode
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+4. The PMP CSRs are optional. If PMP CSRs are not implemented then
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+ OpenSBI cannot protect M-mode firmware and secured memory regions
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+5. The TIME CSR is optional. If TIME CSR is not implemented in
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+ hardware then a 64-bit MMIO counter is required to track time
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+ and emulate TIME CSR
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+6. Hardware support for injecting M-mode software interrupts on
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+ a multi-HART platform
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+
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+The RISC-V extensions not covered by rv32ima or rv64ima are optional
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+for OpenSBI. Although, OpenSBI will detect and handle some of these
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+optional RISC-V extensions at runtime.
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+
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+The optional RISC-V extensions handled by OpenSBI at runtime are:
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+
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+* D-extension: Double precision floating point
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+* F-extension: Single precision floating point
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+* H-extension: Hypervisor
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