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+/*
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+ * SPDX-License-Identifier: BSD-2-Clause
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+ *
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+# Copyright (c) 2020 Shanghai StarFive Technology Co., Ltd.
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+#
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+# Authors:
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+# StarFive <support@starfivetech.com>
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+ */
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+
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+#include <libfdt.h>
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+#include <sbi/riscv_asm.h>
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+#include <sbi/riscv_io.h>
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+#include <sbi/riscv_encoding.h>
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+#include <sbi/sbi_console.h>
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+#include <sbi/sbi_const.h>
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+#include <sbi/sbi_domain.h>
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+#include <sbi/sbi_math.h>
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+#include <sbi/sbi_platform.h>
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+#include <sbi_utils/fdt/fdt_fixup.h>
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+#include <sbi_utils/irqchip/plic.h>
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+#include <sbi_utils/serial/uart8250.h>
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+#include <sbi_utils/sys/clint.h>
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+
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+/* clang-format off */
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+
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+#define VIC7100_HART_COUNT 2
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+
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+#define VIC7100_SYS_CLK 1000000000
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+
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+#define VIC7100_CLINT_ADDR 0x2000000
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+
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+#define VIC7100_PLIC_ADDR 0xc000000
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+#define VIC7100_PLIC_NUM_SOURCES 0x83
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+#define VIC7100_PLIC_NUM_PRIORITIES 7
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+
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+#define VIC7100_UART0_ADDR 0x12440000
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+#define VIC7100_UART_BAUDRATE 115200
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+#define VIC7100_UART_REG_SHIFT 2
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+#define VIC7100_UART_REG_WIDTH 4
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+
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+#define VIC7100_FULLMUX_BASE_ADDR 0x11910000UL
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+/* GPIO 63 for reset on BeagleV */
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+#define VIC7100_RESET_DOUT_ADDR (VIC7100_FULLMUX_BASE_ADDR + 0x248)
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+#define VIC7100_RESET_DOEN_ADDR (VIC7100_FULLMUX_BASE_ADDR + 0x24C)
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+
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+/* Full tlb flush always */
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+#define VIC7100_TLB_RANGE_FLUSH_LIMIT 0
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+
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+/* Example for future use */
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+enum sbi_ext_starfive_fid {
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+ SBI_EXT_STARFIVE_RDTIME = 0,
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+ SBI_EXT_STARFIVE_GET_MTIME,
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+};
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+
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+/* clang-format on */
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+
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+#define ROOT_FW_REGION 0
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+#define ROOT_ALL_REGION 1
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+#define ROOT_END_REGION 2
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+static struct sbi_domain_memregion vic7100_root_memregs[ROOT_END_REGION + 1] = { 0 };
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+
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+static struct plic_data plic = {
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+ .addr = VIC7100_PLIC_ADDR,
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+ .num_src = VIC7100_PLIC_NUM_SOURCES,
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+};
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+
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+static struct clint_data clint = {
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+ .addr = VIC7100_CLINT_ADDR,
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+ .first_hartid = 0,
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+ .hart_count = VIC7100_HART_COUNT,
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+ .has_64bit_mmio = TRUE,
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+};
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+
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+static uintptr_t mcall_print_mtime(unsigned long addr)
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+{
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+ u64 time = readq_relaxed((volatile u64 *)addr);
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+
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+ sbi_printf("read clint mtime from sbi: 0x%lx\n", time);
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+ return 0;
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+}
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+
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+static void vic7100_modify_dt(void *fdt)
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+{
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+ fdt_cpu_fixup(fdt);
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+
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+ fdt_fixups(fdt);
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+
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+ /*
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+ * SiFive Freedom U540 has an erratum that prevents S-mode software
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+ * to access a PMP protected region using 1GB page table mapping, so
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+ * always add the no-map attribute on this platform.
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+ */
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+ fdt_reserved_memory_nomap_fixup(fdt);
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+}
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+
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+static int vic7100_final_init(bool cold_boot)
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+{
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+ void *fdt;
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+
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+ if (!cold_boot)
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+ return 0;
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+
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+ fdt = sbi_scratch_thishart_arg1_ptr();
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+ vic7100_modify_dt(fdt);
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+
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+ return 0;
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+}
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+
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+static int vic7100_console_init(void)
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+{
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+ return uart8250_init(VIC7100_UART0_ADDR, VIC7100_SYS_CLK / 10,
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+ VIC7100_UART_BAUDRATE,
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+ VIC7100_UART_REG_SHIFT, VIC7100_UART_REG_WIDTH);
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+}
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+
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+static int vic7100_irqchip_init(bool cold_boot)
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+{
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+ int rc;
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+ u32 hartid = current_hartid();
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+
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+ if (cold_boot) {
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+ rc = plic_cold_irqchip_init(&plic);
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+ if (rc)
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+ return rc;
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+ }
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+
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+ return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
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+ (hartid) ? (2 * hartid) : -1);
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+}
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+
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+static int vic7100_ipi_init(bool cold_boot)
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+{
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+ int rc;
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+
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+ if (cold_boot) {
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+ rc = clint_cold_ipi_init(&clint);
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+ if (rc)
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+ return rc;
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+ }
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+
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+ return clint_warm_ipi_init();
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+}
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+
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+static u64 vic7100_get_tlbr_flush_limit(void)
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+{
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+ return VIC7100_TLB_RANGE_FLUSH_LIMIT;
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+}
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+
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+static int vic7100_timer_init(bool cold_boot)
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+{
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+ int rc;
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+
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+ if (cold_boot) {
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+ rc = clint_cold_timer_init(&clint, NULL);
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+ if (rc)
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+ return rc;
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+ }
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+
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+ return clint_warm_timer_init();
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+}
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+
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+static struct sbi_domain_memregion *vic7100_domains_init(void)
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+{
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+ struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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+ /* Root domain firmware memory region */
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+ vic7100_root_memregs[ROOT_FW_REGION].order = log2roundup(scratch->fw_size);
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+ vic7100_root_memregs[ROOT_FW_REGION].base = scratch->fw_start &
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+ ~((1UL << vic7100_root_memregs[0].order) - 1UL);
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+ vic7100_root_memregs[ROOT_FW_REGION].flags = 0;
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+
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+ /* Root domain allow everything memory region */
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+ vic7100_root_memregs[ROOT_ALL_REGION].order = 39;
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+ vic7100_root_memregs[ROOT_ALL_REGION].base = 0;
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+ vic7100_root_memregs[ROOT_ALL_REGION].flags = (SBI_DOMAIN_MEMREGION_READABLE |
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+ SBI_DOMAIN_MEMREGION_WRITEABLE |
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+ SBI_DOMAIN_MEMREGION_EXECUTABLE);
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+
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+ /* Root domain memory region end */
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+ vic7100_root_memregs[ROOT_END_REGION].order = 0;
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+ return vic7100_root_memregs;
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+}
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+
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+static int vic7100_system_reset_check(u32 type, u32 reason)
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+{
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+ return 1;
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+}
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+
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+static void vic7100_system_reset(u32 type, u32 reason)
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+{
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+ /* Reset system by GPIO */
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+
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+ sbi_printf("vic7100_system_reset_0\n");
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+
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+ u32 value = readq_relaxed((volatile u32 *)VIC7100_RESET_DOEN_ADDR);
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+ value &= ~((0x1 << 31) + 0xFF);
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+ writeq_relaxed(value, (volatile u32 *)VIC7100_RESET_DOEN_ADDR);
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+
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+ value = readq_relaxed((volatile u32 *)VIC7100_RESET_DOUT_ADDR);
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+ value &= ~((0x1 << 31) + 0xFF);
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+ value |= 0x1;
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+ writeq_relaxed(value, (volatile u32 *)VIC7100_RESET_DOUT_ADDR);
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+
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+ sbi_printf("vic7100_system_reset_1\n");
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+
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+ while(1);
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+}
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+
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+/* Vendor-Specific SBI handler, for test */
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+static int vic7100_vendor_ext_provider(long extid, long funcid,
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+ const struct sbi_trap_regs *regs, unsigned long *out_value,
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+ struct sbi_trap_info *out_trap)
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+{
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+ int ret = 0;
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+ switch (funcid) {
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+ case SBI_EXT_STARFIVE_RDTIME:
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+ *out_value = csr_read(CSR_TIME);
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+ break;
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+ case SBI_EXT_STARFIVE_GET_MTIME:
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+ ret = mcall_print_mtime(0x0200BFF8);
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+ break;
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+ default:
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+ sbi_printf("Unsupported vendor sbi call : %ld\n", funcid);
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+ asm volatile("ebreak");
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+ }
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+ return ret;
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+}
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+
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+const struct sbi_platform_operations platform_ops = {
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+ .final_init = vic7100_final_init,
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+ .console_putc = uart8250_putc,
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+ .console_getc = uart8250_getc,
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+ .console_init = vic7100_console_init,
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+ .irqchip_init = vic7100_irqchip_init,
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+ .ipi_send = clint_ipi_send,
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+ .ipi_clear = clint_ipi_clear,
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+ .ipi_init = vic7100_ipi_init,
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+ .get_tlbr_flush_limit = vic7100_get_tlbr_flush_limit,
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+ .timer_value = clint_timer_value,
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+ .timer_event_stop = clint_timer_event_stop,
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+ .timer_event_start = clint_timer_event_start,
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+ .timer_init = vic7100_timer_init,
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+ .domains_root_regions = vic7100_domains_init,
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+ .system_reset_check = vic7100_system_reset_check,
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+ .system_reset = vic7100_system_reset,
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+ .vendor_ext_provider = vic7100_vendor_ext_provider
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+};
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+
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+const struct sbi_platform platform = {
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+ .opensbi_version = OPENSBI_VERSION,
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+ .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
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+ .name = "StarFive VIC7100",
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+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
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+ .hart_count = (VIC7100_HART_COUNT),
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+ .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
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+ .platform_ops_addr = (unsigned long)&platform_ops
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+};
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