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docs: platform: Add documentation for Spike platform

This patch adds documentation to build and run OpenSBI on
Spike simulator and QEMU Spike machine.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Anup Patel 4 lat temu
rodzic
commit
29bb2a6835
2 zmienionych plików z 92 dodań i 0 usunięć
  1. 3 0
      docs/platform/platform.md
  2. 89 0
      docs/platform/spike.md

+ 3 - 0
docs/platform/platform.md

@@ -23,6 +23,8 @@ OpenSBI currently supports the following virtual and hardware platforms:
 
 
 * **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
 * **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
 
 
+* **Spike**: Platform support for the Spike emulator.
+
 The code for these supported platforms can be used as example to implement
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
 template files for implementing support for a new platform. The *object.mk*,
@@ -34,3 +36,4 @@ facilitate the implementation.
 [ariane-fpga.md]: ariane-fpga.md
 [ariane-fpga.md]: ariane-fpga.md
 [andes_ae350.md]: andes-ae350.md
 [andes_ae350.md]: andes-ae350.md
 [thead-c910.md]: thead-c910.md
 [thead-c910.md]: thead-c910.md
+[spike.md]: spike.md

+ 89 - 0
docs/platform/spike.md

@@ -0,0 +1,89 @@
+Spike Simulator Platform
+========================
+
+The **Spike** is a RISC-V ISA simulator which implements a functional model
+of one or more RISC-V harts. The **Spike** compatible virtual platform is
+also available on QEMU. In fact, we can use same OpenSBI firmware binaries
+on **Spike** simulator and QEMU Spike machine.
+
+For more details, refer [Spike on GitHub](https://github.com/riscv/riscv-isa-sim)
+
+To build the platform-specific library and firmware images, provide the
+*PLATFORM=spike* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *Spike* platform does not have any platform-specific options.
+
+Execution on Spike Simulator
+----------------------------
+
+**No Payload Case**
+
+Build:
+```
+make PLATFORM=spike
+```
+
+Run:
+```
+spike build/platform/spike/firmware/fw_payload.elf
+```
+
+**Linux Kernel Payload**
+
+Note: We assume that the Linux kernel is compiled using
+*arch/riscv/configs/defconfig*.
+
+Build:
+```
+make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Run:
+```
+spike --initrd <path_to_cpio_ramdisk> build/platform/spike/firmware/fw_payload.elf
+```
+
+Execution on QEMU RISC-V 64-bit
+-------------------------------
+
+**No Payload Case**
+
+Build:
+```
+make PLATFORM=spike
+```
+
+Run:
+```
+qemu-system-riscv64 -M spike -m 256M -nographic \
+	-kernel build/platform/spike/firmware/fw_payload.elf
+```
+
+**Linux Kernel Payload**
+
+Note: We assume that the Linux kernel is compiled using
+*arch/riscv/configs/defconfig*.
+
+Build:
+```
+make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Run:
+```
+qemu-system-riscv64 -M spike -m 256M -nographic \
+	-kernel build/platform/spike/firmware/fw_payload.elf \
+	-initrd <path_to_cpio_ramdisk> \
+	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
+```
+or
+```
+qemu-system-riscv64 -M spike -m 256M -nographic \
+	-bios build/platform/spike/firmware/fw_jump.elf \
+	-kernel <linux_build_directory>/arch/riscv/boot/Image \
+	-initrd <path_to_cpio_ramdisk> \
+	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
+```