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- From c55ea18c5a32ad138be9b4315c4f12751133485f Mon Sep 17 00:00:00 2001
- From: Edwin Lu <ewlu@rivosinc.com>
- Date: Mon, 11 Sep 2023 09:56:06 -0700
- Subject: [PATCH 19/30] RISC-V: Add Types to Un-Typed Zicond Instructions
- Creates a new "zicond" type and updates all zicond instructions
- with that type.
- gcc/ChangeLog:
- * config/riscv/riscv.md: Add "zicond" type
- * config/riscv/zicond.md: Update types
- Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
- ---
- gcc/config/riscv/riscv.md | 5 +++--
- gcc/config/riscv/zicond.md | 8 ++++----
- 2 files changed, 7 insertions(+), 6 deletions(-)
- diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
- index 1b44a99c5f1..d965f4a2c5d 100644
- --- a/gcc/config/riscv/riscv.md
- +++ b/gcc/config/riscv/riscv.md
- @@ -248,6 +248,7 @@
- ;; atomic atomic instructions
- ;; condmove conditional moves
- ;; crypto cryptography instructions
- +;; zicond zicond instructions
- ;; Classification of RVV instructions which will be added to each RVV .md pattern and used by scheduler.
- ;; rdvlenb vector byte length vlenb csrr read
- ;; rdvl vector length vl csrr read
- @@ -344,8 +345,8 @@
- "unknown,branch,jump,call,load,fpload,store,fpstore,
- mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul,
- fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,ghost,bitmanip,rotate,
- - atomic,condmove,crypto,rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts,
- - vldux,vldox,vstux,vstox,vldff,vldr,vstr,
- + zicond,atomic,condmove,crypto,rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,
- + vlds,vsts,vldux,vldox,vstux,vstox,vldff,vldr,vstr,
- vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp,viminmax,
- vimul,vidiv,viwmul,vimuladd,viwmuladd,vimerge,vimov,
- vsalu,vaalu,vsmul,vsshift,vnclip,
- diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md
- index 6627be3fa58..05e7348abba 100644
- --- a/gcc/config/riscv/zicond.md
- +++ b/gcc/config/riscv/zicond.md
- @@ -40,7 +40,7 @@
- else
- gcc_unreachable ();
- }
- -)
- +[(set_attr "type" "zicond")])
-
- (define_insn "*czero.<nez>.<GPR:mode><X:mode>"
- [(set (match_operand:GPR 0 "register_operand" "=r")
- @@ -57,7 +57,7 @@
- else
- gcc_unreachable ();
- }
- -)
- +[(set_attr "type" "zicond")])
-
- ;; Special optimization under eq/ne in primitive semantics
- (define_insn "*czero.eqz.<GPR:mode><X:mode>.opt1"
- @@ -75,7 +75,7 @@
- else
- gcc_unreachable ();
- }
- -)
- +[(set_attr "type" "zicond")])
-
- (define_insn "*czero.nez.<GPR:mode><X:mode>.opt2"
- [(set (match_operand:GPR 0 "register_operand" "=r")
- @@ -92,7 +92,7 @@
- else
- gcc_unreachable ();
- }
- -)
- +[(set_attr "type" "zicond")])
-
- ;; Combine creates this form in some cases (particularly the coremark
- ;; CRC loop).
- --
- 2.25.1
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