0008-committed-RISC-V-Remove-errant-hunk-of-code.patch 1.6 KB

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  1. From 34431e4c3af4140bdc3fcf57039e5f172b3215d4 Mon Sep 17 00:00:00 2001
  2. From: Jeff Law <jeffreyalaw@gmail.com>
  3. Date: Thu, 3 Aug 2023 10:57:23 -0400
  4. Subject: [PATCH 08/30] [committed][RISC-V] Remove errant hunk of code
  5. I'm using this hunk locally to more thoroughly exercise the zicond paths
  6. due to inaccuracies elsewhere in the costing model. It was never
  7. supposed to be part of the costing commit though. And as we've seen
  8. it's causing problems with the vector bits.
  9. While my testing isn't complete, this hunk was never supposed to be
  10. pushed and it's causing problems. So I'm just ripping it out.
  11. There's a bigger TODO in this space WRT a top-to-bottom evaluation of
  12. the costing on RISC-V. I'm still formulating what that evaluation is
  13. going to look like, so don't hold your breath waiting on it.
  14. Pushed to the trunk.
  15. gcc/
  16. * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
  17. recent commit.
  18. ---
  19. gcc/config/riscv/riscv.cc | 10 ----------
  20. 1 file changed, 10 deletions(-)
  21. diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
  22. index 6ec985db430..dca9329608f 100644
  23. --- a/gcc/config/riscv/riscv.cc
  24. +++ b/gcc/config/riscv/riscv.cc
  25. @@ -2749,16 +2749,6 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN
  26. }
  27. return false;
  28. - case SET:
  29. - /* A simple SET with a register destination takes its cost solely from
  30. - the SET_SRC operand. */
  31. - if (outer_code == INSN && REG_P (SET_DEST (x)))
  32. - {
  33. - *total = riscv_rtx_costs (SET_SRC (x), mode, SET, opno, total, speed);
  34. - return true;
  35. - }
  36. - return false;
  37. -
  38. default:
  39. return false;
  40. }
  41. --
  42. 2.25.1