0007-committed-RISC-V-Fix-20010221-1.c-with-zicond.patch 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116
  1. From 9a5fb0039d3beb614552829ae4e13dc8a9f76c83 Mon Sep 17 00:00:00 2001
  2. From: Jeff Law <jlaw@ventanamicro.com>
  3. Date: Wed, 2 Aug 2023 13:16:23 -0400
  4. Subject: [PATCH 07/30] [committed][RISC-V] Fix 20010221-1.c with zicond
  5. So we're being a bit too aggressive with the .opt zicond patterns.
  6. > (define_insn "*czero.eqz.<GPR:mode><X:mode>.opt1"
  7. > [(set (match_operand:GPR 0 "register_operand" "=r")
  8. > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
  9. > (const_int 0))
  10. > (match_operand:GPR 2 "register_operand" "1")
  11. > (match_operand:GPR 3 "register_operand" "r")))]
  12. > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])"
  13. > "czero.eqz\t%0,%3,%1"
  14. > )
  15. The RTL semantics here are op0 = (op1 == 0) ? op1 : op2. That maps
  16. directly to czero.eqz. ie, we select op1 when we know it's zero, op2
  17. otherwise. So this pattern is fine.
  18. > (define_insn "*czero.eqz.<GPR:mode><X:mode>.opt2"
  19. > [(set (match_operand:GPR 0 "register_operand" "=r")
  20. > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
  21. > (const_int 0))
  22. > (match_operand:GPR 2 "register_operand" "r")
  23. > (match_operand:GPR 3 "register_operand" "1")))]
  24. > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])"
  25. > "czero.nez\t%0,%2,%1"
  26. > )
  27. The RTL semantics of this pattern are are: op0 = (op1 == 0) ? op2 : op1;
  28. That's not something that can be expressed by the zicond extension as it
  29. selects op1 if and only if op1 is not equal to zero.
  30. > (define_insn "*czero.nez.<GPR:mode><X:mode>.opt3"
  31. > [(set (match_operand:GPR 0 "register_operand" "=r")
  32. > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
  33. > (const_int 0))
  34. > (match_operand:GPR 2 "register_operand" "r")
  35. > (match_operand:GPR 3 "register_operand" "1")))]
  36. > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])"
  37. > "czero.eqz\t%0,%2,%1"
  38. > )
  39. The RTL semantics of this pattern are op0 = (op1 != 0) ? op2 : op1.
  40. That maps to czero.nez. But the output template uses czero.eqz. Opps.
  41. > (define_insn "*czero.nez.<GPR:mode><X:mode>.opt4"
  42. > [(set (match_operand:GPR 0 "register_operand" "=r")
  43. > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
  44. > (const_int 0))
  45. > (match_operand:GPR 2 "register_operand" "1")
  46. > (match_operand:GPR 3 "register_operand" "r")))]
  47. > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])"
  48. > "czero.nez\t%0,%3,%1"
  49. > )
  50. The RTL semantics of this pattern are op0 = (op1 != 0) ? op1 : op2 which
  51. obviously doesn't match to any zicond instruction as op1 is selected
  52. when it is not zero.
  53. So two of the patterns are just totally bogus as they are not
  54. implementable with zicond. They are removed. The asm template for the
  55. .opt3 pattern is fixed to use czero.nez and its name is changed to
  56. .opt2.
  57. gcc/
  58. * config/riscv/zicond.md: Remove incorrect zicond patterns and
  59. renumber/rename them.
  60. (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
  61. ---
  62. gcc/config/riscv/zicond.md | 24 ++----------------------
  63. 1 file changed, 2 insertions(+), 22 deletions(-)
  64. diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md
  65. index 8f24b3a1690..25f21d33487 100644
  66. --- a/gcc/config/riscv/zicond.md
  67. +++ b/gcc/config/riscv/zicond.md
  68. @@ -53,32 +53,12 @@
  69. "czero.eqz\t%0,%3,%1"
  70. )
  71. -(define_insn "*czero.eqz.<GPR:mode><X:mode>.opt2"
  72. - [(set (match_operand:GPR 0 "register_operand" "=r")
  73. - (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
  74. - (const_int 0))
  75. - (match_operand:GPR 2 "register_operand" "r")
  76. - (match_operand:GPR 3 "register_operand" "1")))]
  77. - "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])"
  78. - "czero.nez\t%0,%2,%1"
  79. -)
  80. -
  81. -(define_insn "*czero.nez.<GPR:mode><X:mode>.opt3"
  82. +(define_insn "*czero.nez.<GPR:mode><X:mode>.opt2"
  83. [(set (match_operand:GPR 0 "register_operand" "=r")
  84. (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
  85. (const_int 0))
  86. (match_operand:GPR 2 "register_operand" "r")
  87. (match_operand:GPR 3 "register_operand" "1")))]
  88. "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])"
  89. - "czero.eqz\t%0,%2,%1"
  90. -)
  91. -
  92. -(define_insn "*czero.nez.<GPR:mode><X:mode>.opt4"
  93. - [(set (match_operand:GPR 0 "register_operand" "=r")
  94. - (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
  95. - (const_int 0))
  96. - (match_operand:GPR 2 "register_operand" "1")
  97. - (match_operand:GPR 3 "register_operand" "r")))]
  98. - "TARGET_ZICOND && rtx_equal_p (operands[1], operands[2])"
  99. - "czero.nez\t%0,%3,%1"
  100. + "czero.nez\t%0,%2,%1"
  101. )
  102. --
  103. 2.25.1