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- From 9a5fb0039d3beb614552829ae4e13dc8a9f76c83 Mon Sep 17 00:00:00 2001
- From: Jeff Law <jlaw@ventanamicro.com>
- Date: Wed, 2 Aug 2023 13:16:23 -0400
- Subject: [PATCH 07/30] [committed][RISC-V] Fix 20010221-1.c with zicond
- So we're being a bit too aggressive with the .opt zicond patterns.
- > (define_insn "*czero.eqz.<GPR:mode><X:mode>.opt1"
- > [(set (match_operand:GPR 0 "register_operand" "=r")
- > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
- > (const_int 0))
- > (match_operand:GPR 2 "register_operand" "1")
- > (match_operand:GPR 3 "register_operand" "r")))]
- > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])"
- > "czero.eqz\t%0,%3,%1"
- > )
- The RTL semantics here are op0 = (op1 == 0) ? op1 : op2. That maps
- directly to czero.eqz. ie, we select op1 when we know it's zero, op2
- otherwise. So this pattern is fine.
- > (define_insn "*czero.eqz.<GPR:mode><X:mode>.opt2"
- > [(set (match_operand:GPR 0 "register_operand" "=r")
- > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
- > (const_int 0))
- > (match_operand:GPR 2 "register_operand" "r")
- > (match_operand:GPR 3 "register_operand" "1")))]
- > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])"
- > "czero.nez\t%0,%2,%1"
- > )
- The RTL semantics of this pattern are are: op0 = (op1 == 0) ? op2 : op1;
- That's not something that can be expressed by the zicond extension as it
- selects op1 if and only if op1 is not equal to zero.
- > (define_insn "*czero.nez.<GPR:mode><X:mode>.opt3"
- > [(set (match_operand:GPR 0 "register_operand" "=r")
- > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
- > (const_int 0))
- > (match_operand:GPR 2 "register_operand" "r")
- > (match_operand:GPR 3 "register_operand" "1")))]
- > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])"
- > "czero.eqz\t%0,%2,%1"
- > )
- The RTL semantics of this pattern are op0 = (op1 != 0) ? op2 : op1.
- That maps to czero.nez. But the output template uses czero.eqz. Opps.
- > (define_insn "*czero.nez.<GPR:mode><X:mode>.opt4"
- > [(set (match_operand:GPR 0 "register_operand" "=r")
- > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
- > (const_int 0))
- > (match_operand:GPR 2 "register_operand" "1")
- > (match_operand:GPR 3 "register_operand" "r")))]
- > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])"
- > "czero.nez\t%0,%3,%1"
- > )
- The RTL semantics of this pattern are op0 = (op1 != 0) ? op1 : op2 which
- obviously doesn't match to any zicond instruction as op1 is selected
- when it is not zero.
- So two of the patterns are just totally bogus as they are not
- implementable with zicond. They are removed. The asm template for the
- .opt3 pattern is fixed to use czero.nez and its name is changed to
- .opt2.
- gcc/
- * config/riscv/zicond.md: Remove incorrect zicond patterns and
- renumber/rename them.
- (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
- ---
- gcc/config/riscv/zicond.md | 24 ++----------------------
- 1 file changed, 2 insertions(+), 22 deletions(-)
- diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md
- index 8f24b3a1690..25f21d33487 100644
- --- a/gcc/config/riscv/zicond.md
- +++ b/gcc/config/riscv/zicond.md
- @@ -53,32 +53,12 @@
- "czero.eqz\t%0,%3,%1"
- )
-
- -(define_insn "*czero.eqz.<GPR:mode><X:mode>.opt2"
- - [(set (match_operand:GPR 0 "register_operand" "=r")
- - (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
- - (const_int 0))
- - (match_operand:GPR 2 "register_operand" "r")
- - (match_operand:GPR 3 "register_operand" "1")))]
- - "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])"
- - "czero.nez\t%0,%2,%1"
- -)
- -
- -(define_insn "*czero.nez.<GPR:mode><X:mode>.opt3"
- +(define_insn "*czero.nez.<GPR:mode><X:mode>.opt2"
- [(set (match_operand:GPR 0 "register_operand" "=r")
- (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
- (const_int 0))
- (match_operand:GPR 2 "register_operand" "r")
- (match_operand:GPR 3 "register_operand" "1")))]
- "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])"
- - "czero.eqz\t%0,%2,%1"
- -)
- -
- -(define_insn "*czero.nez.<GPR:mode><X:mode>.opt4"
- - [(set (match_operand:GPR 0 "register_operand" "=r")
- - (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
- - (const_int 0))
- - (match_operand:GPR 2 "register_operand" "1")
- - (match_operand:GPR 3 "register_operand" "r")))]
- - "TARGET_ZICOND && rtx_equal_p (operands[1], operands[2])"
- - "czero.nez\t%0,%3,%1"
- + "czero.nez\t%0,%2,%1"
- )
- --
- 2.25.1
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