0006-nativesdk-glibc-Allow-64-bit-atomics-for-x86.patch 1.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243
  1. From 76eaf7340a7f9063ab1ad2d7c6c0e205f22f544c Mon Sep 17 00:00:00 2001
  2. From: Khem Raj <raj.khem@gmail.com>
  3. Date: Thu, 31 Dec 2015 14:35:35 -0800
  4. Subject: [PATCH] nativesdk-glibc: Allow 64 bit atomics for x86
  5. The fix consist of allowing 64bit atomic ops for x86.
  6. This should be safe for i586 and newer CPUs.
  7. It also makes the synchronization more efficient.
  8. Upstream-Status: Inappropriate [OE-Specific]
  9. Signed-off-by: Juro Bystricky <juro.bystricky@intel.com>
  10. Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
  11. Signed-off-by: Khem Raj <raj.khem@gmail.com>
  12. ---
  13. sysdeps/x86/atomic-machine.h | 7 +------
  14. 1 file changed, 1 insertion(+), 6 deletions(-)
  15. diff --git a/sysdeps/x86/atomic-machine.h b/sysdeps/x86/atomic-machine.h
  16. index 95663099e4..4d81efc51a 100644
  17. --- a/sysdeps/x86/atomic-machine.h
  18. +++ b/sysdeps/x86/atomic-machine.h
  19. @@ -26,19 +26,14 @@
  20. #define LOCK_PREFIX "lock;"
  21. #define USE_ATOMIC_COMPILER_BUILTINS 1
  22. +# define __HAVE_64B_ATOMICS 1
  23. #ifdef __x86_64__
  24. -# define __HAVE_64B_ATOMICS 1
  25. # define SP_REG "rsp"
  26. # define SEG_REG "fs"
  27. # define BR_CONSTRAINT "q"
  28. # define IBR_CONSTRAINT "iq"
  29. #else
  30. -/* Since the Pentium, i386 CPUs have supported 64-bit atomics, but the
  31. - i386 psABI supplement provides only 4-byte alignment for uint64_t
  32. - inside structs, so it is currently not possible to use 64-bit
  33. - atomics on this platform. */
  34. -# define __HAVE_64B_ATOMICS 0
  35. # define SP_REG "esp"
  36. # define SEG_REG "gs"
  37. # define BR_CONSTRAINT "r"