0006-Merge-B-instruction-from-0p94-to-1.0.patch 25 KB

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  1. From 6065dbfb8d027463e65a5706f94a33995991db3e Mon Sep 17 00:00:00 2001
  2. From: "yilun.xie" <yilun.xie@starfivetech.com>
  3. Date: Fri, 22 Oct 2021 16:10:47 +0800
  4. Subject: [PATCH 06/11] Merge B instruction from 0p94 to 1.0
  5. ---
  6. bfd/elfxx-riscv.c | 4 +-
  7. gas/config/tc-riscv.c | 44 ++---------
  8. include/opcode/riscv.h | 11 ---
  9. opcodes/riscv-opc.c | 170 +----------------------------------------
  10. 4 files changed, 11 insertions(+), 218 deletions(-)
  11. diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
  12. index 9999ec418a..24c045c46e 100644
  13. --- a/bfd/elfxx-riscv.c
  14. +++ b/bfd/elfxx-riscv.c
  15. @@ -1077,8 +1077,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
  16. static const char * const riscv_std_z_ext_strtab[] =
  17. {
  18. - "zba", "zbb", "zbc", "zicsr", "zifencei", "zihintpause",
  19. - "zbe", "zbf", "zbm", "zbp", "zbr", "zbs", "zbt", "zvamo", "zvlsseg",NULL
  20. + "zicsr", "zifencei", "zihintpause", "zvamo", "zvlsseg",
  21. + "zba", "zbb", "zbc", "zbs", NULL
  22. };
  23. static const char * const riscv_std_s_ext_strtab[] =
  24. diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
  25. index 3f6f7848b9..4aaba3c403 100644
  26. --- a/gas/config/tc-riscv.c
  27. +++ b/gas/config/tc-riscv.c
  28. @@ -140,17 +140,11 @@ static const struct riscv_ext_version ext_version_table[] =
  29. {"zihintpause", ISA_SPEC_CLASS_DRAFT, 1, 0},
  30. - {"b", ISA_SPEC_CLASS_DRAFT, 0, 94},
  31. - {"zbb", ISA_SPEC_CLASS_DRAFT, 0, 94},
  32. - {"zba", ISA_SPEC_CLASS_DRAFT, 0, 94},
  33. - {"zbc", ISA_SPEC_CLASS_DRAFT, 0, 94},
  34. - {"zbe", ISA_SPEC_CLASS_DRAFT, 0, 94},
  35. - {"zbf", ISA_SPEC_CLASS_DRAFT, 0, 94},
  36. - {"zbm", ISA_SPEC_CLASS_DRAFT, 0, 94},
  37. - {"zbp", ISA_SPEC_CLASS_DRAFT, 0, 94},
  38. - {"zbr", ISA_SPEC_CLASS_DRAFT, 0, 94},
  39. - {"zbs", ISA_SPEC_CLASS_DRAFT, 0, 94},
  40. - {"zbt", ISA_SPEC_CLASS_DRAFT, 0, 94},
  41. + {"b", ISA_SPEC_CLASS_DRAFT, 1, 0},
  42. + {"zbb", ISA_SPEC_CLASS_DRAFT, 1, 0},
  43. + {"zba", ISA_SPEC_CLASS_DRAFT, 1, 0},
  44. + {"zbc", ISA_SPEC_CLASS_DRAFT, 1, 0},
  45. + {"zbs", ISA_SPEC_CLASS_DRAFT, 1, 0},
  46. {"zvamo", ISA_SPEC_CLASS_NONE, 1, 0},
  47. {"zvlsseg", ISA_SPEC_CLASS_NONE, 1, 0},
  48. @@ -346,40 +340,16 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
  49. return riscv_subset_supports ("zifencei");
  50. case INSN_CLASS_ZIHINTPAUSE:
  51. return riscv_subset_supports ("zihintpause");
  52. -
  53. +
  54. case INSN_CLASS_ZBB:
  55. return riscv_subset_supports ("zbb");
  56. -
  57. case INSN_CLASS_ZBA:
  58. return riscv_subset_supports ("zba");
  59. -
  60. case INSN_CLASS_ZBC:
  61. return riscv_subset_supports ("zbc");
  62. -
  63. - case INSN_CLASS_ZBE:
  64. - return riscv_subset_supports ("zbe");
  65. - case INSN_CLASS_ZBF:
  66. - return riscv_subset_supports ("zbf");
  67. - case INSN_CLASS_ZBM:
  68. - return riscv_subset_supports ("zbm");
  69. - case INSN_CLASS_ZBP:
  70. - return riscv_subset_supports ("zbp");
  71. - case INSN_CLASS_ZBR:
  72. - return riscv_subset_supports ("zbr");
  73. case INSN_CLASS_ZBS:
  74. return riscv_subset_supports ("zbs");
  75. - case INSN_CLASS_ZBT:
  76. - return riscv_subset_supports ("zbt");
  77. - case INSN_CLASS_ZBB_OR_ZBP:
  78. - return (riscv_subset_supports ("zbb") || riscv_subset_supports ("zbp"));
  79. - case INSN_CLASS_ZBS_OR_ZBE:
  80. - return (riscv_subset_supports ("zbs") || riscv_subset_supports ("zbe"));
  81. - case INSN_CLASS_ZBP_OR_ZBM:
  82. - return (riscv_subset_supports ("zbp") || riscv_subset_supports ("zbm"));
  83. - case INSN_CLASS_ZBP_OR_ZBE_OR_ZBF:
  84. - return (riscv_subset_supports ("zbp") || riscv_subset_supports ("zbe") || riscv_subset_supports ("zbf"));
  85. - case INSN_CLASS_ZBP_OR_ZBE_OR_ZBF_OR_ZBM:
  86. - return (riscv_subset_supports ("zbp") || riscv_subset_supports ("zbe") || riscv_subset_supports ("zbf") || riscv_subset_supports ("zbm"));
  87. +
  88. case INSN_CLASS_V:
  89. return riscv_subset_supports ("v");
  90. case INSN_CLASS_V_AND_F:
  91. diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
  92. index a785cb1490..92b7ed18f9 100644
  93. --- a/include/opcode/riscv.h
  94. +++ b/include/opcode/riscv.h
  95. @@ -388,18 +388,7 @@ enum riscv_insn_class
  96. INSN_CLASS_ZBA,
  97. INSN_CLASS_ZBB,
  98. INSN_CLASS_ZBC,
  99. - INSN_CLASS_ZBP,
  100. - INSN_CLASS_ZBB_OR_ZBP,
  101. INSN_CLASS_ZBS,
  102. - INSN_CLASS_ZBE,
  103. - INSN_CLASS_ZBS_OR_ZBE,
  104. - INSN_CLASS_ZBF,
  105. - INSN_CLASS_ZBM,
  106. - INSN_CLASS_ZBP_OR_ZBM,
  107. - INSN_CLASS_ZBR,
  108. - INSN_CLASS_ZBT,
  109. - INSN_CLASS_ZBP_OR_ZBE_OR_ZBF,
  110. - INSN_CLASS_ZBP_OR_ZBE_OR_ZBF_OR_ZBM,
  111. INSN_CLASS_V,
  112. INSN_CLASS_V_AND_F,
  113. INSN_CLASS_V_OR_ZVAMO,
  114. diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
  115. index 745c7a990b..98e7fa33f0 100644
  116. --- a/opcodes/riscv-opc.c
  117. +++ b/opcodes/riscv-opc.c
  118. @@ -1257,7 +1257,7 @@ const struct riscv_opcode riscv_opcodes[] =
  119. /* ZBS instructions */
  120. {"bclr", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BCLR, MASK_BCLR, match_opcode, 0 },
  121. {"bclri", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, 0 },
  122. -{"bext", 0, INSN_CLASS_ZBS_OR_ZBE, "d,s,t", MATCH_BEXT, MASK_BEXT, match_opcode, 0 },
  123. +{"bext", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BEXT, MASK_BEXT, match_opcode, 0 },
  124. {"bexti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, 0 },
  125. {"binv", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BINV, MASK_BINV, match_opcode, 0 },
  126. {"binvi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, 0 },
  127. @@ -1265,155 +1265,10 @@ const struct riscv_opcode riscv_opcodes[] =
  128. {"bseti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, 0 },
  129. /* B instructions excluded from spec1.0 */
  130. -{"rev", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  131. -{"rev", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  132. -{"rev.p", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_P_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  133. -{"rev.p", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_P_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  134. -{"rev.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_N_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  135. -{"rev.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_N_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  136. -{"rev.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_B_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  137. -{"rev.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_B_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  138. -{"rev.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  139. -{"rev.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  140. -{"rev.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  141. -{"rev2", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  142. -{"rev2", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  143. -{"rev2.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_N_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  144. -{"rev2.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_N_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  145. -{"rev2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_B_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  146. -{"rev2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_B_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  147. -{"rev2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  148. -{"rev2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  149. -{"rev2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  150. -{"rev4", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  151. -{"rev4", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  152. -{"rev4.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_B_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  153. -{"rev4.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_B_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  154. -{"rev4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  155. -{"rev4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  156. -{"rev4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  157. -{"rev8.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV8_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  158. -{"rev8.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV8_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  159. -{"rev8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV8_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  160. -{"rev16", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV16_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  161. -{"rev16", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV16_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  162. -{"rev16.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV16_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  163. -{"rev32", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV32_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 },
  164. -{"zip", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  165. -{"zip", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  166. -{"zip.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_N_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  167. -{"zip.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_N_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  168. -{"zip.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_B_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  169. -{"zip.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_B_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  170. -{"zip.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_H_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  171. -{"zip.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_H_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  172. -{"zip.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  173. -{"zip2", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  174. -{"zip2", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  175. -{"zip2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_B_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  176. -{"zip2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_B_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  177. -{"zip2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_H_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  178. -{"zip2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_H_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  179. -{"zip2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  180. -{"zip4", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  181. -{"zip4", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  182. -{"zip4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_H_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  183. -{"zip4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_H_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  184. -{"zip4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  185. -{"zip8", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP8_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  186. -{"zip8", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP8_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  187. -{"zip8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP8_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  188. -{"zip16", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP16_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
  189. -{"unzip", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  190. -{"unzip", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  191. -{"unzip.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_N_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  192. -{"unzip.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_N_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  193. -{"unzip.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_B_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  194. -{"unzip.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_B_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  195. -{"unzip.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_H_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  196. -{"unzip.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_H_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  197. -{"unzip.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  198. -{"unzip2", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  199. -{"unzip2", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  200. -{"unzip2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_B_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  201. -{"unzip2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_B_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  202. -{"unzip2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_H_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  203. -{"unzip2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_H_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  204. -{"unzip2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  205. -{"unzip4", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  206. -{"unzip4", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  207. -{"unzip4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_H_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  208. -{"unzip4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_H_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  209. -{"unzip4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  210. -{"unzip8", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP8_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  211. -{"unzip8", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP8_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  212. -{"unzip8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP8_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  213. -{"unzip16", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP16_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
  214. -{"orc", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  215. -{"orc", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  216. -{"orc.p", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_P_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  217. -{"orc.p", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_P_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  218. -{"orc.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_N_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  219. -{"orc.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_N_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  220. -{"orc.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  221. -{"orc.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  222. -{"orc.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  223. -{"orc2", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  224. -{"orc2", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  225. -{"orc2.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_N_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  226. -{"orc2.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_N_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  227. -{"orc2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_B_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  228. -{"orc2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_B_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  229. -{"orc2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  230. -{"orc2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  231. -{"orc2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  232. -{"orc4", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  233. -{"orc4", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  234. -{"orc4.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_B_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  235. -{"orc4.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_B_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  236. -{"orc4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  237. -{"orc4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  238. -{"orc4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  239. -{"orc8", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  240. -{"orc8", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  241. -{"orc8.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  242. -{"orc8.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  243. -{"orc8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  244. -{"orc16", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC16_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  245. -{"orc16", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC16_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  246. -{"orc16.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC16_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  247. -{"orc32", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC32_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 },
  248. -{"pack", 0, INSN_CLASS_ZBP_OR_ZBE_OR_ZBF_OR_ZBM, "d,s,t", MATCH_PACK, MASK_PACK, match_opcode, 0 },
  249. -{"packu", 0, INSN_CLASS_ZBP_OR_ZBM, "d,s,t", MATCH_PACKU, MASK_PACKU, match_opcode, 0 },
  250. -{"packh", 0, INSN_CLASS_ZBP_OR_ZBE_OR_ZBF, "d,s,t", MATCH_PACKH, MASK_PACKH, match_opcode, 0 },
  251. -{"packw", 64, INSN_CLASS_ZBP_OR_ZBE_OR_ZBF, "d,s,<", MATCH_PACKW, MASK_PACKW, match_opcode, 0 },
  252. -{"packuw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_PACKUW, MASK_PACKUW, match_opcode, 0 },
  253. -{"grev", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_GREV, MASK_GREV, match_opcode, 0 },
  254. -{"grevi", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_GREVI, MASK_GREVI, match_opcode, 0 },
  255. -{"grevw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GREVW, MASK_GREVW, match_opcode, 0 },
  256. -{"greviw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GREVIW, MASK_GREVIW, match_opcode, 0 },
  257. -{"gorc", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_GORC, MASK_GORC, match_opcode, 0 },
  258. -{"gorci", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_GORCI, MASK_GORCI, match_opcode, 0 },
  259. -{"gorcw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GORCW, MASK_GORCW, match_opcode, 0 },
  260. -{"gorciw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GORCIW, MASK_GORCIW, match_opcode, 0 },
  261. -{"shfl", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_SHFL, MASK_SHFL, match_opcode, 0 },
  262. -{"shfli", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_SHFLI, MASK_SHFLI, match_opcode, 0 },
  263. -{"shflw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_SHFLW, MASK_SHFLW, match_opcode, 0 },
  264. -{"unshfl", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_UNSHFL, MASK_UNSHFL, match_opcode, 0 },
  265. -{"unshfli", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_UNSHFLI, MASK_UNSHFLI, match_opcode, 0 },
  266. -{"unshflw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_UNSHFLW, MASK_UNSHFLW, match_opcode, 0 },
  267. -{"xperm.n", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_XPERM_N, MASK_XPERM_N, match_opcode, 0 },
  268. -{"xperm.b", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_XPERM_B, MASK_XPERM_B, match_opcode, 0 },
  269. -{"xperm.h", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_XPERM_H, MASK_XPERM_H, match_opcode, 0 },
  270. -{"xperm.w", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_XPERM_W, MASK_XPERM_W, match_opcode, 0 },
  271. -{"bcompress",0, INSN_CLASS_ZBE, "d,s,t", MATCH_BCOMPRESS, MASK_BCOMPRESS, match_opcode, 0 },
  272. -{"bdecompress",0, INSN_CLASS_ZBE, "d,s,t", MATCH_BDECOMPRESS, MASK_BDECOMPRESS, match_opcode, 0 },
  273. {"bsetw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BSETW, MASK_BSETW, match_opcode, 0 },
  274. {"bclrw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BCLRW, MASK_BCLRW, match_opcode, 0 },
  275. {"binvw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BINVW, MASK_BINVW, match_opcode, 0 },
  276. -{"bextw", 64, INSN_CLASS_ZBS_OR_ZBE, "d,s,t", MATCH_BEXTW, MASK_BEXTW, match_opcode, 0 },
  277. -{"bcompressw",64, INSN_CLASS_ZBE, "d,s,<", MATCH_BCOMPRESSW, MASK_BCOMPRESSW, match_opcode, 0 },
  278. -{"bdecompressw",64, INSN_CLASS_ZBE, "d,s,<", MATCH_BDECOMPRESSW, MASK_BDECOMPRESSW, match_opcode, 0 },
  279. +{"bextw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BEXTW, MASK_BEXTW, match_opcode, 0 },
  280. {"bsetiw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_BSETIW, MASK_BSETIW, match_opcode, 0 },
  281. {"bclriw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_BCLRIW, MASK_BCLRIW, match_opcode, 0 },
  282. {"binviw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_BINVIW, MASK_BINVIW, match_opcode, 0 },
  283. @@ -1425,27 +1280,6 @@ const struct riscv_opcode riscv_opcodes[] =
  284. {"srow", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SROW, MASK_SROW, match_opcode, 0 },
  285. {"sloiw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SLOIW, MASK_SLOIW, match_opcode, 0 },
  286. {"sroiw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SROIW, MASK_SROIW, match_opcode, 0 },
  287. -{"bfp", 0, INSN_CLASS_ZBF, "d,s,t", MATCH_BFP, MASK_BFP, match_opcode, 0 },
  288. -{"bfpw", 64, INSN_CLASS_ZBF, "d,s,<", MATCH_BFPW, MASK_BFPW, match_opcode, 0 },
  289. -{"bmator", 64, INSN_CLASS_ZBM, "d,s,t", MATCH_BMATOR, MASK_BMATOR, match_opcode, 0 },
  290. -{"bmatxor", 64, INSN_CLASS_ZBM, "d,s,t", MATCH_BMATXOR, MASK_BMATXOR, match_opcode, 0 },
  291. -{"bmatflip", 64, INSN_CLASS_ZBM, "d,s", MATCH_BMATFLIP, MASK_BMATFLIP, match_opcode, 0 },
  292. -{"crc32.b", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_B, MASK_CRC32_B, match_opcode, 0 },
  293. -{"crc32.h", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_H, MASK_CRC32_H, match_opcode, 0 },
  294. -{"crc32.w", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_W, MASK_CRC32_W, match_opcode, 0 },
  295. -{"crc32c.b", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_B, MASK_CRC32C_B, match_opcode, 0 },
  296. -{"crc32c.h", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_H, MASK_CRC32C_H, match_opcode, 0 },
  297. -{"crc32c.w", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_W, MASK_CRC32C_W, match_opcode, 0 },
  298. -{"crc32.d", 64, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_D, MASK_CRC32_D, match_opcode, 0 },
  299. -{"crc32c.d", 64, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_D, MASK_CRC32C_D, match_opcode, 0 },
  300. -{"cmix", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_CMIX, MASK_CMIX, match_opcode, 0 },
  301. -{"cmov", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_CMOV, MASK_CMOV, match_opcode, 0 },
  302. -{"fsl", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_FSL, MASK_FSL, match_opcode, 0 },
  303. -{"fsr", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_FSR, MASK_FSR, match_opcode, 0 },
  304. -{"fsri", 0, INSN_CLASS_ZBT, "d,s,>,r", MATCH_FSRI, MASK_FSRI, match_opcode, 0 },
  305. -{"fslw", 64, INSN_CLASS_ZBT, "d,s,<,r", MATCH_FSLW, MASK_FSLW, match_opcode, 0 },
  306. -{"fsrw", 64, INSN_CLASS_ZBT, "d,s,<,r", MATCH_FSRW, MASK_FSRW, match_opcode, 0 },
  307. -{"fsriw", 64, INSN_CLASS_ZBT, "d,s,<,r", MATCH_FSRIW, MASK_FSRIW, match_opcode, 0 },
  308. /* RVV */
  309. {"vsetvl", 0, INSN_CLASS_V, "d,s,t", MATCH_VSETVL, MASK_VSETVL, match_opcode, 0},
  310. --
  311. 2.33.1