12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091 |
- From d8a62ac2d3f365054d7788fea734152c3c250e79 Mon Sep 17 00:00:00 2001
- From: Frank Chang <frank.chang@sifive.com>
- Date: Wed, 24 Feb 2021 16:15:52 +0800
- Subject: [PATCH 082/107] target/riscv: rvv-1.0: add evl parameter to
- vext_ldst_us()
- rvv v0.10 adds vector unit-stride mask load/store instructions
- (vle1.v, vse1.v), which has:
- evl (effective vector length) = ceil(env-vl/8).
- The new instructions operate the same as unmasked byte loads and stores.
- Add evl parameter to reuse vext_ldst_us().
- Signed-off-by: Frank Chang <frank.chang@sifive.com>
- ---
- target/riscv/vector_helper.c | 38 ++++++++++++++++++------------------
- 1 file changed, 19 insertions(+), 19 deletions(-)
- diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
- index 78787af258..0e0b392a27 100644
- --- a/target/riscv/vector_helper.c
- +++ b/target/riscv/vector_helper.c
- @@ -292,17 +292,17 @@ GEN_VEXT_ST_STRIDE(vsse64_v, int64_t, ste_d)
- /* unmasked unit-stride load and store operation*/
- static void
- vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
- - vext_ldst_elem_fn *ldst_elem,
- - uint32_t esz, uintptr_t ra, MMUAccessType access_type)
- + vext_ldst_elem_fn *ldst_elem, uint32_t esz, uint32_t evl,
- + uintptr_t ra, MMUAccessType access_type)
- {
- uint32_t i, k;
- uint32_t nf = vext_nf(desc);
- uint32_t max_elems = vext_max_elems(desc, esz);
-
- /* probe every access */
- - probe_pages(env, base, env->vl * (nf << esz), ra, access_type);
- + probe_pages(env, base, evl * (nf << esz), ra, access_type);
- /* load bytes from guest memory */
- - for (i = env->vstart; i < env->vl; i++) {
- + for (i = env->vstart; i < evl; i++) {
- k = 0;
- while (k < nf) {
- target_ulong addr = base + ((i * nf + k) << esz);
- @@ -332,7 +332,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
- CPURISCVState *env, uint32_t desc) \
- { \
- vext_ldst_us(vd, base, env, desc, LOAD_FN, \
- - ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_LOAD); \
- + ctzl(sizeof(ETYPE)), env->vl, GETPC(), MMU_DATA_LOAD); \
- }
-
- GEN_VEXT_LD_US(vle8_v, int8_t, lde_b)
- @@ -340,20 +340,20 @@ GEN_VEXT_LD_US(vle16_v, int16_t, lde_h)
- GEN_VEXT_LD_US(vle32_v, int32_t, lde_w)
- GEN_VEXT_LD_US(vle64_v, int64_t, lde_d)
-
- -#define GEN_VEXT_ST_US(NAME, ETYPE, STORE_FN) \
- -void HELPER(NAME##_mask)(void *vd, void *v0, target_ulong base, \
- - CPURISCVState *env, uint32_t desc) \
- -{ \
- - uint32_t stride = vext_nf(desc) << ctzl(sizeof(ETYPE)); \
- - vext_ldst_stride(vd, v0, base, stride, env, desc, false, STORE_FN, \
- - ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
- -} \
- - \
- -void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
- - CPURISCVState *env, uint32_t desc) \
- -{ \
- - vext_ldst_us(vd, base, env, desc, STORE_FN, \
- - ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
- +#define GEN_VEXT_ST_US(NAME, ETYPE, STORE_FN) \
- +void HELPER(NAME##_mask)(void *vd, void *v0, target_ulong base, \
- + CPURISCVState *env, uint32_t desc) \
- +{ \
- + uint32_t stride = vext_nf(desc) << ctzl(sizeof(ETYPE)); \
- + vext_ldst_stride(vd, v0, base, stride, env, desc, false, STORE_FN, \
- + ctzl(sizeof(ETYPE)), GETPC(), MMU_DATA_STORE); \
- +} \
- + \
- +void HELPER(NAME)(void *vd, void *v0, target_ulong base, \
- + CPURISCVState *env, uint32_t desc) \
- +{ \
- + vext_ldst_us(vd, base, env, desc, STORE_FN, \
- + ctzl(sizeof(ETYPE)), env->vl, GETPC(), MMU_DATA_STORE); \
- }
-
- GEN_VEXT_ST_US(vse8_v, int8_t, ste_b)
- --
- 2.33.1
|