0023-RISC-V-Convert-CSR-dwarf-numbers-to-gdb-register-num.patch 1.2 KB

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  1. From 7f2e74524afaeef6ad75cc0205406ef479173bd8 Mon Sep 17 00:00:00 2001
  2. From: Hsiangkai Wang <kai.wang@sifive.com>
  3. Date: Fri, 21 Aug 2020 16:10:16 +0800
  4. Subject: [PATCH 23/48] RISC-V: Convert CSR dwarf numbers to gdb register
  5. numbers.
  6. ---
  7. gdb/riscv-tdep.c | 3 +++
  8. gdb/riscv-tdep.h | 2 ++
  9. 2 files changed, 5 insertions(+)
  10. diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
  11. index b86ba63054..7f0c14d0ba 100644
  12. --- a/gdb/riscv-tdep.c
  13. +++ b/gdb/riscv-tdep.c
  14. @@ -3150,6 +3150,9 @@ riscv_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
  15. else if (reg < RISCV_DWARF_REGNUM_F31)
  16. return RISCV_FIRST_FP_REGNUM + (reg - RISCV_DWARF_REGNUM_F0);
  17. + else if (RISCV_DWARF_REGNUM_CSR_BEGIN <= reg && reg <= RISCV_DWARF_REGNUM_CSR_END)
  18. + return RISCV_FIRST_CSR_REGNUM + (reg - RISCV_DWARF_REGNUM_CSR_BEGIN);
  19. +
  20. return -1;
  21. }
  22. diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
  23. index 0ff555b063..fc5adedad3 100644
  24. --- a/gdb/riscv-tdep.h
  25. +++ b/gdb/riscv-tdep.h
  26. @@ -63,6 +63,8 @@ enum
  27. RISCV_DWARF_REGNUM_X31 = 31,
  28. RISCV_DWARF_REGNUM_F0 = 32,
  29. RISCV_DWARF_REGNUM_F31 = 63,
  30. + RISCV_DWARF_REGNUM_CSR_BEGIN = 4096,
  31. + RISCV_DWARF_REGNUM_CSR_END = 8191,
  32. };
  33. /* RISC-V specific per-architecture information. */
  34. --
  35. 2.33.0