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- From 4003a9ae6f2e2cdbd92cb9d85c48ec672228894c Mon Sep 17 00:00:00 2001
- From: Nelson Chu <nelson.chu@sifive.com>
- Date: Thu, 26 Mar 2020 18:38:27 +0800
- Subject: [PATCH 28/48] RISC-V: Support Zfh standard extension for
- half-precision floating-point.
- ---
- bfd/elfxx-riscv.c | 2 +-
- gas/config/tc-riscv.c | 23 +++++-
- gas/testsuite/gas/riscv/fp-zfh-insns.d | 71 ++++++++++++++++
- gas/testsuite/gas/riscv/fp-zfh-insns.s | 68 ++++++++++++++++
- include/opcode/riscv-opc.h | 108 +++++++++++++++++++++++++
- include/opcode/riscv.h | 9 ++-
- opcodes/riscv-opc.c | 65 +++++++++++++++
- 7 files changed, 340 insertions(+), 6 deletions(-)
- create mode 100644 gas/testsuite/gas/riscv/fp-zfh-insns.d
- create mode 100644 gas/testsuite/gas/riscv/fp-zfh-insns.s
- diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
- index f797d28f59..67dbc2e682 100644
- --- a/bfd/elfxx-riscv.c
- +++ b/bfd/elfxx-riscv.c
- @@ -1566,7 +1566,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
-
- static const char * const riscv_std_z_ext_strtab[] =
- {
- - "zicsr", "zifencei",
- + "zicsr", "zifencei", "zfh",
- "zvamo", "zvediv", "zvlsseg", "zvqmac",
- NULL
- };
- diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
- index eca9fabb3f..bb2819db4a 100644
- --- a/gas/config/tc-riscv.c
- +++ b/gas/config/tc-riscv.c
- @@ -229,15 +229,22 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
- case INSN_CLASS_C: return riscv_subset_supports ("c");
- case INSN_CLASS_A: return riscv_subset_supports ("a");
- case INSN_CLASS_M: return riscv_subset_supports ("m");
- +
- case INSN_CLASS_F: return riscv_subset_supports ("f");
- + case INSN_CLASS_F_AND_C:
- + return riscv_subset_supports ("f") && riscv_subset_supports ("c");
- + case INSN_CLASS_F_AND_ZFH:
- + return riscv_subset_supports ("f") && riscv_subset_supports ("zfh");
- +
- case INSN_CLASS_D: return riscv_subset_supports ("d");
- case INSN_CLASS_D_AND_C:
- return riscv_subset_supports ("d") && riscv_subset_supports ("c");
- -
- - case INSN_CLASS_F_AND_C:
- - return riscv_subset_supports ("f") && riscv_subset_supports ("c");
- + case INSN_CLASS_D_AND_ZFH:
- + return riscv_subset_supports ("d") && riscv_subset_supports ("zfh");
-
- case INSN_CLASS_Q: return riscv_subset_supports ("q");
- + case INSN_CLASS_Q_AND_ZFH:
- + return riscv_subset_supports ("q") && riscv_subset_supports ("zfh");
-
- case INSN_CLASS_V: return riscv_subset_supports ("v");
- case INSN_CLASS_V_AND_F:
- @@ -1624,6 +1631,11 @@ macro (struct riscv_cl_insn *ip, expressionS *imm_expr,
- BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_I);
- break;
-
- + case M_FLH:
- + pcrel_load (rd, rs1, imm_expr, "flh",
- + BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_I);
- + break;
- +
- case M_FLW:
- pcrel_load (rd, rs1, imm_expr, "flw",
- BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_I);
- @@ -1654,6 +1666,11 @@ macro (struct riscv_cl_insn *ip, expressionS *imm_expr,
- BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_S);
- break;
-
- + case M_FSH:
- + pcrel_store (rs2, rs1, imm_expr, "fsh",
- + BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_S);
- + break;
- +
- case M_FSW:
- pcrel_store (rs2, rs1, imm_expr, "fsw",
- BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_S);
- diff --git a/gas/testsuite/gas/riscv/fp-zfh-insns.d b/gas/testsuite/gas/riscv/fp-zfh-insns.d
- new file mode 100644
- index 0000000000..e6c0ac502e
- --- /dev/null
- +++ b/gas/testsuite/gas/riscv/fp-zfh-insns.d
- @@ -0,0 +1,71 @@
- +#as: -march=rv64ifdq_zfh
- +#source: fp-zfh-insns.s
- +#objdump: -dr
- +
- +.*:[ ]+file format .*
- +
- +
- +Disassembly of section .text:
- +
- +0+000 <.text>:
- +[ ]+[0-9a-f]+:[ ]+00059507[ ]+flh[ ]+fa0,0\(a1\)
- +[ ]+[0-9a-f]+:[ ]+00a59027[ ]+fsh[ ]+fa0,0\(a1\)
- +[ ]+[0-9a-f]+:[ ]+24b58553[ ]+fmv.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+24b59553[ ]+fneg.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+24b5a553[ ]+fabs.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+24c58553[ ]+fsgnj.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+24c59553[ ]+fsgnjn.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+24c5a553[ ]+fsgnjx.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+04c5f553[ ]+fadd.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+04c58553[ ]+fadd.h[ ]+fa0,fa1,fa2,rne
- +[ ]+[0-9a-f]+:[ ]+0cc5f553[ ]+fsub.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+0cc58553[ ]+fsub.h[ ]+fa0,fa1,fa2,rne
- +[ ]+[0-9a-f]+:[ ]+14c5f553[ ]+fmul.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+14c58553[ ]+fmul.h[ ]+fa0,fa1,fa2,rne
- +[ ]+[0-9a-f]+:[ ]+1cc5f553[ ]+fdiv.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+1cc58553[ ]+fdiv.h[ ]+fa0,fa1,fa2,rne
- +[ ]+[0-9a-f]+:[ ]+5c05f553[ ]+fsqrt.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+5c058553[ ]+fsqrt.h[ ]+fa0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+2cc58553[ ]+fmin.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+2cc59553[ ]+fmax.h[ ]+fa0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+6cc5f543[ ]+fmadd.h[ ]+fa0,fa1,fa2,fa3
- +[ ]+[0-9a-f]+:[ ]+6cc58543[ ]+fmadd.h[ ]+fa0,fa1,fa2,fa3,rne
- +[ ]+[0-9a-f]+:[ ]+6cc5f54f[ ]+fnmadd.h[ ]+fa0,fa1,fa2,fa3
- +[ ]+[0-9a-f]+:[ ]+6cc5854f[ ]+fnmadd.h[ ]+fa0,fa1,fa2,fa3,rne
- +[ ]+[0-9a-f]+:[ ]+6cc5f547[ ]+fmsub.h[ ]+fa0,fa1,fa2,fa3
- +[ ]+[0-9a-f]+:[ ]+6cc58547[ ]+fmsub.h[ ]+fa0,fa1,fa2,fa3,rne
- +[ ]+[0-9a-f]+:[ ]+6cc5f54b[ ]+fnmsub.h[ ]+fa0,fa1,fa2,fa3
- +[ ]+[0-9a-f]+:[ ]+6cc5854b[ ]+fnmsub.h[ ]+fa0,fa1,fa2,fa3,rne
- +[ ]+[0-9a-f]+:[ ]+c405f553[ ]+fcvt.w.h[ ]+a0,fa1
- +[ ]+[0-9a-f]+:[ ]+c4058553[ ]+fcvt.w.h[ ]+a0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+c415f553[ ]+fcvt.wu.h[ ]+a0,fa1
- +[ ]+[0-9a-f]+:[ ]+c4158553[ ]+fcvt.wu.h[ ]+a0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+d405f553[ ]+fcvt.h.w[ ]+fa0,a1
- +[ ]+[0-9a-f]+:[ ]+d4058553[ ]+fcvt.h.w[ ]+fa0,a1,rne
- +[ ]+[0-9a-f]+:[ ]+d415f553[ ]+fcvt.h.wu[ ]+fa0,a1
- +[ ]+[0-9a-f]+:[ ]+d4158553[ ]+fcvt.h.wu[ ]+fa0,a1,rne
- +[ ]+[0-9a-f]+:[ ]+c425f553[ ]+fcvt.l.h[ ]+a0,fa1
- +[ ]+[0-9a-f]+:[ ]+c4258553[ ]+fcvt.l.h[ ]+a0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+c435f553[ ]+fcvt.lu.h[ ]+a0,fa1
- +[ ]+[0-9a-f]+:[ ]+c4358553[ ]+fcvt.lu.h[ ]+a0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+d425f553[ ]+fcvt.h.l[ ]+fa0,a1
- +[ ]+[0-9a-f]+:[ ]+d4258553[ ]+fcvt.h.l[ ]+fa0,a1,rne
- +[ ]+[0-9a-f]+:[ ]+d435f553[ ]+fcvt.h.lu[ ]+fa0,a1
- +[ ]+[0-9a-f]+:[ ]+d4358553[ ]+fcvt.h.lu[ ]+fa0,a1,rne
- +[ ]+[0-9a-f]+:[ ]+e4058553[ ]+fmv.x.h[ ]+a0,fa1
- +[ ]+[0-9a-f]+:[ ]+f4058553[ ]+fmv.h.x[ ]+fa0,a1
- +[ ]+[0-9a-f]+:[ ]+40258553[ ]+fcvt.s.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+42258553[ ]+fcvt.d.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+46358553[ ]+fcvt.q.h[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+4405f553[ ]+fcvt.h.s[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+44058553[ ]+fcvt.h.s[ ]+fa0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+4415f553[ ]+fcvt.h.d[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+44158553[ ]+fcvt.h.d[ ]+fa0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+4425f553[ ]+fcvt.h.q[ ]+fa0,fa1
- +[ ]+[0-9a-f]+:[ ]+44258553[ ]+fcvt.h.q[ ]+fa0,fa1,rne
- +[ ]+[0-9a-f]+:[ ]+e4059553[ ]+fclass.h[ ]+a0,fa1
- +[ ]+[0-9a-f]+:[ ]+a4c5a553[ ]+feq.h[ ]+a0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+a4c59553[ ]+flt.h[ ]+a0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+a4c58553[ ]+fle.h[ ]+a0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+a4c59553[ ]+flt.h[ ]+a0,fa1,fa2
- +[ ]+[0-9a-f]+:[ ]+a4c58553[ ]+fle.h[ ]+a0,fa1,fa2
- diff --git a/gas/testsuite/gas/riscv/fp-zfh-insns.s b/gas/testsuite/gas/riscv/fp-zfh-insns.s
- new file mode 100644
- index 0000000000..1a04cc6400
- --- /dev/null
- +++ b/gas/testsuite/gas/riscv/fp-zfh-insns.s
- @@ -0,0 +1,68 @@
- + flh fa0, 0(a1)
- + fsh fa0, 0(a1)
- +
- + fmv.h fa0, fa1
- + fneg.h fa0, fa1
- + fabs.h fa0, fa1
- + fsgnj.h fa0, fa1, fa2
- + fsgnjn.h fa0, fa1, fa2
- + fsgnjx.h fa0, fa1, fa2
- +
- + fadd.h fa0, fa1, fa2
- + fadd.h fa0, fa1, fa2, rne
- + fsub.h fa0, fa1, fa2
- + fsub.h fa0, fa1, fa2, rne
- + fmul.h fa0, fa1, fa2
- + fmul.h fa0, fa1, fa2, rne
- + fdiv.h fa0, fa1, fa2
- + fdiv.h fa0, fa1, fa2, rne
- + fsqrt.h fa0, fa1
- + fsqrt.h fa0, fa1, rne
- + fmin.h fa0, fa1, fa2
- + fmax.h fa0, fa1, fa2
- +
- + fmadd.h fa0, fa1, fa2, fa3
- + fmadd.h fa0, fa1, fa2, fa3, rne
- + fnmadd.h fa0, fa1, fa2, fa3
- + fnmadd.h fa0, fa1, fa2, fa3, rne
- + fmsub.h fa0, fa1, fa2, fa3
- + fmsub.h fa0, fa1, fa2, fa3, rne
- + fnmsub.h fa0, fa1, fa2, fa3
- + fnmsub.h fa0, fa1, fa2, fa3, rne
- +
- + fcvt.w.h a0, fa1
- + fcvt.w.h a0, fa1, rne
- + fcvt.wu.h a0, fa1
- + fcvt.wu.h a0, fa1, rne
- + fcvt.h.w fa0, a1
- + fcvt.h.w fa0, a1, rne
- + fcvt.h.wu fa0, a1
- + fcvt.h.wu fa0, a1, rne
- + fcvt.l.h a0, fa1
- + fcvt.l.h a0, fa1, rne
- + fcvt.lu.h a0, fa1
- + fcvt.lu.h a0, fa1, rne
- + fcvt.h.l fa0, a1
- + fcvt.h.l fa0, a1, rne
- + fcvt.h.lu fa0, a1
- + fcvt.h.lu fa0, a1, rne
- +
- + fmv.x.h a0, fa1
- + fmv.h.x fa0, a1
- +
- + fcvt.s.h fa0, fa1
- + fcvt.d.h fa0, fa1
- + fcvt.q.h fa0, fa1
- + fcvt.h.s fa0, fa1
- + fcvt.h.s fa0, fa1, rne
- + fcvt.h.d fa0, fa1
- + fcvt.h.d fa0, fa1, rne
- + fcvt.h.q fa0, fa1
- + fcvt.h.q fa0, fa1, rne
- + fclass.h a0, fa1
- +
- + feq.h a0, fa1, fa2
- + flt.h a0, fa1, fa2
- + fle.h a0, fa1, fa2
- + fgt.h a0, fa2, fa1
- + fge.h a0, fa2, fa1
- diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
- index cd1395a010..743060ca18 100644
- --- a/include/opcode/riscv-opc.h
- +++ b/include/opcode/riscv-opc.h
- @@ -309,6 +309,38 @@
- #define MASK_FCVT_D_S 0xfff0007f
- #define MATCH_FSQRT_D 0x5a000053
- #define MASK_FSQRT_D 0xfff0007f
- +#define MATCH_FADD_H 0x4000053
- +#define MASK_FADD_H 0xfe00007f
- +#define MATCH_FSUB_H 0xc000053
- +#define MASK_FSUB_H 0xfe00007f
- +#define MATCH_FMUL_H 0x14000053
- +#define MASK_FMUL_H 0xfe00007f
- +#define MATCH_FDIV_H 0x1c000053
- +#define MASK_FDIV_H 0xfe00007f
- +#define MATCH_FSGNJ_H 0x24000053
- +#define MASK_FSGNJ_H 0xfe00707f
- +#define MATCH_FSGNJN_H 0x24001053
- +#define MASK_FSGNJN_H 0xfe00707f
- +#define MATCH_FSGNJX_H 0x24002053
- +#define MASK_FSGNJX_H 0xfe00707f
- +#define MATCH_FMIN_H 0x2c000053
- +#define MASK_FMIN_H 0xfe00707f
- +#define MATCH_FMAX_H 0x2c001053
- +#define MASK_FMAX_H 0xfe00707f
- +#define MATCH_FCVT_S_H 0x40200053
- +#define MASK_FCVT_S_H 0xfff0007f
- +#define MATCH_FCVT_H_S 0x44000053
- +#define MASK_FCVT_H_S 0xfff0007f
- +#define MATCH_FCVT_D_H 0x42200053
- +#define MASK_FCVT_D_H 0xfff0007f
- +#define MATCH_FCVT_H_D 0x44100053
- +#define MASK_FCVT_H_D 0xfff0007f
- +#define MATCH_FCVT_Q_H 0x46300053
- +#define MASK_FCVT_Q_H 0xfff0007f
- +#define MATCH_FCVT_H_Q 0x44200053
- +#define MASK_FCVT_H_Q 0xfff0007f
- +#define MATCH_FSQRT_H 0x5c000053
- +#define MASK_FSQRT_H 0xfff0007f
- #define MATCH_FADD_Q 0x6000053
- #define MASK_FADD_Q 0xfe00007f
- #define MATCH_FSUB_Q 0xe000053
- @@ -349,6 +381,12 @@
- #define MASK_FLT_D 0xfe00707f
- #define MATCH_FEQ_D 0xa2002053
- #define MASK_FEQ_D 0xfe00707f
- +#define MATCH_FLE_H 0xa4000053
- +#define MASK_FLE_H 0xfe00707f
- +#define MATCH_FLT_H 0xa4001053
- +#define MASK_FLT_H 0xfe00707f
- +#define MATCH_FEQ_H 0xa4002053
- +#define MASK_FEQ_H 0xfe00707f
- #define MATCH_FLE_Q 0xa6000053
- #define MASK_FLE_Q 0xfe00707f
- #define MATCH_FLT_Q 0xa6001053
- @@ -379,6 +417,18 @@
- #define MASK_FMV_X_D 0xfff0707f
- #define MATCH_FCLASS_D 0xe2001053
- #define MASK_FCLASS_D 0xfff0707f
- +#define MATCH_FCVT_W_H 0xc4000053
- +#define MASK_FCVT_W_H 0xfff0007f
- +#define MATCH_FCVT_WU_H 0xc4100053
- +#define MASK_FCVT_WU_H 0xfff0007f
- +#define MATCH_FCVT_L_H 0xc4200053
- +#define MASK_FCVT_L_H 0xfff0007f
- +#define MATCH_FCVT_LU_H 0xc4300053
- +#define MASK_FCVT_LU_H 0xfff0007f
- +#define MATCH_FMV_X_H 0xe4000053
- +#define MASK_FMV_X_H 0xfff0707f
- +#define MATCH_FCLASS_H 0xe4001053
- +#define MASK_FCLASS_H 0xfff0707f
- #define MATCH_FCVT_W_Q 0xc6000053
- #define MASK_FCVT_W_Q 0xfff0007f
- #define MATCH_FCVT_WU_Q 0xc6100053
- @@ -411,6 +461,16 @@
- #define MASK_FCVT_D_LU 0xfff0007f
- #define MATCH_FMV_D_X 0xf2000053
- #define MASK_FMV_D_X 0xfff0707f
- +#define MATCH_FCVT_H_W 0xd4000053
- +#define MASK_FCVT_H_W 0xfff0007f
- +#define MATCH_FCVT_H_WU 0xd4100053
- +#define MASK_FCVT_H_WU 0xfff0007f
- +#define MATCH_FCVT_H_L 0xd4200053
- +#define MASK_FCVT_H_L 0xfff0007f
- +#define MATCH_FCVT_H_LU 0xd4300053
- +#define MASK_FCVT_H_LU 0xfff0007f
- +#define MATCH_FMV_H_X 0xf4000053
- +#define MASK_FMV_H_X 0xfff0707f
- #define MATCH_FCVT_Q_W 0xd6000053
- #define MASK_FCVT_Q_W 0xfff0007f
- #define MATCH_FCVT_Q_WU 0xd6100053
- @@ -421,12 +481,16 @@
- #define MASK_FCVT_Q_LU 0xfff0007f
- #define MATCH_FMV_Q_X 0xf6000053
- #define MASK_FMV_Q_X 0xfff0707f
- +#define MATCH_FLH 0x1007
- +#define MASK_FLH 0x707f
- #define MATCH_FLW 0x2007
- #define MASK_FLW 0x707f
- #define MATCH_FLD 0x3007
- #define MASK_FLD 0x707f
- #define MATCH_FLQ 0x4007
- #define MASK_FLQ 0x707f
- +#define MATCH_FSH 0x1027
- +#define MASK_FSH 0x707f
- #define MATCH_FSW 0x2027
- #define MASK_FSW 0x707f
- #define MATCH_FSD 0x3027
- @@ -449,6 +513,14 @@
- #define MASK_FNMSUB_D 0x600007f
- #define MATCH_FNMADD_D 0x200004f
- #define MASK_FNMADD_D 0x600007f
- +#define MATCH_FMADD_H 0x4000043
- +#define MASK_FMADD_H 0x600007f
- +#define MATCH_FMSUB_H 0x4000047
- +#define MASK_FMSUB_H 0x600007f
- +#define MATCH_FNMSUB_H 0x400004b
- +#define MASK_FNMSUB_H 0x600007f
- +#define MATCH_FNMADD_H 0x400004f
- +#define MASK_FNMADD_H 0x600007f
- #define MATCH_FMADD_Q 0x6000043
- #define MASK_FMADD_Q 0x600007f
- #define MATCH_FMSUB_Q 0x6000047
- @@ -3177,6 +3249,22 @@ DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D)
- DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D)
- DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S)
- DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
- +DECLARE_INSN(fadd_h, MATCH_FADD_H, MASK_FADD_H)
- +DECLARE_INSN(fsub_h, MATCH_FSUB_D, MASK_FSUB_H)
- +DECLARE_INSN(fmul_h, MATCH_FMUL_D, MASK_FMUL_H)
- +DECLARE_INSN(fdiv_h, MATCH_FDIV_D, MASK_FDIV_H)
- +DECLARE_INSN(fsgnj_h, MATCH_FSGNJ_D, MASK_FSGNJ_H)
- +DECLARE_INSN(fsgnjn_h, MATCH_FSGNJN_D, MASK_FSGNJN_H)
- +DECLARE_INSN(fsgnjx_h, MATCH_FSGNJX_D, MASK_FSGNJX_H)
- +DECLARE_INSN(fmin_h, MATCH_FMIN_D, MASK_FMIN_H)
- +DECLARE_INSN(fmax_h, MATCH_FMAX_D, MASK_FMAX_H)
- +DECLARE_INSN(fcvt_s_h, MATCH_FCVT_S_D, MASK_FCVT_S_H)
- +DECLARE_INSN(fcvt_h_s, MATCH_FCVT_H_S, MASK_FCVT_H_S)
- +DECLARE_INSN(fcvt_d_h, MATCH_FCVT_D_H, MASK_FCVT_D_H)
- +DECLARE_INSN(fcvt_h_d, MATCH_FCVT_H_D, MASK_FCVT_H_D)
- +DECLARE_INSN(fcvt_q_h, MATCH_FCVT_Q_H, MASK_FCVT_Q_H)
- +DECLARE_INSN(fcvt_h_q, MATCH_FCVT_H_Q, MASK_FCVT_H_Q)
- +DECLARE_INSN(fsqrt_h, MATCH_FSQRT_H, MASK_FSQRT_H)
- DECLARE_INSN(fadd_q, MATCH_FADD_Q, MASK_FADD_Q)
- DECLARE_INSN(fsub_q, MATCH_FSUB_Q, MASK_FSUB_Q)
- DECLARE_INSN(fmul_q, MATCH_FMUL_Q, MASK_FMUL_Q)
- @@ -3197,6 +3285,9 @@ DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S)
- DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D)
- DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D)
- DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D)
- +DECLARE_INSN(fle_h, MATCH_FLE_H, MASK_FLE_H)
- +DECLARE_INSN(flt_h, MATCH_FLT_H, MASK_FLT_H)
- +DECLARE_INSN(feq_h, MATCH_FEQ_H, MASK_FEQ_H)
- DECLARE_INSN(fle_q, MATCH_FLE_Q, MASK_FLE_Q)
- DECLARE_INSN(flt_q, MATCH_FLT_Q, MASK_FLT_Q)
- DECLARE_INSN(feq_q, MATCH_FEQ_Q, MASK_FEQ_Q)
- @@ -3212,6 +3303,12 @@ DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D)
- DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D)
- DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D)
- DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
- +DECLARE_INSN(fcvt_w_h, MATCH_FCVT_W_H, MASK_FCVT_W_H)
- +DECLARE_INSN(fcvt_wu_h, MATCH_FCVT_WU_H, MASK_FCVT_WU_H)
- +DECLARE_INSN(fcvt_l_h, MATCH_FCVT_L_H, MASK_FCVT_L_H)
- +DECLARE_INSN(fcvt_lu_h, MATCH_FCVT_LU_H, MASK_FCVT_LU_H)
- +DECLARE_INSN(fmv_x_h, MATCH_FMV_X_H, MASK_FMV_X_H)
- +DECLARE_INSN(fclass_h, MATCH_FCLASS_H, MASK_FCLASS_H)
- DECLARE_INSN(fcvt_w_q, MATCH_FCVT_W_Q, MASK_FCVT_W_Q)
- DECLARE_INSN(fcvt_wu_q, MATCH_FCVT_WU_Q, MASK_FCVT_WU_Q)
- DECLARE_INSN(fcvt_l_q, MATCH_FCVT_L_Q, MASK_FCVT_L_Q)
- @@ -3228,14 +3325,21 @@ DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
- DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
- DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU)
- DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X)
- +DECLARE_INSN(fcvt_h_w, MATCH_FCVT_H_W, MASK_FCVT_H_W)
- +DECLARE_INSN(fcvt_h_wu, MATCH_FCVT_H_WU, MASK_FCVT_H_WU)
- +DECLARE_INSN(fcvt_h_l, MATCH_FCVT_H_L, MASK_FCVT_H_L)
- +DECLARE_INSN(fcvt_h_lu, MATCH_FCVT_H_LU, MASK_FCVT_H_LU)
- +DECLARE_INSN(fmv_h_x, MATCH_FMV_H_X, MASK_FMV_H_X)
- DECLARE_INSN(fcvt_q_w, MATCH_FCVT_Q_W, MASK_FCVT_Q_W)
- DECLARE_INSN(fcvt_q_wu, MATCH_FCVT_Q_WU, MASK_FCVT_Q_WU)
- DECLARE_INSN(fcvt_q_l, MATCH_FCVT_Q_L, MASK_FCVT_Q_L)
- DECLARE_INSN(fcvt_q_lu, MATCH_FCVT_Q_LU, MASK_FCVT_Q_LU)
- DECLARE_INSN(fmv_q_x, MATCH_FMV_Q_X, MASK_FMV_Q_X)
- +DECLARE_INSN(flh, MATCH_FLH, MASK_FLH)
- DECLARE_INSN(flw, MATCH_FLW, MASK_FLW)
- DECLARE_INSN(fld, MATCH_FLD, MASK_FLD)
- DECLARE_INSN(flq, MATCH_FLQ, MASK_FLQ)
- +DECLARE_INSN(fsh, MATCH_FSH, MASK_FSH)
- DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
- DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD)
- DECLARE_INSN(fsq, MATCH_FSQ, MASK_FSQ)
- @@ -3247,6 +3351,10 @@ DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D)
- DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D)
- DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D)
- DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D)
- +DECLARE_INSN(fmadd_h, MATCH_FMADD_H, MASK_FMADD_H)
- +DECLARE_INSN(fmsub_h, MATCH_FMSUB_H, MASK_FMSUB_H)
- +DECLARE_INSN(fnmsub_h, MATCH_FNMSUB_H, MASK_FNMSUB_H)
- +DECLARE_INSN(fnmadd_h, MATCH_FNMADD_H, MASK_FNMADD_H)
- DECLARE_INSN(fmadd_q, MATCH_FMADD_Q, MASK_FMADD_Q)
- DECLARE_INSN(fmsub_q, MATCH_FMSUB_Q, MASK_FMSUB_Q)
- DECLARE_INSN(fnmsub_q, MATCH_FNMSUB_Q, MASK_FNMSUB_Q)
- diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
- index 5fd18beb88..31bdcf95a9 100644
- --- a/include/opcode/riscv.h
- +++ b/include/opcode/riscv.h
- @@ -378,10 +378,13 @@ enum riscv_insn_class
- INSN_CLASS_M,
- INSN_CLASS_F,
- INSN_CLASS_D,
- - INSN_CLASS_D_AND_C,
- - INSN_CLASS_F_AND_C,
- INSN_CLASS_Q,
- INSN_CLASS_V,
- + INSN_CLASS_F_AND_C,
- + INSN_CLASS_F_AND_ZFH,
- + INSN_CLASS_D_AND_C,
- + INSN_CLASS_D_AND_ZFH,
- + INSN_CLASS_Q_AND_ZFH,
- INSN_CLASS_V_AND_F,
- INSN_CLASS_V_OR_ZVAMO,
- INSN_CLASS_V_AND_ZVEDIV,
- @@ -551,9 +554,11 @@ enum
- M_SH,
- M_SW,
- M_SD,
- + M_FLH,
- M_FLW,
- M_FLD,
- M_FLQ,
- + M_FSH,
- M_FSW,
- M_FSD,
- M_FSQ,
- diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
- index 7499abb7a6..89593ef979 100644
- --- a/opcodes/riscv-opc.c
- +++ b/opcodes/riscv-opc.c
- @@ -898,6 +898,71 @@ const struct riscv_opcode riscv_opcodes[] =
- {"remw", 64, INSN_CLASS_M, "d,s,t", MATCH_REMW, MASK_REMW, match_opcode, 0 },
- {"remuw", 64, INSN_CLASS_M, "d,s,t", MATCH_REMUW, MASK_REMUW, match_opcode, 0 },
-
- +/* Half-precision floating-point instruction subset */
- +{"flh", 0, INSN_CLASS_F_AND_ZFH, "D,o(s)", MATCH_FLH, MASK_FLH, match_opcode, INSN_DREF|INSN_2_BYTE },
- +{"flh", 0, INSN_CLASS_F_AND_ZFH, "D,A,s", 0, (int) M_FLH, match_never, INSN_MACRO },
- +{"fsh", 0, INSN_CLASS_F_AND_ZFH, "T,q(s)", MATCH_FSH, MASK_FSH, match_opcode, INSN_DREF|INSN_2_BYTE },
- +{"fsh", 0, INSN_CLASS_F_AND_ZFH, "T,A,s", 0, (int) M_FSH, match_never, INSN_MACRO },
- +{"fmv.h", 0, INSN_CLASS_F_AND_ZFH, "D,U", MATCH_FSGNJ_H, MASK_FSGNJ_H, match_rs1_eq_rs2, INSN_ALIAS },
- +{"fneg.h", 0, INSN_CLASS_F_AND_ZFH, "D,U", MATCH_FSGNJN_H, MASK_FSGNJN_H, match_rs1_eq_rs2, INSN_ALIAS },
- +{"fabs.h", 0, INSN_CLASS_F_AND_ZFH, "D,U", MATCH_FSGNJX_H, MASK_FSGNJX_H, match_rs1_eq_rs2, INSN_ALIAS },
- +{"fsgnj.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FSGNJ_H, MASK_FSGNJ_H, match_opcode, 0 },
- +{"fsgnjn.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FSGNJN_H, MASK_FSGNJN_H, match_opcode, 0 },
- +{"fsgnjx.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FSGNJX_H, MASK_FSGNJX_H, match_opcode, 0 },
- +{"fadd.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FADD_H | MASK_RM, MASK_FADD_H | MASK_RM, match_opcode, 0 },
- +{"fadd.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,m", MATCH_FADD_H, MASK_FADD_H, match_opcode, 0 },
- +{"fsub.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FSUB_H | MASK_RM, MASK_FSUB_H | MASK_RM, match_opcode, 0 },
- +{"fsub.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,m", MATCH_FSUB_H, MASK_FSUB_H, match_opcode, 0 },
- +{"fmul.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FMUL_H | MASK_RM, MASK_FMUL_H | MASK_RM, match_opcode, 0 },
- +{"fmul.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,m", MATCH_FMUL_H, MASK_FMUL_H, match_opcode, 0 },
- +{"fdiv.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FDIV_H | MASK_RM, MASK_FDIV_H | MASK_RM, match_opcode, 0 },
- +{"fdiv.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,m", MATCH_FDIV_H, MASK_FDIV_H, match_opcode, 0 },
- +{"fsqrt.h", 0, INSN_CLASS_F_AND_ZFH, "D,S", MATCH_FSQRT_H | MASK_RM, MASK_FSQRT_H | MASK_RM, match_opcode, 0 },
- +{"fsqrt.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,m", MATCH_FSQRT_H, MASK_FSQRT_H, match_opcode, 0 },
- +{"fmin.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FMIN_H, MASK_FMIN_H, match_opcode, 0 },
- +{"fmax.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T", MATCH_FMAX_H, MASK_FMAX_H, match_opcode, 0 },
- +{"fmadd.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R", MATCH_FMADD_H | MASK_RM, MASK_FMADD_H | MASK_RM, match_opcode, 0 },
- +{"fmadd.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R,m", MATCH_FMADD_H, MASK_FMADD_H, match_opcode, 0 },
- +{"fnmadd.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R", MATCH_FNMADD_H | MASK_RM, MASK_FNMADD_H | MASK_RM, match_opcode, 0 },
- +{"fnmadd.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R,m", MATCH_FNMADD_H, MASK_FNMADD_H, match_opcode, 0 },
- +{"fmsub.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R", MATCH_FMSUB_H | MASK_RM, MASK_FMSUB_H | MASK_RM, match_opcode, 0 },
- +{"fmsub.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R,m", MATCH_FMSUB_H, MASK_FMSUB_H, match_opcode, 0 },
- +{"fnmsub.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R", MATCH_FNMSUB_H | MASK_RM, MASK_FNMSUB_H | MASK_RM, match_opcode, 0 },
- +{"fnmsub.h", 0, INSN_CLASS_F_AND_ZFH, "D,S,T,R,m", MATCH_FNMSUB_H, MASK_FNMSUB_H, match_opcode, 0 },
- +{"fcvt.w.h", 0, INSN_CLASS_F_AND_ZFH, "d,S", MATCH_FCVT_W_H | MASK_RM, MASK_FCVT_W_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.w.h", 0, INSN_CLASS_F_AND_ZFH, "d,S,m", MATCH_FCVT_W_H, MASK_FCVT_W_H, match_opcode, 0 },
- +{"fcvt.wu.h", 0, INSN_CLASS_F_AND_ZFH, "d,S", MATCH_FCVT_WU_H | MASK_RM, MASK_FCVT_WU_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.wu.h", 0, INSN_CLASS_F_AND_ZFH, "d,S,m", MATCH_FCVT_WU_H, MASK_FCVT_WU_H, match_opcode, 0 },
- +{"fcvt.h.w", 0, INSN_CLASS_F_AND_ZFH, "D,s", MATCH_FCVT_H_W | MASK_RM, MASK_FCVT_H_W | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.w", 0, INSN_CLASS_F_AND_ZFH, "D,s,m", MATCH_FCVT_H_W, MASK_FCVT_H_W, match_opcode, 0 },
- +{"fcvt.h.wu", 0, INSN_CLASS_F_AND_ZFH, "D,s", MATCH_FCVT_H_WU | MASK_RM, MASK_FCVT_H_WU | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.wu", 0, INSN_CLASS_F_AND_ZFH, "D,s,m", MATCH_FCVT_H_WU, MASK_FCVT_H_WU, match_opcode, 0 },
- +{"fcvt.s.h", 0, INSN_CLASS_F_AND_ZFH, "D,S", MATCH_FCVT_S_H, MASK_FCVT_S_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.d.h", 0, INSN_CLASS_D_AND_ZFH, "D,S", MATCH_FCVT_D_H, MASK_FCVT_D_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.q.h", 0, INSN_CLASS_Q_AND_ZFH, "D,S", MATCH_FCVT_Q_H, MASK_FCVT_Q_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.s", 0, INSN_CLASS_F_AND_ZFH, "D,S", MATCH_FCVT_H_S | MASK_RM, MASK_FCVT_H_S | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.s", 0, INSN_CLASS_F_AND_ZFH, "D,S,m", MATCH_FCVT_H_S, MASK_FCVT_H_S, match_opcode, 0 },
- +{"fcvt.h.d", 0, INSN_CLASS_D_AND_ZFH, "D,S", MATCH_FCVT_H_D | MASK_RM, MASK_FCVT_H_D | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.d", 0, INSN_CLASS_D_AND_ZFH, "D,S,m", MATCH_FCVT_H_D, MASK_FCVT_H_D, match_opcode, 0 },
- +{"fcvt.h.q", 0, INSN_CLASS_Q_AND_ZFH, "D,S", MATCH_FCVT_H_Q | MASK_RM, MASK_FCVT_H_Q | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.q", 0, INSN_CLASS_Q_AND_ZFH, "D,S,m", MATCH_FCVT_H_Q, MASK_FCVT_H_Q, match_opcode, 0 },
- +{"fclass.h", 0, INSN_CLASS_F_AND_ZFH, "d,S", MATCH_FCLASS_H, MASK_FCLASS_H, match_opcode, 0 },
- +{"feq.h", 0, INSN_CLASS_F_AND_ZFH, "d,S,T", MATCH_FEQ_H, MASK_FEQ_H, match_opcode, 0 },
- +{"flt.h", 0, INSN_CLASS_F_AND_ZFH, "d,S,T", MATCH_FLT_H, MASK_FLT_H, match_opcode, 0 },
- +{"fle.h", 0, INSN_CLASS_F_AND_ZFH, "d,S,T", MATCH_FLE_H, MASK_FLE_H, match_opcode, 0 },
- +{"fgt.h", 0, INSN_CLASS_F_AND_ZFH, "d,T,S", MATCH_FLT_H, MASK_FLT_H, match_opcode, 0 },
- +{"fge.h", 0, INSN_CLASS_F_AND_ZFH, "d,T,S", MATCH_FLE_H, MASK_FLE_H, match_opcode, 0 },
- +{"fmv.x.h", 0, INSN_CLASS_F_AND_ZFH, "d,S", MATCH_FMV_X_H, MASK_FMV_X_H, match_opcode, 0 },
- +{"fmv.h.x", 0, INSN_CLASS_F_AND_ZFH, "D,s", MATCH_FMV_H_X, MASK_FMV_H_X, match_opcode, 0 },
- +{"fcvt.l.h", 64, INSN_CLASS_F_AND_ZFH, "d,S", MATCH_FCVT_L_H | MASK_RM, MASK_FCVT_L_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.l.h", 64, INSN_CLASS_F_AND_ZFH, "d,S,m", MATCH_FCVT_L_H, MASK_FCVT_L_H, match_opcode, 0 },
- +{"fcvt.lu.h", 64, INSN_CLASS_F_AND_ZFH, "d,S", MATCH_FCVT_LU_H | MASK_RM, MASK_FCVT_LU_H | MASK_RM, match_opcode, 0 },
- +{"fcvt.lu.h", 64, INSN_CLASS_F_AND_ZFH, "d,S,m", MATCH_FCVT_LU_H, MASK_FCVT_LU_H, match_opcode, 0 },
- +{"fcvt.h.l", 64, INSN_CLASS_F_AND_ZFH, "D,s", MATCH_FCVT_H_L | MASK_RM, MASK_FCVT_H_L | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.l", 64, INSN_CLASS_F_AND_ZFH, "D,s,m", MATCH_FCVT_H_L, MASK_FCVT_H_L, match_opcode, 0 },
- +{"fcvt.h.lu", 64, INSN_CLASS_F_AND_ZFH, "D,s", MATCH_FCVT_H_LU | MASK_RM, MASK_FCVT_H_L | MASK_RM, match_opcode, 0 },
- +{"fcvt.h.lu", 64, INSN_CLASS_F_AND_ZFH, "D,s,m", MATCH_FCVT_H_LU, MASK_FCVT_H_LU, match_opcode, 0 },
- +
- /* Single-precision floating-point instruction subset */
- {"frcsr", 0, INSN_CLASS_F, "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, INSN_ALIAS },
- {"frsr", 0, INSN_CLASS_F, "d", MATCH_FRCSR, MASK_FRCSR, match_opcode, INSN_ALIAS },
- --
- 2.33.0
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