0020-Added-vrgatherei16-instruction.patch 5.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127
  1. From 2e29338cd430f94e7504a96804f0a75112279992 Mon Sep 17 00:00:00 2001
  2. From: Nelson Chu <nelson.chu@sifive.com>
  3. Date: Mon, 20 Jul 2020 10:43:00 +0800
  4. Subject: [PATCH 20/48] Added vrgatherei16 instruction.
  5. ---
  6. gas/testsuite/gas/riscv/vector-insns-fail-06.l | 3 +++
  7. gas/testsuite/gas/riscv/vector-insns-fail-06.s | 6 ++++++
  8. gas/testsuite/gas/riscv/vector-insns.d | 2 ++
  9. gas/testsuite/gas/riscv/vector-insns.s | 3 +++
  10. include/opcode/riscv-opc.h | 16 +++++++++-------
  11. opcodes/riscv-opc.c | 7 ++++---
  12. 6 files changed, 27 insertions(+), 10 deletions(-)
  13. diff --git a/gas/testsuite/gas/riscv/vector-insns-fail-06.l b/gas/testsuite/gas/riscv/vector-insns-fail-06.l
  14. index 9a86dd37b5..4c540eb272 100644
  15. --- a/gas/testsuite/gas/riscv/vector-insns-fail-06.l
  16. +++ b/gas/testsuite/gas/riscv/vector-insns-fail-06.l
  17. @@ -12,6 +12,9 @@
  18. .*Error: illegal operands `vrgather.vx v0,v2,a4,v0.t'
  19. .*Error: illegal operands `vrgather.vi v2,v2,1'
  20. .*Error: illegal operands `vrgather.vi v0,v2,1,v0.t'
  21. +.*Error: illegal operands `vrgatherei16.vv v2,v2,v4'
  22. +.*Error: illegal operands `vrgatherei16.vv v4,v2,v4'
  23. +.*Error: illegal operands `vrgatherei16.vv v0,v2,v4,v0.t'
  24. .*Error: illegal operands `vcompress.vm v2,v2,v4'
  25. .*Error: illegal operands `vcompress.vm v4,v2,v4'
  26. .*Error: illegal operands `vmv2r.v v1,v2'
  27. diff --git a/gas/testsuite/gas/riscv/vector-insns-fail-06.s b/gas/testsuite/gas/riscv/vector-insns-fail-06.s
  28. index df0edd44c9..3a35aadb49 100644
  29. --- a/gas/testsuite/gas/riscv/vector-insns-fail-06.s
  30. +++ b/gas/testsuite/gas/riscv/vector-insns-fail-06.s
  31. @@ -46,6 +46,12 @@
  32. vrgather.vi v2, v2, 1 # vd overlap vs2
  33. vrgather.vi v0, v2, 1, v0.t # vd overlap vm
  34. + vrgatherei16.vv v0, v2, v4 # OK
  35. + vrgatherei16.vv v1, v2, v4 # OK
  36. + vrgatherei16.vv v2, v2, v4 # vd overlap vs2
  37. + vrgatherei16.vv v4, v2, v4 # vd overlap vs1
  38. + vrgatherei16.vv v0, v2, v4, v0.t# vd overlap vm
  39. +
  40. vcompress.vm v0, v2, v4 # OK
  41. vcompress.vm v1, v2, v4 # OK
  42. vcompress.vm v2, v2, v4 # vd overlap vs2
  43. diff --git a/gas/testsuite/gas/riscv/vector-insns.d b/gas/testsuite/gas/riscv/vector-insns.d
  44. index e53d2f3242..8ac80fba1b 100644
  45. --- a/gas/testsuite/gas/riscv/vector-insns.d
  46. +++ b/gas/testsuite/gas/riscv/vector-insns.d
  47. @@ -2417,6 +2417,8 @@ Disassembly of section .text:
  48. [ ]+[0-9a-f]+:[ ]+3085c257[ ]+vrgather.vx[ ]+v4,v8,a1,v0.t
  49. [ ]+[0-9a-f]+:[ ]+30803257[ ]+vrgather.vi[ ]+v4,v8,0,v0.t
  50. [ ]+[0-9a-f]+:[ ]+308fb257[ ]+vrgather.vi[ ]+v4,v8,31,v0.t
  51. +[ ]+[0-9a-f]+:[ ]+3a860257[ ]+vrgatherei16.vv[ ]+v4,v8,v12
  52. +[ ]+[0-9a-f]+:[ ]+38860257[ ]+vrgatherei16.vv[ ]+v4,v8,v12,v0.t
  53. [ ]+[0-9a-f]+:[ ]+5e862257[ ]+vcompress.vm[ ]+v4,v8,v12
  54. [ ]+[0-9a-f]+:[ ]+9e2030d7[ ]+vmv1r.v[ ]+v1,v2
  55. [ ]+[0-9a-f]+:[ ]+9e40b157[ ]+vmv2r.v[ ]+v2,v4
  56. diff --git a/gas/testsuite/gas/riscv/vector-insns.s b/gas/testsuite/gas/riscv/vector-insns.s
  57. index 5046dd3bda..afec58c03b 100644
  58. --- a/gas/testsuite/gas/riscv/vector-insns.s
  59. +++ b/gas/testsuite/gas/riscv/vector-insns.s
  60. @@ -2750,6 +2750,9 @@
  61. vrgather.vi v4, v8, 0, v0.t
  62. vrgather.vi v4, v8, 31, v0.t
  63. + vrgatherei16.vv v4, v8, v12
  64. + vrgatherei16.vv v4, v8, v12, v0.t
  65. +
  66. vcompress.vm v4, v8, v12
  67. vmv1r.v v1, v2
  68. diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
  69. index 14527e8515..cd1395a010 100644
  70. --- a/include/opcode/riscv-opc.h
  71. +++ b/include/opcode/riscv-opc.h
  72. @@ -1761,7 +1761,7 @@ funct6
  73. 001011 vxor
  74. 001100 vrgather
  75. 001101
  76. -001110 vslideup
  77. +001110 vslideup, vrgatherei16
  78. 001111 vslidedown
  79. 010000 vadc
  80. 010001 vmadc
  81. @@ -2701,12 +2701,14 @@ funct6 VM VS2 VS1/RS1/IMM funct3 VD opcode
  82. #define MATCH_VFSLIDE1DOWNVF 0x3c005057
  83. #define MASK_VFSLIDE1DOWNVF 0xfc00707f
  84. -#define MATCH_VRGATHERVV 0x30000057
  85. -#define MASK_VRGATHERVV 0xfc00707f
  86. -#define MATCH_VRGATHERVX 0x30004057
  87. -#define MASK_VRGATHERVX 0xfc00707f
  88. -#define MATCH_VRGATHERVI 0x30003057
  89. -#define MASK_VRGATHERVI 0xfc00707f
  90. +#define MATCH_VRGATHERVV 0x30000057
  91. +#define MASK_VRGATHERVV 0xfc00707f
  92. +#define MATCH_VRGATHERVX 0x30004057
  93. +#define MASK_VRGATHERVX 0xfc00707f
  94. +#define MATCH_VRGATHERVI 0x30003057
  95. +#define MASK_VRGATHERVI 0xfc00707f
  96. +#define MATCH_VRGATHEREI16VV 0x38000057
  97. +#define MASK_VRGATHEREI16VV 0xfc00707f
  98. #define MATCH_VCOMPRESSVM 0x5e002057
  99. #define MASK_VCOMPRESSVM 0xfe00707f
  100. diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
  101. index 208d3ce31b..bc8c5b5d32 100644
  102. --- a/opcodes/riscv-opc.c
  103. +++ b/opcodes/riscv-opc.c
  104. @@ -2027,9 +2027,10 @@ const struct riscv_opcode riscv_opcodes[] =
  105. {"vfslide1up.vf", 0, INSN_CLASS_V_AND_F, "Vd,Vt,SVm", MATCH_VFSLIDE1UPVF, MASK_VFSLIDE1UPVF, match_vd_neq_vs2, 0},
  106. {"vfslide1down.vf", 0, INSN_CLASS_V_AND_F, "Vd,Vt,SVm", MATCH_VFSLIDE1DOWNVF, MASK_VFSLIDE1DOWNVF, match_opcode, 0},
  107. -{"vrgather.vv",0, INSN_CLASS_V, "Vd,Vt,VsVm", MATCH_VRGATHERVV, MASK_VRGATHERVV, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
  108. -{"vrgather.vx",0, INSN_CLASS_V, "Vd,Vt,sVm", MATCH_VRGATHERVX, MASK_VRGATHERVX, match_vd_neq_vs2_neq_vm, 0},
  109. -{"vrgather.vi",0, INSN_CLASS_V, "Vd,Vt,VjVm", MATCH_VRGATHERVI, MASK_VRGATHERVI, match_vd_neq_vs2_neq_vm, 0},
  110. +{"vrgather.vv", 0, INSN_CLASS_V, "Vd,Vt,VsVm", MATCH_VRGATHERVV, MASK_VRGATHERVV, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
  111. +{"vrgather.vx", 0, INSN_CLASS_V, "Vd,Vt,sVm", MATCH_VRGATHERVX, MASK_VRGATHERVX, match_vd_neq_vs2_neq_vm, 0},
  112. +{"vrgather.vi", 0, INSN_CLASS_V, "Vd,Vt,VjVm", MATCH_VRGATHERVI, MASK_VRGATHERVI, match_vd_neq_vs2_neq_vm, 0},
  113. +{"vrgatherei16.vv",0, INSN_CLASS_V, "Vd,Vt,VsVm", MATCH_VRGATHEREI16VV, MASK_VRGATHEREI16VV, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
  114. {"vcompress.vm",0, INSN_CLASS_V, "Vd,Vt,Vs", MATCH_VCOMPRESSVM, MASK_VCOMPRESSVM, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
  115. --
  116. 2.33.0