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- From 2e29338cd430f94e7504a96804f0a75112279992 Mon Sep 17 00:00:00 2001
- From: Nelson Chu <nelson.chu@sifive.com>
- Date: Mon, 20 Jul 2020 10:43:00 +0800
- Subject: [PATCH 20/48] Added vrgatherei16 instruction.
- ---
- gas/testsuite/gas/riscv/vector-insns-fail-06.l | 3 +++
- gas/testsuite/gas/riscv/vector-insns-fail-06.s | 6 ++++++
- gas/testsuite/gas/riscv/vector-insns.d | 2 ++
- gas/testsuite/gas/riscv/vector-insns.s | 3 +++
- include/opcode/riscv-opc.h | 16 +++++++++-------
- opcodes/riscv-opc.c | 7 ++++---
- 6 files changed, 27 insertions(+), 10 deletions(-)
- diff --git a/gas/testsuite/gas/riscv/vector-insns-fail-06.l b/gas/testsuite/gas/riscv/vector-insns-fail-06.l
- index 9a86dd37b5..4c540eb272 100644
- --- a/gas/testsuite/gas/riscv/vector-insns-fail-06.l
- +++ b/gas/testsuite/gas/riscv/vector-insns-fail-06.l
- @@ -12,6 +12,9 @@
- .*Error: illegal operands `vrgather.vx v0,v2,a4,v0.t'
- .*Error: illegal operands `vrgather.vi v2,v2,1'
- .*Error: illegal operands `vrgather.vi v0,v2,1,v0.t'
- +.*Error: illegal operands `vrgatherei16.vv v2,v2,v4'
- +.*Error: illegal operands `vrgatherei16.vv v4,v2,v4'
- +.*Error: illegal operands `vrgatherei16.vv v0,v2,v4,v0.t'
- .*Error: illegal operands `vcompress.vm v2,v2,v4'
- .*Error: illegal operands `vcompress.vm v4,v2,v4'
- .*Error: illegal operands `vmv2r.v v1,v2'
- diff --git a/gas/testsuite/gas/riscv/vector-insns-fail-06.s b/gas/testsuite/gas/riscv/vector-insns-fail-06.s
- index df0edd44c9..3a35aadb49 100644
- --- a/gas/testsuite/gas/riscv/vector-insns-fail-06.s
- +++ b/gas/testsuite/gas/riscv/vector-insns-fail-06.s
- @@ -46,6 +46,12 @@
- vrgather.vi v2, v2, 1 # vd overlap vs2
- vrgather.vi v0, v2, 1, v0.t # vd overlap vm
-
- + vrgatherei16.vv v0, v2, v4 # OK
- + vrgatherei16.vv v1, v2, v4 # OK
- + vrgatherei16.vv v2, v2, v4 # vd overlap vs2
- + vrgatherei16.vv v4, v2, v4 # vd overlap vs1
- + vrgatherei16.vv v0, v2, v4, v0.t# vd overlap vm
- +
- vcompress.vm v0, v2, v4 # OK
- vcompress.vm v1, v2, v4 # OK
- vcompress.vm v2, v2, v4 # vd overlap vs2
- diff --git a/gas/testsuite/gas/riscv/vector-insns.d b/gas/testsuite/gas/riscv/vector-insns.d
- index e53d2f3242..8ac80fba1b 100644
- --- a/gas/testsuite/gas/riscv/vector-insns.d
- +++ b/gas/testsuite/gas/riscv/vector-insns.d
- @@ -2417,6 +2417,8 @@ Disassembly of section .text:
- [ ]+[0-9a-f]+:[ ]+3085c257[ ]+vrgather.vx[ ]+v4,v8,a1,v0.t
- [ ]+[0-9a-f]+:[ ]+30803257[ ]+vrgather.vi[ ]+v4,v8,0,v0.t
- [ ]+[0-9a-f]+:[ ]+308fb257[ ]+vrgather.vi[ ]+v4,v8,31,v0.t
- +[ ]+[0-9a-f]+:[ ]+3a860257[ ]+vrgatherei16.vv[ ]+v4,v8,v12
- +[ ]+[0-9a-f]+:[ ]+38860257[ ]+vrgatherei16.vv[ ]+v4,v8,v12,v0.t
- [ ]+[0-9a-f]+:[ ]+5e862257[ ]+vcompress.vm[ ]+v4,v8,v12
- [ ]+[0-9a-f]+:[ ]+9e2030d7[ ]+vmv1r.v[ ]+v1,v2
- [ ]+[0-9a-f]+:[ ]+9e40b157[ ]+vmv2r.v[ ]+v2,v4
- diff --git a/gas/testsuite/gas/riscv/vector-insns.s b/gas/testsuite/gas/riscv/vector-insns.s
- index 5046dd3bda..afec58c03b 100644
- --- a/gas/testsuite/gas/riscv/vector-insns.s
- +++ b/gas/testsuite/gas/riscv/vector-insns.s
- @@ -2750,6 +2750,9 @@
- vrgather.vi v4, v8, 0, v0.t
- vrgather.vi v4, v8, 31, v0.t
-
- + vrgatherei16.vv v4, v8, v12
- + vrgatherei16.vv v4, v8, v12, v0.t
- +
- vcompress.vm v4, v8, v12
-
- vmv1r.v v1, v2
- diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
- index 14527e8515..cd1395a010 100644
- --- a/include/opcode/riscv-opc.h
- +++ b/include/opcode/riscv-opc.h
- @@ -1761,7 +1761,7 @@ funct6
- 001011 vxor
- 001100 vrgather
- 001101
- -001110 vslideup
- +001110 vslideup, vrgatherei16
- 001111 vslidedown
- 010000 vadc
- 010001 vmadc
- @@ -2701,12 +2701,14 @@ funct6 VM VS2 VS1/RS1/IMM funct3 VD opcode
- #define MATCH_VFSLIDE1DOWNVF 0x3c005057
- #define MASK_VFSLIDE1DOWNVF 0xfc00707f
-
- -#define MATCH_VRGATHERVV 0x30000057
- -#define MASK_VRGATHERVV 0xfc00707f
- -#define MATCH_VRGATHERVX 0x30004057
- -#define MASK_VRGATHERVX 0xfc00707f
- -#define MATCH_VRGATHERVI 0x30003057
- -#define MASK_VRGATHERVI 0xfc00707f
- +#define MATCH_VRGATHERVV 0x30000057
- +#define MASK_VRGATHERVV 0xfc00707f
- +#define MATCH_VRGATHERVX 0x30004057
- +#define MASK_VRGATHERVX 0xfc00707f
- +#define MATCH_VRGATHERVI 0x30003057
- +#define MASK_VRGATHERVI 0xfc00707f
- +#define MATCH_VRGATHEREI16VV 0x38000057
- +#define MASK_VRGATHEREI16VV 0xfc00707f
-
- #define MATCH_VCOMPRESSVM 0x5e002057
- #define MASK_VCOMPRESSVM 0xfe00707f
- diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
- index 208d3ce31b..bc8c5b5d32 100644
- --- a/opcodes/riscv-opc.c
- +++ b/opcodes/riscv-opc.c
- @@ -2027,9 +2027,10 @@ const struct riscv_opcode riscv_opcodes[] =
- {"vfslide1up.vf", 0, INSN_CLASS_V_AND_F, "Vd,Vt,SVm", MATCH_VFSLIDE1UPVF, MASK_VFSLIDE1UPVF, match_vd_neq_vs2, 0},
- {"vfslide1down.vf", 0, INSN_CLASS_V_AND_F, "Vd,Vt,SVm", MATCH_VFSLIDE1DOWNVF, MASK_VFSLIDE1DOWNVF, match_opcode, 0},
-
- -{"vrgather.vv",0, INSN_CLASS_V, "Vd,Vt,VsVm", MATCH_VRGATHERVV, MASK_VRGATHERVV, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
- -{"vrgather.vx",0, INSN_CLASS_V, "Vd,Vt,sVm", MATCH_VRGATHERVX, MASK_VRGATHERVX, match_vd_neq_vs2_neq_vm, 0},
- -{"vrgather.vi",0, INSN_CLASS_V, "Vd,Vt,VjVm", MATCH_VRGATHERVI, MASK_VRGATHERVI, match_vd_neq_vs2_neq_vm, 0},
- +{"vrgather.vv", 0, INSN_CLASS_V, "Vd,Vt,VsVm", MATCH_VRGATHERVV, MASK_VRGATHERVV, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
- +{"vrgather.vx", 0, INSN_CLASS_V, "Vd,Vt,sVm", MATCH_VRGATHERVX, MASK_VRGATHERVX, match_vd_neq_vs2_neq_vm, 0},
- +{"vrgather.vi", 0, INSN_CLASS_V, "Vd,Vt,VjVm", MATCH_VRGATHERVI, MASK_VRGATHERVI, match_vd_neq_vs2_neq_vm, 0},
- +{"vrgatherei16.vv",0, INSN_CLASS_V, "Vd,Vt,VsVm", MATCH_VRGATHEREI16VV, MASK_VRGATHEREI16VV, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
-
- {"vcompress.vm",0, INSN_CLASS_V, "Vd,Vt,Vs", MATCH_VCOMPRESSVM, MASK_VCOMPRESSVM, match_vd_neq_vs1_neq_vs2_neq_vm, 0},
-
- --
- 2.33.0
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