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- From 3421d7e55585065cc08ac9a142dc6fa66a42c173 Mon Sep 17 00:00:00 2001
- From: "eric.tang" <eric.tang@starfivetech.com>
- Date: Mon, 17 Jan 2022 14:38:48 +0800
- Subject: [PATCH 2/3] RISC-V: Hypervisor ext: drop Privileged Spec 1.9.1 and
- fixed compiled error bug
- Signed-off-by: eric.tang <eric.tang@starfivetech.com>
- ---
- gas/config/tc-riscv.c | 4 ++--
- gas/testsuite/gas/riscv/csr-dw-regnums.d | 10 ----------
- gas/testsuite/gas/riscv/csr-dw-regnums.s | 10 ----------
- .../gas/riscv/priv-reg-fail-version-1p10.l | 10 ----------
- .../gas/riscv/priv-reg-fail-version-1p11.l | 10 ----------
- .../gas/riscv/priv-reg-version-1p10.d | 10 ----------
- .../gas/riscv/priv-reg-version-1p11.d | 10 ----------
- gas/testsuite/gas/riscv/priv-reg.s | 10 ----------
- include/opcode/riscv-opc.h | 20 -------------------
- include/opcode/riscv.h | 13 ++++++++++++
- 10 files changed, 15 insertions(+), 92 deletions(-)
- diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
- index 45f5bda4a2..e1bf3992a6 100644
- --- a/gas/config/tc-riscv.c
- +++ b/gas/config/tc-riscv.c
- @@ -725,7 +725,7 @@ riscv_csr_address (const char *csr_name,
- result = (riscv_subset_supports ("v")
- || riscv_subset_supports ("zvamo")
- || riscv_subset_supports ("zvlsseg"));
- - need_check_version = false;
- + need_check_version = FALSE;
- break;
- default:
- as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
- @@ -1573,7 +1573,7 @@ vector_macro (struct riscv_cl_insn *ip)
- /* Zero extend and sign extend byte/half-word/word. */
-
- static void
- -riscv_ext (int destreg, int srcreg, unsigned shift, bool sign)
- +riscv_ext (int destreg, int srcreg, unsigned shift, _Bool sign)
- {
- if (sign)
- {
- diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
- index de17ad81fb..ea0a445c39 100644
- --- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
- +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
- @@ -229,16 +229,6 @@ Contents of the .* section:
- DW_CFA_offset_extended_sf: r4925 \(mhpmevent29\) at cfa\+3316
- DW_CFA_offset_extended_sf: r4926 \(mhpmevent30\) at cfa\+3320
- DW_CFA_offset_extended_sf: r4927 \(mhpmevent31\) at cfa\+3324
- - DW_CFA_offset_extended_sf: r4608 \(hstatus\) at cfa\+2048
- - DW_CFA_offset_extended_sf: r4610 \(hedeleg\) at cfa\+2056
- - DW_CFA_offset_extended_sf: r4611 \(hideleg\) at cfa\+2060
- - DW_CFA_offset_extended_sf: r4612 \(hie\) at cfa\+2064
- - DW_CFA_offset_extended_sf: r4613 \(htvec\) at cfa\+2068
- - DW_CFA_offset_extended_sf: r4672 \(hscratch\) at cfa\+2304
- - DW_CFA_offset_extended_sf: r4673 \(hepc\) at cfa\+2308
- - DW_CFA_offset_extended_sf: r4674 \(hcause\) at cfa\+2312
- - DW_CFA_offset_extended_sf: r4675 \(hbadaddr\) at cfa\+2316
- - DW_CFA_offset_extended_sf: r4676 \(hip\) at cfa\+2320
- DW_CFA_offset_extended_sf: r4992 \(mbase\) at cfa\+3584
- DW_CFA_offset_extended_sf: r4993 \(mbound\) at cfa\+3588
- DW_CFA_offset_extended_sf: r4994 \(mibase\) at cfa\+3592
- diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
- index ecc8014697..549475d650 100644
- --- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
- +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
- @@ -220,16 +220,6 @@ _start:
- .cfi_offset mhpmevent30, 3320
- .cfi_offset mhpmevent31, 3324
- # dropped
- - .cfi_offset hstatus, 2048
- - .cfi_offset hedeleg, 2056
- - .cfi_offset hideleg, 2060
- - .cfi_offset hie, 2064
- - .cfi_offset htvec, 2068
- - .cfi_offset hscratch, 2304
- - .cfi_offset hepc, 2308
- - .cfi_offset hcause, 2312
- - .cfi_offset hbadaddr, 2316
- - .cfi_offset hip, 2320
- .cfi_offset mbase, 3584
- .cfi_offset mbound, 3588
- .cfi_offset mibase, 3592
- diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
- index 983f593fd7..a735f114ab 100644
- --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
- +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
- @@ -5,16 +5,6 @@
- .*Warning: Invalid CSR `sptbr' for the privilege spec `1.10'
- .*Warning: Invalid CSR `mbadaddr' for the privilege spec `1.10'
- .*Warning: Invalid CSR `mucounteren' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hstatus' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hedeleg' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hideleg' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hie' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `htvec' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hscratch' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hepc' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hcause' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hbadaddr' for the privilege spec `1.10'
- -.*Warning: Invalid CSR `hip' for the privilege spec `1.10'
- .*Warning: Invalid CSR `mbase' for the privilege spec `1.10'
- .*Warning: Invalid CSR `mbound' for the privilege spec `1.10'
- .*Warning: Invalid CSR `mibase' for the privilege spec `1.10'
- diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
- index 0e036e48e9..bf14859996 100644
- --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
- +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
- @@ -4,16 +4,6 @@
- .*Warning: Invalid CSR `sptbr' for the privilege spec `1.11'
- .*Warning: Invalid CSR `mbadaddr' for the privilege spec `1.11'
- .*Warning: Invalid CSR `mucounteren' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hstatus' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hedeleg' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hideleg' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hie' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `htvec' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hscratch' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hepc' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hcause' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hbadaddr' for the privilege spec `1.11'
- -.*Warning: Invalid CSR `hip' for the privilege spec `1.11'
- .*Warning: Invalid CSR `mbase' for the privilege spec `1.11'
- .*Warning: Invalid CSR `mbound' for the privilege spec `1.11'
- .*Warning: Invalid CSR `mibase' for the privilege spec `1.11'
- diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
- index 3ad8eebe85..caa008feaf 100644
- --- a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
- +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
- @@ -225,16 +225,6 @@ Disassembly of section .text:
- [ ]+[0-9a-f]+:[ ]+18002573[ ]+csrr[ ]+a0,satp
- [ ]+[0-9a-f]+:[ ]+34302573[ ]+csrr[ ]+a0,mtval
- [ ]+[0-9a-f]+:[ ]+32002573[ ]+csrr[ ]+a0,0x320
- -[ ]+[0-9a-f]+:[ ]+20002573[ ]+csrr[ ]+a0,0x200
- -[ ]+[0-9a-f]+:[ ]+20202573[ ]+csrr[ ]+a0,0x202
- -[ ]+[0-9a-f]+:[ ]+20302573[ ]+csrr[ ]+a0,0x203
- -[ ]+[0-9a-f]+:[ ]+20402573[ ]+csrr[ ]+a0,0x204
- -[ ]+[0-9a-f]+:[ ]+20502573[ ]+csrr[ ]+a0,0x205
- -[ ]+[0-9a-f]+:[ ]+24002573[ ]+csrr[ ]+a0,0x240
- -[ ]+[0-9a-f]+:[ ]+24102573[ ]+csrr[ ]+a0,0x241
- -[ ]+[0-9a-f]+:[ ]+24202573[ ]+csrr[ ]+a0,0x242
- -[ ]+[0-9a-f]+:[ ]+24302573[ ]+csrr[ ]+a0,0x243
- -[ ]+[0-9a-f]+:[ ]+24402573[ ]+csrr[ ]+a0,0x244
- [ ]+[0-9a-f]+:[ ]+38002573[ ]+csrr[ ]+a0,0x380
- [ ]+[0-9a-f]+:[ ]+38102573[ ]+csrr[ ]+a0,0x381
- [ ]+[0-9a-f]+:[ ]+38202573[ ]+csrr[ ]+a0,0x382
- diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
- index 5824bc5e1f..d16a55e5f3 100644
- --- a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
- +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
- @@ -225,16 +225,6 @@ Disassembly of section .text:
- [ ]+[0-9a-f]+:[ ]+18002573[ ]+csrr[ ]+a0,satp
- [ ]+[0-9a-f]+:[ ]+34302573[ ]+csrr[ ]+a0,mtval
- [ ]+[0-9a-f]+:[ ]+32002573[ ]+csrr[ ]+a0,mcountinhibit
- -[ ]+[0-9a-f]+:[ ]+20002573[ ]+csrr[ ]+a0,0x200
- -[ ]+[0-9a-f]+:[ ]+20202573[ ]+csrr[ ]+a0,0x202
- -[ ]+[0-9a-f]+:[ ]+20302573[ ]+csrr[ ]+a0,0x203
- -[ ]+[0-9a-f]+:[ ]+20402573[ ]+csrr[ ]+a0,0x204
- -[ ]+[0-9a-f]+:[ ]+20502573[ ]+csrr[ ]+a0,0x205
- -[ ]+[0-9a-f]+:[ ]+24002573[ ]+csrr[ ]+a0,0x240
- -[ ]+[0-9a-f]+:[ ]+24102573[ ]+csrr[ ]+a0,0x241
- -[ ]+[0-9a-f]+:[ ]+24202573[ ]+csrr[ ]+a0,0x242
- -[ ]+[0-9a-f]+:[ ]+24302573[ ]+csrr[ ]+a0,0x243
- -[ ]+[0-9a-f]+:[ ]+24402573[ ]+csrr[ ]+a0,0x244
- [ ]+[0-9a-f]+:[ ]+38002573[ ]+csrr[ ]+a0,0x380
- [ ]+[0-9a-f]+:[ ]+38102573[ ]+csrr[ ]+a0,0x381
- [ ]+[0-9a-f]+:[ ]+38202573[ ]+csrr[ ]+a0,0x382
- diff --git a/gas/testsuite/gas/riscv/priv-reg.s b/gas/testsuite/gas/riscv/priv-reg.s
- index c40d28862b..30972de834 100644
- --- a/gas/testsuite/gas/riscv/priv-reg.s
- +++ b/gas/testsuite/gas/riscv/priv-reg.s
- @@ -234,16 +234,6 @@
- csr mbadaddr # 0x343 in 1.9.1, but the value is mtval since 1.10
- csr mucounteren # 0x320 in 1.9.1, dropped in 1.10, but the value is mcountinhibit since 1.11
-
- - csr hstatus # 0x200, dropped in 1.10
- - csr hedeleg # 0x202, dropped in 1.10
- - csr hideleg # 0x203, dropped in 1.10
- - csr hie # 0x204, dropped in 1.10
- - csr htvec # 0x205, dropped in 1.10
- - csr hscratch # 0x240, dropped in 1.10
- - csr hepc # 0x241, dropped in 1.10
- - csr hcause # 0x242, dropped in 1.10
- - csr hbadaddr # 0x243, dropped in 1.10
- - csr hip # 0x244, dropped in 1.10
- csr mbase # 0x380, dropped in 1.10
- csr mbound # 0x381, dropped in 1.10
- csr mibase # 0x382, dropped in 1.10
- diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
- index 0c23fac724..eea10e1ebc 100644
- --- a/include/opcode/riscv-opc.h
- +++ b/include/opcode/riscv-opc.h
- @@ -2874,16 +2874,6 @@ funct6 VM VS2 VS1/RS1/IMM funct3 VD opcode
- #define CSR_MHPMEVENT29 0x33d
- #define CSR_MHPMEVENT30 0x33e
- #define CSR_MHPMEVENT31 0x33f
- -#define CSR_HSTATUS 0x200
- -#define CSR_HEDELEG 0x202
- -#define CSR_HIDELEG 0x203
- -#define CSR_HIE 0x204
- -#define CSR_HTVEC 0x205
- -#define CSR_HSCRATCH 0x240
- -#define CSR_HEPC 0x241
- -#define CSR_HCAUSE 0x242
- -#define CSR_HBADADDR 0x243
- -#define CSR_HIP 0x244
- #define CSR_MBASE 0x380
- #define CSR_MBOUND 0x381
- #define CSR_MIBASE 0x382
- @@ -3526,16 +3516,6 @@ DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PR
- DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
- DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
- /* Dropped. */
- -DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- -DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
- diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
- index c90fc16f34..ee0d277031 100644
- --- a/include/opcode/riscv.h
- +++ b/include/opcode/riscv.h
- @@ -171,6 +171,15 @@ static const char * const riscv_vma[2] =
- ((RV_X(x, 1, 2) << 3) | (RV_X(x, 3, 2) << 10) | (RV_X(x, 5, 1) << 2) | (RV_X(x, 6, 2) << 5) | (RV_X(x, 8, 1) << 12))
- #define ENCODE_RVC_J_IMM(x) \
- ((RV_X(x, 1, 3) << 3) | (RV_X(x, 4, 1) << 11) | (RV_X(x, 5, 1) << 2) | (RV_X(x, 6, 1) << 7) | (RV_X(x, 7, 1) << 6) | (RV_X(x, 8, 2) << 9) | (RV_X(x, 10, 1) << 8) | (RV_X(x, 11, 1) << 12))
- +#define ENCODE_RVV_VB_IMM(x) \
- + (RV_X(x, 0, 10) << 20)
- +#define ENCODE_RVV_VC_IMM(x) \
- + (RV_X(x, 0, 11) << 20)
- +#define ENCODE_PREF_TIMM(x) \
- + (RV_X(x, 0, 4) << 20)
- +#define ENCODE_PREF_SIMM(x) \
- + (RV_X(x, 0, 8) << 24)
- +
-
- #define VALID_ITYPE_IMM(x) (EXTRACT_ITYPE_IMM(ENCODE_ITYPE_IMM(x)) == (x))
- #define VALID_STYPE_IMM(x) (EXTRACT_STYPE_IMM(ENCODE_STYPE_IMM(x)) == (x))
- @@ -191,6 +200,9 @@ static const char * const riscv_vma[2] =
- #define VALID_RVC_SDSP_IMM(x) (EXTRACT_RVC_SDSP_IMM(ENCODE_RVC_SDSP_IMM(x)) == (x))
- #define VALID_RVC_B_IMM(x) (EXTRACT_RVC_B_IMM(ENCODE_RVC_B_IMM(x)) == (x))
- #define VALID_RVC_J_IMM(x) (EXTRACT_RVC_J_IMM(ENCODE_RVC_J_IMM(x)) == (x))
- +#define VALID_RVV_VB_IMM(x) (EXTRACT_RVV_VB_IMM(ENCODE_RVV_VB_IMM(x)) == (x))
- +#define VALID_RVV_VC_IMM(x) (EXTRACT_RVV_VC_IMM(ENCODE_RVV_VC_IMM(x)) == (x))
- +
-
- #define RISCV_RTYPE(insn, rd, rs1, rs2) \
- ((MATCH_ ## insn) | ((rd) << OP_SH_RD) | ((rs1) << OP_SH_RS1) | ((rs2) << OP_SH_RS2))
- @@ -451,6 +463,7 @@ enum riscv_csr_class
- CSR_CLASS_I,
- CSR_CLASS_I_32, /* rv32 only */
- CSR_CLASS_F, /* f-ext only */
- + CSR_CLASS_V,
- CSR_CLASS_DEBUG /* debug CSR */
- };
-
- --
- 2.33.1
|