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- From 730b8fa4b7f04a53ce20e48ff205f638dc9a6ae4 Mon Sep 17 00:00:00 2001
- From: "max.ma" <max.ma@starfivetech.com>
- Date: Sun, 26 Dec 2021 21:28:53 -0800
- Subject: [PATCH 28/32] define __riscv_vector macro
- ---
- gcc/common/config/riscv/riscv-common.c | 1 +
- gcc/config/riscv/riscv-c.c | 3 +++
- gcc/config/riscv/riscv.opt | 2 ++
- 3 files changed, 6 insertions(+)
- diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c
- index 0927554d506..ce0664a6d08 100644
- --- a/gcc/common/config/riscv/riscv-common.c
- +++ b/gcc/common/config/riscv/riscv-common.c
- @@ -908,6 +908,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
- {"f", &gcc_options::x_target_flags, MASK_HARD_FLOAT},
- {"d", &gcc_options::x_target_flags, MASK_DOUBLE_FLOAT},
- {"c", &gcc_options::x_target_flags, MASK_RVC},
- + {"v", &gcc_options::x_target_flags, MASK_VECTOR},
-
- {"zicsr", &gcc_options::x_riscv_zi_subext, MASK_ZICSR},
- {"zifencei", &gcc_options::x_riscv_zi_subext, MASK_ZIFENCEI},
- diff --git a/gcc/config/riscv/riscv-c.c b/gcc/config/riscv/riscv-c.c
- index efd4a61ea29..44fbeaeb4b5 100644
- --- a/gcc/config/riscv/riscv-c.c
- +++ b/gcc/config/riscv/riscv-c.c
- @@ -54,6 +54,9 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
- if (TARGET_DIV && TARGET_MUL)
- builtin_define ("__riscv_muldiv");
-
- + if (TARGET_VECTOR)
- + builtin_define ("__riscv_vector");
- +
- builtin_define_with_int_value ("__riscv_xlen", UNITS_PER_WORD * 8);
- if (TARGET_HARD_FLOAT)
- builtin_define_with_int_value ("__riscv_flen", UNITS_PER_FP_REG * 8);
- diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
- index 7f7e1c4f50b..3b7d5b591e6 100644
- --- a/gcc/config/riscv/riscv.opt
- +++ b/gcc/config/riscv/riscv.opt
- @@ -146,6 +146,8 @@ Mask(RVC)
-
- Mask(RVE)
-
- +Mask(VECTOR)
- +
- mriscv-attribute
- Target Var(riscv_emit_attribute_p) Init(-1)
- Emit RISC-V ELF attribute.
- --
- 2.33.1
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