0001-dhrystone-Edit-compiler-flags.patch 1.1 KB

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  1. From f204001c9478facc466400be5089ed8bf1a77ce8 Mon Sep 17 00:00:00 2001
  2. From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
  3. Date: Fri, 29 Oct 2021 10:42:16 +0800
  4. Subject: [PATCH] dhrystone: Edit compiler flags
  5. This patch is needed for adding compiler flags for Dhrystone
  6. Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
  7. ---
  8. Makefile | 4 ++--
  9. 1 file changed, 2 insertions(+), 2 deletions(-)
  10. diff --git a/Makefile b/Makefile
  11. index 6fb3e5a..6640037 100644
  12. --- a/Makefile
  13. +++ b/Makefile
  14. @@ -1,10 +1,10 @@
  15. DHRY-LFLAGS =
  16. DHRY-CFLAGS := -O3 -DTIME -DNOENUM -Wno-implicit -save-temps
  17. -DHRY-CFLAGS += -fno-builtin-printf -fno-common -falign-functions=4
  18. +DHRY-CFLAGS += -mabi=lp64d -O3 -fno-common -funroll-loops -fno-inline -funroll-all-loops -falign-jumps=8 -falign-loops=8 -finline-limit=1000 -falign-functions=8 -ffast-math -fno-tree-loop-distribute-patterns --param fsm-scale-path-stmts=3 -mcmodel=medany -fno-builtin-printf -lrt
  19. #Uncomment below for FPGA run, default DHRY_ITERS is 2000 for RTL
  20. -#DHRY-CFLAGS += -DDHRY_ITERS=20000000
  21. +DHRY-CFLAGS += -DDHRY_ITERS=20000000
  22. SRC = dhry_1.c dhry_2.c strcmp.S
  23. HDR = dhry.h