0030-dri-add-support-for-YUV-DRI-config.patch 21 KB

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  1. From 23b1868e2fbf2340a354559ca3e6ed61e723f7c8 Mon Sep 17 00:00:00 2001
  2. From: Frank Binns <frank.binns@imgtec.com>
  3. Date: Fri, 22 Dec 2017 17:17:50 +0000
  4. Subject: [PATCH] dri: add support for YUV DRI config
  5. This is prerequisite for adding support for EGL_EXT_yuv_surface.
  6. This also adds support for NV12 and NV21 EGL configs.
  7. ---
  8. include/GL/internal/dri_interface.h | 42 ++++++++-
  9. src/gallium/frontends/dri/dri_screen.c | 8 +-
  10. src/gallium/include/pipe/p_format.h | 2 +
  11. src/mesa/drivers/dri/common/utils.c | 88 +++++++++++++++++--
  12. src/mesa/drivers/dri/common/utils.h | 3 +-
  13. src/mesa/drivers/dri/i915/intel_screen.c | 8 +-
  14. src/mesa/drivers/dri/i965/brw_screen.c | 12 ++-
  15. src/mesa/drivers/dri/nouveau/nouveau_screen.c | 4 +-
  16. src/mesa/drivers/dri/radeon/radeon_screen.c | 4 +-
  17. src/mesa/main/format_info.py | 2 +-
  18. src/mesa/main/formats.c | 9 ++
  19. src/mesa/main/formats.csv | 2 +
  20. src/mesa/main/formats.h | 7 ++
  21. src/mesa/main/mtypes.h | 9 ++
  22. 14 files changed, 181 insertions(+), 19 deletions(-)
  23. diff --git a/include/GL/internal/dri_interface.h b/include/GL/internal/dri_interface.h
  24. index 16cc095..4d5a187 100644
  25. --- a/include/GL/internal/dri_interface.h
  26. +++ b/include/GL/internal/dri_interface.h
  27. @@ -826,7 +826,13 @@ struct __DRIuseInvalidateExtensionRec {
  28. #define __DRI_ATTRIB_GREEN_SHIFT 51
  29. #define __DRI_ATTRIB_BLUE_SHIFT 52
  30. #define __DRI_ATTRIB_ALPHA_SHIFT 53
  31. -#define __DRI_ATTRIB_MAX 54
  32. +#define __DRI_ATTRIB_YUV_ORDER 54
  33. +#define __DRI_ATTRIB_YUV_NUMBER_OF_PLANES 55
  34. +#define __DRI_ATTRIB_YUV_SUBSAMPLE 56
  35. +#define __DRI_ATTRIB_YUV_DEPTH_RANGE 57
  36. +#define __DRI_ATTRIB_YUV_CSC_STANDARD 58
  37. +#define __DRI_ATTRIB_YUV_PLANE_BPP 59
  38. +#define __DRI_ATTRIB_MAX 60
  39. /* __DRI_ATTRIB_RENDER_TYPE */
  40. #define __DRI_ATTRIB_RGBA_BIT 0x01
  41. @@ -834,6 +840,7 @@ struct __DRIuseInvalidateExtensionRec {
  42. #define __DRI_ATTRIB_LUMINANCE_BIT 0x04
  43. #define __DRI_ATTRIB_FLOAT_BIT 0x08
  44. #define __DRI_ATTRIB_UNSIGNED_FLOAT_BIT 0x10
  45. +#define __DRI_ATTRIB_YUV_BIT 0x20
  46. /* __DRI_ATTRIB_CONFIG_CAVEAT */
  47. #define __DRI_ATTRIB_SLOW_BIT 0x01
  48. @@ -860,6 +867,39 @@ struct __DRIuseInvalidateExtensionRec {
  49. #define __DRI_ATTRIB_SWAP_COPY 0x8062
  50. #define __DRI_ATTRIB_SWAP_UNDEFINED 0x8063
  51. +/* __DRI_ATTRIB_YUV_ORDER */
  52. +#define __DRI_ATTRIB_YUV_ORDER_NONE 0x0
  53. +#define __DRI_ATTRIB_YUV_ORDER_YUV_BIT 0x1
  54. +#define __DRI_ATTRIB_YUV_ORDER_YVU_BIT 0x2
  55. +#define __DRI_ATTRIB_YUV_ORDER_YUYV_BIT 0x4
  56. +#define __DRI_ATTRIB_YUV_ORDER_UYVY_BIT 0x8
  57. +#define __DRI_ATTRIB_YUV_ORDER_YVYU_BIT 0x10
  58. +#define __DRI_ATTRIB_YUV_ORDER_VYUY_BIT 0x20
  59. +#define __DRI_ATTRIB_YUV_ORDER_AYUV_BIT 0x40
  60. +
  61. +/* __DRI_ATTRIB_YUV_SUBSAMPLE */
  62. +#define __DRI_ATTRIB_YUV_SUBSAMPLE_NONE 0x0
  63. +#define __DRI_ATTRIB_YUV_SUBSAMPLE_4_2_0_BIT 0x1
  64. +#define __DRI_ATTRIB_YUV_SUBSAMPLE_4_2_2_BIT 0x2
  65. +#define __DRI_ATTRIB_YUV_SUBSAMPLE_4_4_4_BIT 0x4
  66. +
  67. +/* __DRI_ATTRIB_YUV_DEPTH_RANGE */
  68. +#define __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE 0x0
  69. +#define __DRI_ATTRIB_YUV_DEPTH_RANGE_LIMITED_BIT 0x1
  70. +#define __DRI_ATTRIB_YUV_DEPTH_RANGE_FULL_BIT 0x2
  71. +
  72. +/* __DRI_ATTRIB_YUV_CSC_STANDARD */
  73. +#define __DRI_ATTRIB_YUV_CSC_STANDARD_NONE 0x0
  74. +#define __DRI_ATTRIB_YUV_CSC_STANDARD_601_BIT 0x1
  75. +#define __DRI_ATTRIB_YUV_CSC_STANDARD_709_BIT 0x2
  76. +#define __DRI_ATTRIB_YUV_CSC_STANDARD_2020_BIT 0x4
  77. +
  78. +/* __DRI_ATTRIB_YUV_PLANE_BPP */
  79. +#define __DRI_ATTRIB_YUV_PLANE_BPP_NONE 0x0
  80. +#define __DRI_ATTRIB_YUV_PLANE_BPP_0_BIT 0x1
  81. +#define __DRI_ATTRIB_YUV_PLANE_BPP_8_BIT 0x2
  82. +#define __DRI_ATTRIB_YUV_PLANE_BPP_10_BIT 0x4
  83. +
  84. /**
  85. * This extension defines the core DRI functionality.
  86. *
  87. diff --git a/src/gallium/frontends/dri/dri_screen.c b/src/gallium/frontends/dri/dri_screen.c
  88. index b565a1f..37a0d4a 100644
  89. --- a/src/gallium/frontends/dri/dri_screen.c
  90. +++ b/src/gallium/frontends/dri/dri_screen.c
  91. @@ -324,7 +324,9 @@ dri_fill_in_modes(struct dri_screen *screen)
  92. depth_buffer_factor, back_buffer_modes,
  93. ARRAY_SIZE(back_buffer_modes),
  94. msaa_modes, 1,
  95. - GL_TRUE, !mixed_color_depth);
  96. + GL_TRUE, !mixed_color_depth,
  97. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  98. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  99. configs = driConcatConfigs(configs, new_configs);
  100. /* Multi-sample configs without an accumulation buffer. */
  101. @@ -334,7 +336,9 @@ dri_fill_in_modes(struct dri_screen *screen)
  102. depth_buffer_factor, back_buffer_modes,
  103. ARRAY_SIZE(back_buffer_modes),
  104. msaa_modes+1, num_msaa_modes-1,
  105. - GL_FALSE, !mixed_color_depth);
  106. + GL_FALSE, !mixed_color_depth,
  107. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  108. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  109. configs = driConcatConfigs(configs, new_configs);
  110. }
  111. }
  112. diff --git a/src/gallium/include/pipe/p_format.h b/src/gallium/include/pipe/p_format.h
  113. index 0c93d7d..fd65337 100644
  114. --- a/src/gallium/include/pipe/p_format.h
  115. +++ b/src/gallium/include/pipe/p_format.h
  116. @@ -513,6 +513,8 @@ enum pipe_format {
  117. PIPE_FORMAT_R4G4B4X4_UNORM,
  118. PIPE_FORMAT_B10G10R10X2_SNORM,
  119. PIPE_FORMAT_R5G6B5_SRGB,
  120. + PIPE_FORMAT_YUV420_2PLANE,
  121. + PIPE_FORMAT_YVU420_2PLANE,
  122. PIPE_FORMAT_COUNT
  123. };
  124. diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c
  125. index a3f2bc5..d268dc4 100644
  126. --- a/src/mesa/drivers/dri/common/utils.c
  127. +++ b/src/mesa/drivers/dri/common/utils.c
  128. @@ -163,6 +163,21 @@ driGetRendererString( char * buffer, const char * hardware_name,
  129. * This forces 32-bit color to have 24-bit depth, and
  130. * 16-bit color to have 16-bit depth.
  131. *
  132. + * \param yuv_depth_range YUV pixel depth range. For non-YUV pixel formats this
  133. + * should be \c __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE.
  134. + * Otherwise valid values are
  135. + * \c __DRI_ATTRIB_YUV_DEPTH_RANGE_LIMITED_BIT and
  136. + * \c __DRI_ATTRIB_YUV_DEPTH_RANGE_FULL_BIT. See the
  137. + * EGL_EXT_yuv_surface extension spec for more details.
  138. + * \param yuv_csc_standard YUV color conversion standard. For non-YUV pixel
  139. + * formats this should be
  140. + * \c __DRI_ATTRIB_YUV_CSC_STANDARD_NONE. Otherwise
  141. + * valid values are
  142. + * \c __DRI_ATTRIB_YUV_CSC_STANDARD_601_BIT,
  143. + * \c __DRI_ATTRIB_YUV_CSC_STANDARD_709_BIT and
  144. + * \c __DRI_ATTRIB_YUV_CSC_STANDARD_2020_BIT. See the
  145. + * EGL_EXT_yuv_surface extension spec for more details.
  146. + *
  147. * \returns
  148. * Pointer to any array of pointers to the \c __DRIconfig structures created
  149. * for the specified formats. If there is an error, \c NULL is returned.
  150. @@ -175,7 +190,8 @@ driCreateConfigs(mesa_format format,
  151. unsigned num_depth_stencil_bits,
  152. const GLenum * db_modes, unsigned num_db_modes,
  153. const uint8_t * msaa_samples, unsigned num_msaa_modes,
  154. - GLboolean enable_accum, GLboolean color_depth_match)
  155. + GLboolean enable_accum, GLboolean color_depth_match,
  156. + GLint yuv_depth_range, GLint yuv_csc_standard)
  157. {
  158. static const struct {
  159. uint32_t masks[4];
  160. @@ -214,6 +230,9 @@ driCreateConfigs(mesa_format format,
  161. /* MESA_FORMAT_RGBA_FLOAT16 */
  162. {{ 0, 0, 0, 0},
  163. { 0, 16, 32, 48 }},
  164. + /* Mesa YUV formats */
  165. + {{ 0, 0, 0, 0 },
  166. + { -1, -1, -1, -1}},
  167. };
  168. const uint32_t * masks;
  169. @@ -227,6 +246,11 @@ driCreateConfigs(mesa_format format,
  170. int green_bits;
  171. int blue_bits;
  172. int alpha_bits;
  173. + int yuv_order = __DRI_ATTRIB_YUV_ORDER_NONE;
  174. + int yuv_num_planes = 0;
  175. + int yuv_subsample = __DRI_ATTRIB_YUV_SUBSAMPLE_NONE;
  176. + int yuv_plane_bpp = __DRI_ATTRIB_YUV_PLANE_BPP_NONE;
  177. + bool is_yuv = false;
  178. bool is_srgb;
  179. bool is_float;
  180. @@ -279,6 +303,33 @@ driCreateConfigs(mesa_format format,
  181. masks = format_table[8].masks;
  182. shifts = format_table[8].shifts;
  183. break;
  184. + case MESA_FORMAT_YCBCR:
  185. + masks = format_table[11].masks;
  186. + shifts = format_table[11].shifts;
  187. + is_yuv = true; /* FIXME: This should come from formats_info.py */
  188. + yuv_order = __DRI_ATTRIB_YUV_ORDER_YUYV_BIT;
  189. + yuv_num_planes = 1;
  190. + yuv_subsample = __DRI_ATTRIB_YUV_SUBSAMPLE_4_2_2_BIT;
  191. + yuv_plane_bpp = __DRI_ATTRIB_YUV_PLANE_BPP_8_BIT;
  192. + break;
  193. + case MESA_FORMAT_YUV420_2PLANE:
  194. + masks = format_table[11].masks;
  195. + shifts = format_table[11].shifts;
  196. + is_yuv = true; /* FIXME: This should come from formats_info.py */
  197. + yuv_order = __DRI_ATTRIB_YUV_ORDER_YUV_BIT;
  198. + yuv_num_planes = 2;
  199. + yuv_subsample = __DRI_ATTRIB_YUV_SUBSAMPLE_4_2_0_BIT;
  200. + yuv_plane_bpp = __DRI_ATTRIB_YUV_PLANE_BPP_8_BIT;
  201. + break;
  202. + case MESA_FORMAT_YVU420_2PLANE:
  203. + masks = format_table[11].masks;
  204. + shifts = format_table[11].shifts;
  205. + is_yuv = true; /* FIXME: This should come from formats_info.py */
  206. + yuv_order = __DRI_ATTRIB_YUV_ORDER_YVU_BIT;
  207. + yuv_num_planes = 2;
  208. + yuv_subsample = __DRI_ATTRIB_YUV_SUBSAMPLE_4_2_0_BIT;
  209. + yuv_plane_bpp = __DRI_ATTRIB_YUV_PLANE_BPP_8_BIT;
  210. + break;
  211. default:
  212. fprintf(stderr, "[%s:%u] Unknown framebuffer type %s (%d).\n",
  213. __func__, __LINE__,
  214. @@ -334,8 +385,12 @@ driCreateConfigs(mesa_format format,
  215. modes->greenShift = shifts[1];
  216. modes->blueShift = shifts[2];
  217. modes->alphaShift = shifts[3];
  218. - modes->rgbBits = modes->redBits + modes->greenBits
  219. - + modes->blueBits + modes->alphaBits;
  220. +
  221. + if (is_yuv)
  222. + modes->rgbBits = 8;
  223. + else
  224. + modes->rgbBits = modes->redBits + modes->greenBits
  225. + + modes->blueBits + modes->alphaBits;
  226. modes->accumRedBits = 16 * j;
  227. modes->accumGreenBits = 16 * j;
  228. @@ -345,6 +400,8 @@ driCreateConfigs(mesa_format format,
  229. modes->stencilBits = stencil_bits[k];
  230. modes->depthBits = depth_bits[k];
  231. + modes->rgbMode = !is_yuv;
  232. +
  233. if (db_modes[i] == __DRI_ATTRIB_SWAP_NONE) {
  234. modes->doubleBufferMode = GL_FALSE;
  235. modes->swapMethod = __DRI_ATTRIB_SWAP_UNDEFINED;
  236. @@ -357,6 +414,13 @@ driCreateConfigs(mesa_format format,
  237. modes->samples = msaa_samples[h];
  238. modes->sRGBCapable = is_srgb;
  239. +
  240. + modes->YUVOrder = yuv_order;
  241. + modes->YUVNumberOfPlanes = yuv_num_planes;
  242. + modes->YUVSubsample = yuv_subsample;
  243. + modes->YUVDepthRange = yuv_depth_range;
  244. + modes->YUVCSCStandard = yuv_csc_standard;
  245. + modes->YUVPlaneBPP = yuv_plane_bpp;
  246. }
  247. }
  248. }
  249. @@ -436,10 +500,14 @@ driGetConfigAttribIndex(const __DRIconfig *config,
  250. break;
  251. __ATTRIB(__DRI_ATTRIB_SAMPLES, samples);
  252. case __DRI_ATTRIB_RENDER_TYPE:
  253. - /* no support for color index mode */
  254. - *value = __DRI_ATTRIB_RGBA_BIT;
  255. - if (config->modes.floatMode)
  256. - *value |= __DRI_ATTRIB_FLOAT_BIT;
  257. + /* no support for color index mode */
  258. + if (config->modes.rgbMode)
  259. + *value = __DRI_ATTRIB_RGBA_BIT;
  260. + else
  261. + *value = __DRI_ATTRIB_YUV_BIT;
  262. +
  263. + if (config->modes.floatMode)
  264. + *value |= __DRI_ATTRIB_FLOAT_BIT;
  265. break;
  266. case __DRI_ATTRIB_CONFIG_CAVEAT:
  267. if (config->modes.accumRedBits != 0)
  268. @@ -505,6 +573,12 @@ driGetConfigAttribIndex(const __DRIconfig *config,
  269. __ATTRIB(__DRI_ATTRIB_GREEN_SHIFT, greenShift);
  270. __ATTRIB(__DRI_ATTRIB_BLUE_SHIFT, blueShift);
  271. __ATTRIB(__DRI_ATTRIB_ALPHA_SHIFT, alphaShift);
  272. + __ATTRIB(__DRI_ATTRIB_YUV_ORDER, YUVOrder);
  273. + __ATTRIB(__DRI_ATTRIB_YUV_NUMBER_OF_PLANES, YUVNumberOfPlanes);
  274. + __ATTRIB(__DRI_ATTRIB_YUV_SUBSAMPLE, YUVSubsample);
  275. + __ATTRIB(__DRI_ATTRIB_YUV_DEPTH_RANGE, YUVDepthRange);
  276. + __ATTRIB(__DRI_ATTRIB_YUV_CSC_STANDARD, YUVCSCStandard);
  277. + __ATTRIB(__DRI_ATTRIB_YUV_PLANE_BPP, YUVPlaneBPP);
  278. default:
  279. /* XXX log an error or smth */
  280. return GL_FALSE;
  281. diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h
  282. index 7be0465..ebd98d9 100644
  283. --- a/src/mesa/drivers/dri/common/utils.h
  284. +++ b/src/mesa/drivers/dri/common/utils.h
  285. @@ -45,7 +45,8 @@ driCreateConfigs(mesa_format format,
  286. unsigned num_depth_stencil_bits,
  287. const GLenum * db_modes, unsigned num_db_modes,
  288. const uint8_t * msaa_samples, unsigned num_msaa_modes,
  289. - GLboolean enable_accum, GLboolean color_depth_match);
  290. + GLboolean enable_accum, GLboolean color_depth_match,
  291. + GLint yuv_depth_range, GLint yuv_csc_standards);
  292. __DRIconfig **driConcatConfigs(__DRIconfig **a,
  293. __DRIconfig **b);
  294. diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
  295. index 6135357..a94c6de 100644
  296. --- a/src/mesa/drivers/dri/i915/intel_screen.c
  297. +++ b/src/mesa/drivers/dri/i915/intel_screen.c
  298. @@ -1083,7 +1083,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
  299. num_depth_stencil_bits,
  300. back_buffer_modes, 2,
  301. singlesample_samples, 1,
  302. - false, false);
  303. + false, false,
  304. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  305. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  306. configs = driConcatConfigs(configs, new_configs);
  307. }
  308. @@ -1105,7 +1107,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
  309. depth_bits, stencil_bits, 1,
  310. back_buffer_modes, 1,
  311. singlesample_samples, 1,
  312. - true, false);
  313. + true, false,
  314. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  315. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  316. configs = driConcatConfigs(configs, new_configs);
  317. }
  318. diff --git a/src/mesa/drivers/dri/i965/brw_screen.c b/src/mesa/drivers/dri/i965/brw_screen.c
  319. index 5681111..c450bae 100644
  320. --- a/src/mesa/drivers/dri/i965/brw_screen.c
  321. +++ b/src/mesa/drivers/dri/i965/brw_screen.c
  322. @@ -2292,7 +2292,9 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
  323. num_depth_stencil_bits,
  324. back_buffer_modes, 2,
  325. singlesample_samples, 1,
  326. - false, false);
  327. + false, false,
  328. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  329. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  330. configs = driConcatConfigs(configs, new_configs);
  331. }
  332. @@ -2325,7 +2327,9 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
  333. depth_bits, stencil_bits, 1,
  334. back_buffer_modes, 1,
  335. singlesample_samples, 1,
  336. - true, false);
  337. + true, false,
  338. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  339. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  340. configs = driConcatConfigs(configs, new_configs);
  341. }
  342. @@ -2390,7 +2394,9 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
  343. back_buffer_modes, 1,
  344. multisample_samples,
  345. num_msaa_modes,
  346. - false, false);
  347. + false, false,
  348. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  349. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  350. configs = driConcatConfigs(configs, new_configs);
  351. }
  352. diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
  353. index c92efcd..fc87d5e 100644
  354. --- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
  355. +++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
  356. @@ -79,7 +79,9 @@ nouveau_get_configs(uint32_t chipset)
  357. ARRAY_SIZE(back_buffer_modes),
  358. msaa_samples,
  359. ARRAY_SIZE(msaa_samples),
  360. - GL_TRUE, chipset < 0x10);
  361. + GL_TRUE, chipset < 0x10,
  362. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  363. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  364. assert(config);
  365. configs = driConcatConfigs(configs, config);
  366. diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
  367. index 3764a5d..f762855 100644
  368. --- a/src/mesa/drivers/dri/radeon/radeon_screen.c
  369. +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
  370. @@ -838,7 +838,9 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
  371. ARRAY_SIZE(back_buffer_modes),
  372. msaa_samples_array,
  373. ARRAY_SIZE(msaa_samples_array),
  374. - GL_TRUE, GL_FALSE);
  375. + GL_TRUE, GL_FALSE,
  376. + __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
  377. + __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
  378. configs = driConcatConfigs(configs, new_configs);
  379. }
  380. diff --git a/src/mesa/main/format_info.py b/src/mesa/main/format_info.py
  381. index edc0324..d58403e 100644
  382. --- a/src/mesa/main/format_info.py
  383. +++ b/src/mesa/main/format_info.py
  384. @@ -29,7 +29,7 @@ import sys
  385. def get_gl_base_format(fmat):
  386. if fmat.name == 'MESA_FORMAT_NONE':
  387. return 'GL_NONE'
  388. - elif fmat.name in ['MESA_FORMAT_YCBCR', 'MESA_FORMAT_YCBCR_REV']:
  389. + elif fmat.name in ['MESA_FORMAT_YCBCR', 'MESA_FORMAT_YCBCR_REV', 'MESA_FORMAT_YUV420_2PLANE', 'MESA_FORMAT_YVU420_2PLANE']:
  390. return 'GL_YCBCR_MESA'
  391. elif fmat.has_channel('r'):
  392. if fmat.has_channel('g'):
  393. diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
  394. index 9cd026f..f81caec 100644
  395. --- a/src/mesa/main/formats.c
  396. +++ b/src/mesa/main/formats.c
  397. @@ -1452,6 +1452,15 @@ _mesa_format_matches_format_and_type(mesa_format mformat,
  398. if (error)
  399. *error = GL_NO_ERROR;
  400. + switch (mformat) {
  401. + case MESA_FORMAT_YUV420_2PLANE:
  402. + case MESA_FORMAT_YVU420_2PLANE:
  403. + return false;
  404. +
  405. + default:
  406. + break;
  407. + }
  408. +
  409. if (_mesa_is_format_compressed(mformat)) {
  410. if (error)
  411. *error = GL_INVALID_ENUM;
  412. diff --git a/src/mesa/main/formats.csv b/src/mesa/main/formats.csv
  413. index 21cdea2..b2d4765 100644
  414. --- a/src/mesa/main/formats.csv
  415. +++ b/src/mesa/main/formats.csv
  416. @@ -92,6 +92,8 @@ MESA_FORMAT_A2R10G10B10_UNORM , packed, 1, 1, 1, un2 , un10, un10, u
  417. MESA_FORMAT_YCBCR , other , 1, 1, 1, x16 , , , , xyzw, yuv
  418. MESA_FORMAT_YCBCR_REV , other , 1, 1, 1, x16 , , , , xyzw, yuv
  419. +MESA_FORMAT_YUV420_2PLANE , other , 1, 1, 1, x8 , , , , y___, yuv
  420. +MESA_FORMAT_YVU420_2PLANE , other , 1, 1, 1, x8 , , , , y___, yuv
  421. MESA_FORMAT_RG_RB_UNORM8 , other , 2, 1, 1, x16 , , , , xyz1, rgb
  422. MESA_FORMAT_GR_BR_UNORM8 , other , 2, 1, 1, x16 , , , , xyz1, rgb
  423. diff --git a/src/mesa/main/formats.h b/src/mesa/main/formats.h
  424. index 508c9c3..0e778d6 100644
  425. --- a/src/mesa/main/formats.h
  426. +++ b/src/mesa/main/formats.h
  427. @@ -617,6 +617,13 @@ typedef enum pipe_format mesa_format;
  428. #define MESA_FORMAT_ATC_RGB PIPE_FORMAT_ATC_RGB
  429. #define MESA_FORMAT_ATC_RGBA_EXPLICIT PIPE_FORMAT_ATC_RGBA_EXPLICIT
  430. #define MESA_FORMAT_ATC_RGBA_INTERPOLATED PIPE_FORMAT_ATC_RGBA_INTERPOLATED
  431. +
  432. +#define HAVE_MESA_FORMAT_YUV420_2PLANE
  433. +#define MESA_FORMAT_YUV420_2PLANE PIPE_FORMAT_YUV420_2PLANE
  434. +
  435. +#define HAVE_MESA_FORMAT_YVU420_2PLANE
  436. +#define MESA_FORMAT_YVU420_2PLANE PIPE_FORMAT_YVU420_2PLANE
  437. +
  438. #define MESA_FORMAT_COUNT PIPE_FORMAT_COUNT
  439. /* Packed to array format adapters */
  440. diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
  441. index 32528a5..8f77d4c 100644
  442. --- a/src/mesa/main/mtypes.h
  443. +++ b/src/mesa/main/mtypes.h
  444. @@ -158,6 +158,7 @@ _mesa_varying_slot_in_fs(gl_varying_slot slot)
  445. */
  446. struct gl_config
  447. {
  448. + GLboolean rgbMode;
  449. GLboolean floatMode;
  450. GLuint doubleBufferMode;
  451. GLuint stereoMode;
  452. @@ -179,6 +180,14 @@ struct gl_config
  453. /* EXT_framebuffer_sRGB */
  454. GLint sRGBCapable;
  455. +
  456. + /* EXT_yuv_surface */
  457. + GLint YUVOrder;
  458. + GLint YUVNumberOfPlanes;
  459. + GLint YUVSubsample;
  460. + GLint YUVDepthRange;
  461. + GLint YUVCSCStandard;
  462. + GLint YUVPlaneBPP;
  463. };