0054-target-riscv-rvv-1.0-integer-comparison-instructions.patch 3.9 KB

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  1. From 2b28bc696cde7658f9e987f3d001e2ac51356223 Mon Sep 17 00:00:00 2001
  2. From: Frank Chang <frank.chang@sifive.com>
  3. Date: Tue, 4 Aug 2020 11:06:25 +0800
  4. Subject: [PATCH 054/107] target/riscv: rvv-1.0: integer comparison
  5. instructions
  6. * Sign-extend vmselu.vi and vmsgtu.vi immediate values.
  7. * Remove "set tail elements to zeros" as tail elements can be unchanged
  8. for either VTA to have undisturbed or agnostic setting.
  9. Signed-off-by: Frank Chang <frank.chang@sifive.com>
  10. Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
  11. ---
  12. target/riscv/insn_trans/trans_rvv.c.inc | 4 ++--
  13. target/riscv/vector_helper.c | 8 --------
  14. 2 files changed, 2 insertions(+), 10 deletions(-)
  15. diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
  16. index 715b09eda9..5f02399ad3 100644
  17. --- a/target/riscv/insn_trans/trans_rvv.c.inc
  18. +++ b/target/riscv/insn_trans/trans_rvv.c.inc
  19. @@ -2038,9 +2038,9 @@ GEN_OPIVX_TRANS(vmsgt_vx, opivx_cmp_check)
  20. GEN_OPIVI_TRANS(vmseq_vi, IMM_SX, vmseq_vx, opivx_cmp_check)
  21. GEN_OPIVI_TRANS(vmsne_vi, IMM_SX, vmsne_vx, opivx_cmp_check)
  22. -GEN_OPIVI_TRANS(vmsleu_vi, IMM_ZX, vmsleu_vx, opivx_cmp_check)
  23. +GEN_OPIVI_TRANS(vmsleu_vi, IMM_SX, vmsleu_vx, opivx_cmp_check)
  24. GEN_OPIVI_TRANS(vmsle_vi, IMM_SX, vmsle_vx, opivx_cmp_check)
  25. -GEN_OPIVI_TRANS(vmsgtu_vi, IMM_ZX, vmsgtu_vx, opivx_cmp_check)
  26. +GEN_OPIVI_TRANS(vmsgtu_vi, IMM_SX, vmsgtu_vx, opivx_cmp_check)
  27. GEN_OPIVI_TRANS(vmsgt_vi, IMM_SX, vmsgt_vx, opivx_cmp_check)
  28. /* Vector Integer Min/Max Instructions */
  29. diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
  30. index 19542c9f5a..f9c2f9cd89 100644
  31. --- a/target/riscv/vector_helper.c
  32. +++ b/target/riscv/vector_helper.c
  33. @@ -1399,7 +1399,6 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \
  34. { \
  35. uint32_t vm = vext_vm(desc); \
  36. uint32_t vl = env->vl; \
  37. - uint32_t vlmax = vext_maxsz(desc) / sizeof(ETYPE); \
  38. uint32_t i; \
  39. \
  40. for (i = 0; i < vl; i++) { \
  41. @@ -1410,9 +1409,6 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \
  42. } \
  43. vext_set_elem_mask(vd, i, DO_OP(s2, s1)); \
  44. } \
  45. - for (; i < vlmax; i++) { \
  46. - vext_set_elem_mask(vd, i, 0); \
  47. - } \
  48. }
  49. GEN_VEXT_CMP_VV(vmseq_vv_b, uint8_t, H1, DO_MSEQ)
  50. @@ -1451,7 +1447,6 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
  51. { \
  52. uint32_t vm = vext_vm(desc); \
  53. uint32_t vl = env->vl; \
  54. - uint32_t vlmax = vext_maxsz(desc) / sizeof(ETYPE); \
  55. uint32_t i; \
  56. \
  57. for (i = 0; i < vl; i++) { \
  58. @@ -1462,9 +1457,6 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
  59. vext_set_elem_mask(vd, i, \
  60. DO_OP(s2, (ETYPE)(target_long)s1)); \
  61. } \
  62. - for (; i < vlmax; i++) { \
  63. - vext_set_elem_mask(vd, i, 0); \
  64. - } \
  65. }
  66. GEN_VEXT_CMP_VX(vmseq_vx_b, uint8_t, H1, DO_MSEQ)
  67. --
  68. 2.33.1