0053-target-riscv-rvv-1.0-single-width-saturating-add-and.patch 1.1 KB

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  1. From edd72346d33d93a26117ba9097ffa3c120e62411 Mon Sep 17 00:00:00 2001
  2. From: Frank Chang <frank.chang@sifive.com>
  3. Date: Thu, 2 Jul 2020 13:34:56 +0800
  4. Subject: [PATCH 053/107] target/riscv: rvv-1.0: single-width saturating add
  5. and subtract instructions
  6. Sign-extend vsaddu.vi immediate value.
  7. Signed-off-by: Frank Chang <frank.chang@sifive.com>
  8. Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
  9. ---
  10. target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
  11. 1 file changed, 1 insertion(+), 1 deletion(-)
  12. diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
  13. index ebbb415c17..715b09eda9 100644
  14. --- a/target/riscv/insn_trans/trans_rvv.c.inc
  15. +++ b/target/riscv/insn_trans/trans_rvv.c.inc
  16. @@ -2232,7 +2232,7 @@ GEN_OPIVX_TRANS(vsaddu_vx, opivx_check)
  17. GEN_OPIVX_TRANS(vsadd_vx, opivx_check)
  18. GEN_OPIVX_TRANS(vssubu_vx, opivx_check)
  19. GEN_OPIVX_TRANS(vssub_vx, opivx_check)
  20. -GEN_OPIVI_TRANS(vsaddu_vi, IMM_ZX, vsaddu_vx, opivx_check)
  21. +GEN_OPIVI_TRANS(vsaddu_vi, IMM_SX, vsaddu_vx, opivx_check)
  22. GEN_OPIVI_TRANS(vsadd_vi, IMM_SX, vsadd_vx, opivx_check)
  23. /* Vector Single-Width Averaging Add and Subtract */
  24. --
  25. 2.33.1