0017-target-riscv-rvv-1.0-add-vlenb-register.patch 1.9 KB

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  1. From f99c83a4df678dbdcf08ef109e876e3c3c2027c8 Mon Sep 17 00:00:00 2001
  2. From: Greentime Hu <greentime.hu@sifive.com>
  3. Date: Thu, 9 Jul 2020 16:16:00 +0800
  4. Subject: [PATCH 017/107] target/riscv: rvv-1.0: add vlenb register
  5. Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
  6. Signed-off-by: Frank Chang <frank.chang@sifive.com>
  7. Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
  8. Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
  9. ---
  10. target/riscv/cpu_bits.h | 1 +
  11. target/riscv/csr.c | 7 +++++++
  12. 2 files changed, 8 insertions(+)
  13. diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
  14. index 9ad27ff280..4ed4ca091f 100644
  15. --- a/target/riscv/cpu_bits.h
  16. +++ b/target/riscv/cpu_bits.h
  17. @@ -63,6 +63,7 @@
  18. #define CSR_VCSR 0x00f
  19. #define CSR_VL 0xc20
  20. #define CSR_VTYPE 0xc21
  21. +#define CSR_VLENB 0xc22
  22. /* VCSR fields */
  23. #define VCSR_VXSAT_SHIFT 0
  24. diff --git a/target/riscv/csr.c b/target/riscv/csr.c
  25. index 6e19677318..5a0bc9a71f 100644
  26. --- a/target/riscv/csr.c
  27. +++ b/target/riscv/csr.c
  28. @@ -264,6 +264,12 @@ static int read_vtype(CPURISCVState *env, int csrno, target_ulong *val)
  29. return 0;
  30. }
  31. +static int read_vlenb(CPURISCVState *env, int csrno, target_ulong *val)
  32. +{
  33. + *val = env_archcpu(env)->cfg.vlen >> 3;
  34. + return 0;
  35. +}
  36. +
  37. static int read_vl(CPURISCVState *env, int csrno, target_ulong *val)
  38. {
  39. *val = env->vl;
  40. @@ -1413,6 +1419,7 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
  41. [CSR_VCSR] = { "vcsr", vs, read_vcsr, write_vcsr },
  42. [CSR_VL] = { "vl", vs, read_vl },
  43. [CSR_VTYPE] = { "vtype", vs, read_vtype },
  44. + [CSR_VLENB] = { "vlenb", vs, read_vlenb },
  45. /* User Timers and Counters */
  46. [CSR_CYCLE] = { "cycle", ctr, read_instret },
  47. [CSR_INSTRET] = { "instret", ctr, read_instret },
  48. --
  49. 2.33.1