0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch 1.6 KB

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  1. From 883b6c0930410f8553b3bce0dd98131bc1694fa6 Mon Sep 17 00:00:00 2001
  2. From: Zhenhua Luo <zhenhua.luo@nxp.com>
  3. Date: Sat, 11 Jun 2016 22:08:29 -0500
  4. Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic
  5. The wait mnemonic for ppc targets is incorrectly assembled into 0x7c00003c due
  6. to duplicated address definition with waitasec instruction. The issue causes
  7. kernel boot calltrace for ppc targets when wait instruction is executed.
  8. Upstream-Status: Pending
  9. Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com>
  10. ---
  11. opcodes/ppc-opc.c | 4 +---
  12. 1 file changed, 1 insertion(+), 3 deletions(-)
  13. diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
  14. index 7637d3e349e..8e074e13208 100644
  15. --- a/opcodes/ppc-opc.c
  16. +++ b/opcodes/ppc-opc.c
  17. @@ -6947,8 +6947,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
  18. {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
  19. {"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, EXT, {0}},
  20. {"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, EXT, {0}},
  21. -{"wait", X(31,30), XWCPL_MASK, POWER10, 0, {WC, PL}},
  22. -{"wait", X(31,30), XWC_MASK, POWER9, POWER10, {WC}},
  23. {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
  24. @@ -7002,7 +7000,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
  25. {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
  26. {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
  27. -{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}},
  28. +{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9|POWER10, 0, {WC}},
  29. {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},