0059-target-riscv-rvv-1.0-narrowing-fixed-point-clip-inst.patch 8.0 KB

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  1. From 41602bba0f77b79025625f539bd61bbc99d8e654 Mon Sep 17 00:00:00 2001
  2. From: Frank Chang <frank.chang@sifive.com>
  3. Date: Thu, 2 Jul 2020 16:40:44 +0800
  4. Subject: [PATCH 059/107] target/riscv: rvv-1.0: narrowing fixed-point clip
  5. instructions
  6. Signed-off-by: Frank Chang <frank.chang@sifive.com>
  7. Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
  8. ---
  9. target/riscv/helper.h | 24 ++++++------
  10. target/riscv/insn32.decode | 12 +++---
  11. target/riscv/insn_trans/trans_rvv.c.inc | 12 +++---
  12. target/riscv/vector_helper.c | 52 ++++++++++++-------------
  13. 4 files changed, 50 insertions(+), 50 deletions(-)
  14. diff --git a/target/riscv/helper.h b/target/riscv/helper.h
  15. index 444dbca071..7ba8c77c6f 100644
  16. --- a/target/riscv/helper.h
  17. +++ b/target/riscv/helper.h
  18. @@ -800,18 +800,18 @@ DEF_HELPER_6(vssra_vx_h, void, ptr, ptr, tl, ptr, env, i32)
  19. DEF_HELPER_6(vssra_vx_w, void, ptr, ptr, tl, ptr, env, i32)
  20. DEF_HELPER_6(vssra_vx_d, void, ptr, ptr, tl, ptr, env, i32)
  21. -DEF_HELPER_6(vnclip_vv_b, void, ptr, ptr, ptr, ptr, env, i32)
  22. -DEF_HELPER_6(vnclip_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
  23. -DEF_HELPER_6(vnclip_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
  24. -DEF_HELPER_6(vnclipu_vv_b, void, ptr, ptr, ptr, ptr, env, i32)
  25. -DEF_HELPER_6(vnclipu_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
  26. -DEF_HELPER_6(vnclipu_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
  27. -DEF_HELPER_6(vnclipu_vx_b, void, ptr, ptr, tl, ptr, env, i32)
  28. -DEF_HELPER_6(vnclipu_vx_h, void, ptr, ptr, tl, ptr, env, i32)
  29. -DEF_HELPER_6(vnclipu_vx_w, void, ptr, ptr, tl, ptr, env, i32)
  30. -DEF_HELPER_6(vnclip_vx_b, void, ptr, ptr, tl, ptr, env, i32)
  31. -DEF_HELPER_6(vnclip_vx_h, void, ptr, ptr, tl, ptr, env, i32)
  32. -DEF_HELPER_6(vnclip_vx_w, void, ptr, ptr, tl, ptr, env, i32)
  33. +DEF_HELPER_6(vnclip_wv_b, void, ptr, ptr, ptr, ptr, env, i32)
  34. +DEF_HELPER_6(vnclip_wv_h, void, ptr, ptr, ptr, ptr, env, i32)
  35. +DEF_HELPER_6(vnclip_wv_w, void, ptr, ptr, ptr, ptr, env, i32)
  36. +DEF_HELPER_6(vnclipu_wv_b, void, ptr, ptr, ptr, ptr, env, i32)
  37. +DEF_HELPER_6(vnclipu_wv_h, void, ptr, ptr, ptr, ptr, env, i32)
  38. +DEF_HELPER_6(vnclipu_wv_w, void, ptr, ptr, ptr, ptr, env, i32)
  39. +DEF_HELPER_6(vnclipu_wx_b, void, ptr, ptr, tl, ptr, env, i32)
  40. +DEF_HELPER_6(vnclipu_wx_h, void, ptr, ptr, tl, ptr, env, i32)
  41. +DEF_HELPER_6(vnclipu_wx_w, void, ptr, ptr, tl, ptr, env, i32)
  42. +DEF_HELPER_6(vnclip_wx_b, void, ptr, ptr, tl, ptr, env, i32)
  43. +DEF_HELPER_6(vnclip_wx_h, void, ptr, ptr, tl, ptr, env, i32)
  44. +DEF_HELPER_6(vnclip_wx_w, void, ptr, ptr, tl, ptr, env, i32)
  45. DEF_HELPER_6(vfadd_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
  46. DEF_HELPER_6(vfadd_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
  47. diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
  48. index 169b73fdc4..302b687a2d 100644
  49. --- a/target/riscv/insn32.decode
  50. +++ b/target/riscv/insn32.decode
  51. @@ -491,12 +491,12 @@ vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm
  52. vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm
  53. vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm
  54. vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm
  55. -vnclipu_vv 101110 . ..... ..... 000 ..... 1010111 @r_vm
  56. -vnclipu_vx 101110 . ..... ..... 100 ..... 1010111 @r_vm
  57. -vnclipu_vi 101110 . ..... ..... 011 ..... 1010111 @r_vm
  58. -vnclip_vv 101111 . ..... ..... 000 ..... 1010111 @r_vm
  59. -vnclip_vx 101111 . ..... ..... 100 ..... 1010111 @r_vm
  60. -vnclip_vi 101111 . ..... ..... 011 ..... 1010111 @r_vm
  61. +vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm
  62. +vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm
  63. +vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm
  64. +vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm
  65. +vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm
  66. +vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm
  67. vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm
  68. vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm
  69. vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm
  70. diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
  71. index c1aaf01bdc..aac29a31a7 100644
  72. --- a/target/riscv/insn_trans/trans_rvv.c.inc
  73. +++ b/target/riscv/insn_trans/trans_rvv.c.inc
  74. @@ -2267,12 +2267,12 @@ GEN_OPIVI_TRANS(vssrl_vi, IMM_ZX, vssrl_vx, opivx_check)
  75. GEN_OPIVI_TRANS(vssra_vi, IMM_SX, vssra_vx, opivx_check)
  76. /* Vector Narrowing Fixed-Point Clip Instructions */
  77. -GEN_OPIVV_NARROW_TRANS(vnclipu_vv)
  78. -GEN_OPIVV_NARROW_TRANS(vnclip_vv)
  79. -GEN_OPIVX_NARROW_TRANS(vnclipu_vx)
  80. -GEN_OPIVX_NARROW_TRANS(vnclip_vx)
  81. -GEN_OPIVI_NARROW_TRANS(vnclipu_vi, IMM_ZX, vnclipu_vx)
  82. -GEN_OPIVI_NARROW_TRANS(vnclip_vi, IMM_ZX, vnclip_vx)
  83. +GEN_OPIWV_NARROW_TRANS(vnclipu_wv)
  84. +GEN_OPIWV_NARROW_TRANS(vnclip_wv)
  85. +GEN_OPIWX_NARROW_TRANS(vnclipu_wx)
  86. +GEN_OPIWX_NARROW_TRANS(vnclip_wx)
  87. +GEN_OPIWI_NARROW_TRANS(vnclipu_wi, IMM_ZX, vnclipu_wx)
  88. +GEN_OPIWI_NARROW_TRANS(vnclip_wi, IMM_ZX, vnclip_wx)
  89. /*
  90. *** Vector Float Point Arithmetic Instructions
  91. diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
  92. index 3f9556f4d4..dd18ca26f8 100644
  93. --- a/target/riscv/vector_helper.c
  94. +++ b/target/riscv/vector_helper.c
  95. @@ -3084,19 +3084,19 @@ vnclip32(CPURISCVState *env, int vxrm, int64_t a, int32_t b)
  96. }
  97. }
  98. -RVVCALL(OPIVV2_RM, vnclip_vv_b, NOP_SSS_B, H1, H2, H1, vnclip8)
  99. -RVVCALL(OPIVV2_RM, vnclip_vv_h, NOP_SSS_H, H2, H4, H2, vnclip16)
  100. -RVVCALL(OPIVV2_RM, vnclip_vv_w, NOP_SSS_W, H4, H8, H4, vnclip32)
  101. -GEN_VEXT_VV_RM(vnclip_vv_b, 1, 1)
  102. -GEN_VEXT_VV_RM(vnclip_vv_h, 2, 2)
  103. -GEN_VEXT_VV_RM(vnclip_vv_w, 4, 4)
  104. -
  105. -RVVCALL(OPIVX2_RM, vnclip_vx_b, NOP_SSS_B, H1, H2, vnclip8)
  106. -RVVCALL(OPIVX2_RM, vnclip_vx_h, NOP_SSS_H, H2, H4, vnclip16)
  107. -RVVCALL(OPIVX2_RM, vnclip_vx_w, NOP_SSS_W, H4, H8, vnclip32)
  108. -GEN_VEXT_VX_RM(vnclip_vx_b, 1, 1)
  109. -GEN_VEXT_VX_RM(vnclip_vx_h, 2, 2)
  110. -GEN_VEXT_VX_RM(vnclip_vx_w, 4, 4)
  111. +RVVCALL(OPIVV2_RM, vnclip_wv_b, NOP_SSS_B, H1, H2, H1, vnclip8)
  112. +RVVCALL(OPIVV2_RM, vnclip_wv_h, NOP_SSS_H, H2, H4, H2, vnclip16)
  113. +RVVCALL(OPIVV2_RM, vnclip_wv_w, NOP_SSS_W, H4, H8, H4, vnclip32)
  114. +GEN_VEXT_VV_RM(vnclip_wv_b, 1, 1)
  115. +GEN_VEXT_VV_RM(vnclip_wv_h, 2, 2)
  116. +GEN_VEXT_VV_RM(vnclip_wv_w, 4, 4)
  117. +
  118. +RVVCALL(OPIVX2_RM, vnclip_wx_b, NOP_SSS_B, H1, H2, vnclip8)
  119. +RVVCALL(OPIVX2_RM, vnclip_wx_h, NOP_SSS_H, H2, H4, vnclip16)
  120. +RVVCALL(OPIVX2_RM, vnclip_wx_w, NOP_SSS_W, H4, H8, vnclip32)
  121. +GEN_VEXT_VX_RM(vnclip_wx_b, 1, 1)
  122. +GEN_VEXT_VX_RM(vnclip_wx_h, 2, 2)
  123. +GEN_VEXT_VX_RM(vnclip_wx_w, 4, 4)
  124. static inline uint8_t
  125. vnclipu8(CPURISCVState *env, int vxrm, uint16_t a, uint8_t b)
  126. @@ -3134,7 +3134,7 @@ static inline uint32_t
  127. vnclipu32(CPURISCVState *env, int vxrm, uint64_t a, uint32_t b)
  128. {
  129. uint8_t round, shift = b & 0x3f;
  130. - int64_t res;
  131. + uint64_t res;
  132. round = get_round(vxrm, a, shift);
  133. res = (a >> shift) + round;
  134. @@ -3146,19 +3146,19 @@ vnclipu32(CPURISCVState *env, int vxrm, uint64_t a, uint32_t b)
  135. }
  136. }
  137. -RVVCALL(OPIVV2_RM, vnclipu_vv_b, NOP_UUU_B, H1, H2, H1, vnclipu8)
  138. -RVVCALL(OPIVV2_RM, vnclipu_vv_h, NOP_UUU_H, H2, H4, H2, vnclipu16)
  139. -RVVCALL(OPIVV2_RM, vnclipu_vv_w, NOP_UUU_W, H4, H8, H4, vnclipu32)
  140. -GEN_VEXT_VV_RM(vnclipu_vv_b, 1, 1)
  141. -GEN_VEXT_VV_RM(vnclipu_vv_h, 2, 2)
  142. -GEN_VEXT_VV_RM(vnclipu_vv_w, 4, 4)
  143. +RVVCALL(OPIVV2_RM, vnclipu_wv_b, NOP_UUU_B, H1, H2, H1, vnclipu8)
  144. +RVVCALL(OPIVV2_RM, vnclipu_wv_h, NOP_UUU_H, H2, H4, H2, vnclipu16)
  145. +RVVCALL(OPIVV2_RM, vnclipu_wv_w, NOP_UUU_W, H4, H8, H4, vnclipu32)
  146. +GEN_VEXT_VV_RM(vnclipu_wv_b, 1, 1)
  147. +GEN_VEXT_VV_RM(vnclipu_wv_h, 2, 2)
  148. +GEN_VEXT_VV_RM(vnclipu_wv_w, 4, 4)
  149. -RVVCALL(OPIVX2_RM, vnclipu_vx_b, NOP_UUU_B, H1, H2, vnclipu8)
  150. -RVVCALL(OPIVX2_RM, vnclipu_vx_h, NOP_UUU_H, H2, H4, vnclipu16)
  151. -RVVCALL(OPIVX2_RM, vnclipu_vx_w, NOP_UUU_W, H4, H8, vnclipu32)
  152. -GEN_VEXT_VX_RM(vnclipu_vx_b, 1, 1)
  153. -GEN_VEXT_VX_RM(vnclipu_vx_h, 2, 2)
  154. -GEN_VEXT_VX_RM(vnclipu_vx_w, 4, 4)
  155. +RVVCALL(OPIVX2_RM, vnclipu_wx_b, NOP_UUU_B, H1, H2, vnclipu8)
  156. +RVVCALL(OPIVX2_RM, vnclipu_wx_h, NOP_UUU_H, H2, H4, vnclipu16)
  157. +RVVCALL(OPIVX2_RM, vnclipu_wx_w, NOP_UUU_W, H4, H8, vnclipu32)
  158. +GEN_VEXT_VX_RM(vnclipu_wx_b, 1, 1)
  159. +GEN_VEXT_VX_RM(vnclipu_wx_h, 2, 2)
  160. +GEN_VEXT_VX_RM(vnclipu_wx_w, 4, 4)
  161. /*
  162. *** Vector Float Point Arithmetic Instructions
  163. --
  164. 2.33.1