From cc2d8c8bed31f441206b53009d5d681132c6e332 Mon Sep 17 00:00:00 2001 From: "max.ma" Date: Wed, 29 Sep 2021 02:42:26 -0700 Subject: [PATCH 01/11] merge from dubhe-pr-06-30 to support b0.94 --- gas/config/tc-riscv.c | 24 +++ gas/testsuite/gas/riscv/b-ext-64.d | 69 +++++++ gas/testsuite/gas/riscv/b-ext-64.s | 69 +++++++ gas/testsuite/gas/riscv/b-ext.d | 39 ++++ gas/testsuite/gas/riscv/b-ext.s | 39 ++++ include/opcode/riscv-opc.h | 206 +++++++++++++++++++ include/opcode/riscv.h | 12 ++ opcodes/riscv-opc.c | 316 +++++++++++++++++++++++++++++ 8 files changed, 774 insertions(+) diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 70cbc8190f..e5d8070b75 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -343,6 +343,30 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class) case INSN_CLASS_ZBC: return riscv_subset_supports ("zbc"); + case INSN_CLASS_ZBE: + return riscv_subset_supports ("zbe"); + case INSN_CLASS_ZBF: + return riscv_subset_supports ("zbf"); + case INSN_CLASS_ZBM: + return riscv_subset_supports ("zbm"); + case INSN_CLASS_ZBP: + return riscv_subset_supports ("zbp"); + case INSN_CLASS_ZBR: + return riscv_subset_supports ("zbr"); + case INSN_CLASS_ZBS: + return riscv_subset_supports ("zbs"); + case INSN_CLASS_ZBT: + return riscv_subset_supports ("zbt"); + case INSN_CLASS_ZBB_OR_ZBP: + return (riscv_subset_supports ("zbb") || riscv_subset_supports ("zbp")); + case INSN_CLASS_ZBS_OR_ZBE: + return (riscv_subset_supports ("zbs") || riscv_subset_supports ("zbe")); + case INSN_CLASS_ZBP_OR_ZBM: + return (riscv_subset_supports ("zbp") || riscv_subset_supports ("zbm")); + case INSN_CLASS_ZBP_OR_ZBE_OR_ZBF: + return (riscv_subset_supports ("zbp") || riscv_subset_supports ("zbe") || riscv_subset_supports ("zbf")); + case INSN_CLASS_ZBP_OR_ZBE_OR_ZBF_OR_ZBM: + return (riscv_subset_supports ("zbp") || riscv_subset_supports ("zbe") || riscv_subset_supports ("zbf") || riscv_subset_supports ("zbm")); default: as_fatal ("internal: unreachable"); return false; diff --git a/gas/testsuite/gas/riscv/b-ext-64.d b/gas/testsuite/gas/riscv/b-ext-64.d index f4a7abf02d..d1b512b9e9 100644 --- a/gas/testsuite/gas/riscv/b-ext-64.d +++ b/gas/testsuite/gas/riscv/b-ext-64.d @@ -46,3 +46,72 @@ Disassembly of section .text: [ ]+8c:[ ]+08c5853b[ ]+add.uw[ ]+a0,a1,a2 [ ]+90:[ ]+0805853b[ ]+zext.w[ ]+a0,a1 [ ]+94:[ ]+0825951b[ ]+slli.uw[ ]+a0,a1,0x2 +[ ]+98:[ ]+08c5c533[ ]+pack[ ]+a0,a1,a2 +[ ]+9c:[ ]+48c5c533[ ]+packu[ ]+a0,a1,a2 +[ ]+a0:[ ]+08c5f533[ ]+packh[ ]+a0,a1,a2 +[ ]+a4:[ ]+0825c53b[ ]+packw[ ]+a0,a1,0x2 +[ ]+a8:[ ]+4825c53b[ ]+packuw[ ]+a0,a1,0x2 +[ ]+ac:[ ]+68c5d533[ ]+grev[ ]+a0,a1,a2 +[ ]+b0:[ ]+6825d513[ ]+rev2.n[ ]+a0,a1 +[ ]+b4:[ ]+6825d53b[ ]+grevw[ ]+a0,a1,0x2 +[ ]+b8:[ ]+6825d51b[ ]+greviw[ ]+a0,a1,0x2 +[ ]+bc:[ ]+28c5d533[ ]+gorc[ ]+a0,a1,a2 +[ ]+c0:[ ]+2825d513[ ]+orc2.n[ ]+a0,a1 +[ ]+c4:[ ]+2825d53b[ ]+gorcw[ ]+a0,a1,0x2 +[ ]+c8:[ ]+2825d51b[ ]+gorciw[ ]+a0,a1,0x2 +[ ]+cc:[ ]+08c59533[ ]+shfl[ ]+a0,a1,a2 +[ ]+d0:[ ]+08259513[ ]+zip2.b[ ]+a0,a1 +[ ]+d4:[ ]+0825953b[ ]+shflw[ ]+a0,a1,0x2 +[ ]+d8:[ ]+08c5d533[ ]+unshfl[ ]+a0,a1,a2 +[ ]+dc:[ ]+0825d513[ ]+unzip2.b[ ]+a0,a1 +[ ]+e0:[ ]+0825d53b[ ]+unshflw[ ]+a0,a1,0x2 +[ ]+e4:[ ]+28c5a533[ ]+xperm.n[ ]+a0,a1,a2 +[ ]+e8:[ ]+28c5c533[ ]+xperm.b[ ]+a0,a1,a2 +[ ]+ec:[ ]+28c5e533[ ]+xperm.h[ ]+a0,a1,a2 +[ ]+f0:[ ]+28258533[ ]+xperm.w[ ]+a0,a1,0x2 +[ ]+f4:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 +[ ]+f8:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 +[ ]+fc:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 +[ ]+100:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 +[ ]+104:[ ]+48c5e533[ ]+bdecompress[ ]+a0,a1,a2 +[ ]+108:[ ]+28259513[ ]+bseti[ ]+a0,a1,0x2 +[ ]+10c:[ ]+48259513[ ]+bclri[ ]+a0,a1,0x2 +[ ]+110:[ ]+68259513[ ]+binvi[ ]+a0,a1,0x2 +[ ]+114:[ ]+4825d513[ ]+bexti[ ]+a0,a1,0x2 +[ ]+118:[ ]+28c5953b[ ]+bsetw[ ]+a0,a1,a2 +[ ]+11c:[ ]+48c5953b[ ]+bclrw[ ]+a0,a1,a2 +[ ]+120:[ ]+68c5953b[ ]+binvw[ ]+a0,a1,a2 +[ ]+124:[ ]+48c5d53b[ ]+bextw[ ]+a0,a1,a2 +[ ]+128:[ ]+4825e53b[ ]+bdecompressw[ ]+a0,a1,0x2 +[ ]+12c:[ ]+2825951b[ ]+bsetiw[ ]+a0,a1,0x2 +[ ]+130:[ ]+4825951b[ ]+bclriw[ ]+a0,a1,0x2 +[ ]+134:[ ]+6825951b[ ]+binviw[ ]+a0,a1,0x2 +[ ]+138:[ ]+20c59533[ ]+slo[ ]+a0,a1,a2 +[ ]+13c:[ ]+20c5d533[ ]+sro[ ]+a0,a1,a2 +[ ]+140:[ ]+20259513[ ]+sloi[ ]+a0,a1,0x2 +[ ]+144:[ ]+2025d513[ ]+sroi[ ]+a0,a1,0x2 +[ ]+148:[ ]+2025953b[ ]+slow[ ]+a0,a1,0x2 +[ ]+14c:[ ]+2025d53b[ ]+srow[ ]+a0,a1,0x2 +[ ]+150:[ ]+2025951b[ ]+sloiw[ ]+a0,a1,0x2 +[ ]+154:[ ]+2025d51b[ ]+sroiw[ ]+a0,a1,0x2 +[ ]+158:[ ]+48c5f533[ ]+bfp[ ]+a0,a1,a2 +[ ]+15c:[ ]+4825f53b[ ]+bfpw[ ]+a0,a1,0x2 +[ ]+160:[ ]+08c5b533[ ]+bmator[ ]+a0,a1,a2 +[ ]+164:[ ]+48c5b533[ ]+bmatxor[ ]+a0,a1,a2 +[ ]+168:[ ]+60351513[ ]+bmatflip[ ]+a0,a0 +[ ]+16c:[ ]+61051513[ ]+crc32.b[ ]+a0,a0 +[ ]+170:[ ]+61151513[ ]+crc32.h[ ]+a0,a0 +[ ]+174:[ ]+61251513[ ]+crc32.w[ ]+a0,a0 +[ ]+178:[ ]+61851513[ ]+crc32c.b[ ]+a0,a0 +[ ]+17c:[ ]+61951513[ ]+crc32c.h[ ]+a0,a0 +[ ]+180:[ ]+61a51513[ ]+crc32c.w[ ]+a0,a0 +[ ]+184:[ ]+61351513[ ]+crc32.d[ ]+a0,a0 +[ ]+188:[ ]+61b51513[ ]+crc32c.d[ ]+a0,a0 +[ ]+18c:[ ]+6ec59533[ ]+cmix[ ]+a0,a1,a2,a3 +[ ]+190:[ ]+6ec5d533[ ]+cmov[ ]+a0,a1,a2,a3 +[ ]+194:[ ]+6cc59533[ ]+fsl[ ]+a0,a1,a2,a3 +[ ]+198:[ ]+6cc5d533[ ]+fsr[ ]+a0,a1,a2,a3 +[ ]+19c:[ ]+6c25d513[ ]+fsri[ ]+a0,a1,0x2,a3 +[ ]+1a0:[ ]+6c25953b[ ]+fslw[ ]+a0,a1,0x2,a3 +[ ]+1a4:[ ]+6c25d53b[ ]+fsrw[ ]+a0,a1,0x2,a3 +[ ]+1a8:[ ]+6c25d51b[ ]+fsriw[ ]+a0,a1,0x2,a3 \ No newline at end of file diff --git a/gas/testsuite/gas/riscv/b-ext-64.s b/gas/testsuite/gas/riscv/b-ext-64.s index c3ac377f4b..23b1cbe473 100644 --- a/gas/testsuite/gas/riscv/b-ext-64.s +++ b/gas/testsuite/gas/riscv/b-ext-64.s @@ -37,3 +37,72 @@ target: add.uw a0, a1, a2 zext.w a0, a1 slli.uw a0, a1, 2 + pack a0, a1, a2 + packu a0, a1, a2 + packh a0, a1, a2 + packw a0, a1, 2 + packuw a0, a1, 2 + grev a0, a1, a2 + grevi a0, a1, 2 + grevw a0, a1, 2 + greviw a0, a1, 2 + gorc a0, a1, a2 + gorci a0, a1, 2 + gorcw a0, a1, 2 + gorciw a0, a1, 2 + shfl a0, a1, a2 + shfli a0, a1, 2 + shflw a0, a1, 2 + unshfl a0, a1, a2 + unshfli a0, a1, 2 + unshflw a0, a1, 2 + xperm.n a0, a1, a2 + xperm.b a0, a1, a2 + xperm.h a0, a1, a2 + xperm.w a0, a1, 2 + bset a0, a1, a2 + bclr a0, a1, a2 + binv a0, a1, a2 + bext a0, a1, a2 + bdecompress a0, a1, a2 + bseti a0, a1, 2 + bclri a0, a1, 2 + binvi a0, a1, 2 + bexti a0, a1, 2 + bsetw a0, a1, a2 + bclrw a0, a1, a2 + binvw a0, a1, a2 + bextw a0, a1, a2 + bdecompressw a0, a1, 2 + bsetiw a0, a1, 2 + bclriw a0, a1, 2 + binviw a0, a1, 2 + slo a0, a1, a2 + sro a0, a1, a2 + sloi a0, a1, 2 + sroi a0, a1, 2 + slow a0, a1, 2 + srow a0, a1, 2 + sloiw a0, a1, 2 + sroiw a0, a1, 2 + bfp a0, a1, a2 + bfpw a0, a1, 2 + bmator a0, a1, a2 + bmatxor a0, a1, a2 + bmatflip a0, a0 + crc32.b a0, a0 + crc32.h a0, a0 + crc32.w a0, a0 + crc32c.b a0, a0 + crc32c.h a0, a0 + crc32c.w a0, a0 + crc32.d a0, a0 + crc32c.d a0, a0 + cmix a0, a1, a2, a3 + cmov a0, a1, a2, a3 + fsl a0, a1, a2, a3 + fsr a0, a1, a2, a3 + fsri a0, a1, 2, a3 + fslw a0, a1, 2, a3 + fsrw a0, a1, 2, a3 + fsriw a0, a1, 2, a3 \ No newline at end of file diff --git a/gas/testsuite/gas/riscv/b-ext.d b/gas/testsuite/gas/riscv/b-ext.d index 7410796a3b..059a8fa146 100644 --- a/gas/testsuite/gas/riscv/b-ext.d +++ b/gas/testsuite/gas/riscv/b-ext.d @@ -33,3 +33,42 @@ Disassembly of section .text: [ ]+58:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2 [ ]+5c:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2 [ ]+60:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2 +[ ]+64:[ ]+08c5c533[ ]+pack[ ]+a0,a1,a2 +[ ]+68:[ ]+48c5c533[ ]+packu[ ]+a0,a1,a2 +[ ]+6c:[ ]+08c5f533[ ]+packh[ ]+a0,a1,a2 +[ ]+70:[ ]+68c5d533[ ]+grev[ ]+a0,a1,a2 +[ ]+74:[ ]+6825d513[ ]+rev2.n[ ]+a0,a1 +[ ]+78:[ ]+28c5d533[ ]+gorc[ ]+a0,a1,a2 +[ ]+7c:[ ]+2825d513[ ]+orc2.n[ ]+a0,a1 +[ ]+80:[ ]+08c59533[ ]+shfl[ ]+a0,a1,a2 +[ ]+84:[ ]+08259513[ ]+zip2.b[ ]+a0,a1 +[ ]+88:[ ]+08c5d533[ ]+unshfl[ ]+a0,a1,a2 +[ ]+8c:[ ]+0825d513[ ]+unzip2.b[ ]+a0,a1 +[ ]+90:[ ]+28c5a533[ ]+xperm.n[ ]+a0,a1,a2 +[ ]+94:[ ]+28c5c533[ ]+xperm.b[ ]+a0,a1,a2 +[ ]+98:[ ]+28c5e533[ ]+xperm.h[ ]+a0,a1,a2 +[ ]+9c:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2 +[ ]+a0:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2 +[ ]+a4:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2 +[ ]+a8:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2 +[ ]+ac:[ ]+48c5e533[ ]+bdecompress[ ]+a0,a1,a2 +[ ]+b0:[ ]+28259513[ ]+bseti[ ]+a0,a1,0x2 +[ ]+b4:[ ]+48259513[ ]+bclri[ ]+a0,a1,0x2 +[ ]+b8:[ ]+68259513[ ]+binvi[ ]+a0,a1,0x2 +[ ]+bc:[ ]+4825d513[ ]+bexti[ ]+a0,a1,0x2 +[ ]+c0:[ ]+20c59533[ ]+slo[ ]+a0,a1,a2 +[ ]+c4:[ ]+20c5d533[ ]+sro[ ]+a0,a1,a2 +[ ]+c8:[ ]+20259513[ ]+sloi[ ]+a0,a1,0x2 +[ ]+cc:[ ]+2025d513[ ]+sroi[ ]+a0,a1,0x2 +[ ]+d0:[ ]+48c5f533[ ]+bfp[ ]+a0,a1,a2 +[ ]+d4:[ ]+61051513[ ]+crc32.b[ ]+a0,a0 +[ ]+d8:[ ]+61151513[ ]+crc32.h[ ]+a0,a0 +[ ]+dc:[ ]+61251513[ ]+crc32.w[ ]+a0,a0 +[ ]+e0:[ ]+61851513[ ]+crc32c.b[ ]+a0,a0 +[ ]+e4:[ ]+61951513[ ]+crc32c.h[ ]+a0,a0 +[ ]+e8:[ ]+61a51513[ ]+crc32c.w[ ]+a0,a0 +[ ]+ec:[ ]+6ec59533[ ]+cmix[ ]+a0,a1,a2,a3 +[ ]+f0:[ ]+6ec5d533[ ]+cmov[ ]+a0,a1,a2,a3 +[ ]+f4:[ ]+6cc59533[ ]+fsl[ ]+a0,a1,a2,a3 +[ ]+f8:[ ]+6cc5d533[ ]+fsr[ ]+a0,a1,a2,a3 +[ ]+fc:[ ]+6c25d513[ ]+fsri[ ]+a0,a1,0x2,a3 \ No newline at end of file diff --git a/gas/testsuite/gas/riscv/b-ext.s b/gas/testsuite/gas/riscv/b-ext.s index 051dafd171..041af79bbd 100644 --- a/gas/testsuite/gas/riscv/b-ext.s +++ b/gas/testsuite/gas/riscv/b-ext.s @@ -24,3 +24,42 @@ target: clmul a0, a1, a2 clmulh a0, a1, a2 clmulr a0, a1, a2 + pack a0, a1, a2 + packu a0, a1, a2 + packh a0, a1, a2 + grev a0, a1, a2 + grevi a0, a1, 2 + gorc a0, a1, a2 + gorci a0, a1, 2 + shfl a0, a1, a2 + shfli a0, a1, 2 + unshfl a0, a1, a2 + unshfli a0, a1, 2 + xperm.n a0, a1, a2 + xperm.b a0, a1, a2 + xperm.h a0, a1, a2 + bset a0, a1, a2 + bclr a0, a1, a2 + binv a0, a1, a2 + bext a0, a1, a2 + bdecompress a0, a1, a2 + bseti a0, a1, 2 + bclri a0, a1, 2 + binvi a0, a1, 2 + bexti a0, a1, 2 + slo a0, a1, a2 + sro a0, a1, a2 + sloi a0, a1, 2 + sroi a0, a1, 2 + bfp a0, a1, a2 + crc32.b a0, a0 + crc32.h a0, a0 + crc32.w a0, a0 + crc32c.b a0, a0 + crc32c.h a0, a0 + crc32c.w a0, a0 + cmix a0, a1, a2, a3 + cmov a0, a1, a2, a3 + fsl a0, a1, a2, a3 + fsr a0, a1, a2, a3 + fsri a0, a1, 2, a3 \ No newline at end of file diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index 9999da6241..1a80dbf87d 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -113,6 +113,18 @@ #define MASK_SRL 0xfe00707f #define MATCH_SRA 0x40005033 #define MASK_SRA 0xfe00707f +#define MATCH_SLO 0x20001033 +#define MASK_SLO 0xfe00707f +#define MATCH_SLOI 0x20001013 +#define MASK_SLOI 0xfc00707f +#define MATCH_SLOW 0x2000103b +#define MASK_SLOW 0xfe00707f +#define MATCH_SRO 0x20005033 +#define MASK_SRO 0xfe00707f +#define MATCH_SROI 0x20005013 +#define MASK_SROI 0xfc00707f +#define MATCH_SROW 0x2000503b +#define MASK_SROW 0xfe00707f #define MATCH_OR 0x6033 #define MASK_OR 0xfe00707f #define MATCH_AND 0x7033 @@ -429,6 +441,24 @@ #define MASK_CTZ 0xfff0707f #define MATCH_CPOP 0x60201013 #define MASK_CPOP 0xfff0707f +#define MATCH_BMATFLIP 0x60301013 +#define MASK_BMATFLIP 0xfff0707f +#define MATCH_CRC32_B 0x61001013 +#define MASK_CRC32_B 0xfff0707f +#define MATCH_CRC32_H 0x61101013 +#define MASK_CRC32_H 0xfff0707f +#define MATCH_CRC32_W 0x61201013 +#define MASK_CRC32_W 0xfff0707f +#define MATCH_CRC32_D 0x61301013 +#define MASK_CRC32_D 0xfff0707f +#define MATCH_CRC32C_B 0x61801013 +#define MASK_CRC32C_B 0xfff0707f +#define MATCH_CRC32C_H 0x61901013 +#define MASK_CRC32C_H 0xfff0707f +#define MATCH_CRC32C_W 0x61A01013 +#define MASK_CRC32C_W 0xfff0707f +#define MATCH_CRC32C_D 0x61B01013 +#define MASK_CRC32C_D 0xfff0707f #define MATCH_MIN 0xa004033 #define MASK_MIN 0xfe00707f #define MATCH_MINU 0xa005033 @@ -437,14 +467,38 @@ #define MASK_MAX 0xfe00707f #define MATCH_MAXU 0xa007033 #define MASK_MAXU 0xfe00707f +#define MATCH_SHFL 0x8001033 +#define MASK_SHFL 0xfe00707f +#define MATCH_SHFLI 0x8001013 +#define MASK_SHFLI 0xfc00707f +#define MATCH_UNSHFL 0x8005033 +#define MASK_UNSHFL 0xfe00707f +#define MATCH_UNSHFLI 0x8005013 +#define MASK_UNSHFLI 0xfc00707f +#define MATCH_BCOMPRESS 0x8006033 +#define MASK_BCOMPRESS 0xfe00707f +#define MATCH_BDECOMPRESS 0x48006033 +#define MASK_BDECOMPRESS 0xfe00707f #define MATCH_SEXT_B 0x60401013 #define MASK_SEXT_B 0xfff0707f #define MATCH_SEXT_H 0x60501013 #define MASK_SEXT_H 0xfff0707f #define MATCH_PACK 0x8004033 #define MASK_PACK 0xfe00707f +#define MATCH_PACKU 0x48004033 +#define MASK_PACKU 0xfe00707f +#define MATCH_BMATOR 0x8003033 +#define MASK_BMATOR 0xfe00707f +#define MATCH_BMATXOR 0x48003033 +#define MASK_BMATXOR 0xfe00707f +#define MATCH_PACKH 0x8007033 +#define MASK_PACKH 0xfe00707f +#define MATCH_BFP 0x48007033 +#define MASK_BFP 0xfe00707f #define MATCH_PACKW 0x800403b #define MASK_PACKW 0xfe00707f +#define MATCH_PACKUW 0x4800403b +#define MASK_PACKUW 0xfe00707f #define MATCH_ANDN 0x40007033 #define MASK_ANDN 0xfe00707f #define MATCH_ORN 0x40006033 @@ -457,10 +511,40 @@ #define MASK_ROR 0xfe00707f #define MATCH_RORI 0x60005013 #define MASK_RORI 0xfc00707f +#define MATCH_BCLR 0x48001033 +#define MASK_BCLR 0xfe00707f +#define MATCH_BCLRI 0x48001013 +#define MASK_BCLRI 0xfc00707f +#define MATCH_BSET 0x28001033 +#define MASK_BSET 0xfe00707f +#define MATCH_BSETI 0x28001013 +#define MASK_BSETI 0xfc00707f +#define MATCH_BINV 0x68001033 +#define MASK_BINV 0xfe00707f +#define MATCH_BINVI 0x68001013 +#define MASK_BINVI 0xfc00707f +#define MATCH_BEXT 0x48005033 +#define MASK_BEXT 0xfe00707f +#define MATCH_BEXTI 0x48005013 +#define MASK_BEXTI 0xfc00707f +#define MATCH_GREV 0x68005033 +#define MASK_GREV 0xfe00707f #define MATCH_GREVI 0x68005013 #define MASK_GREVI 0xfc00707f +#define MATCH_GORC 0x28005033 +#define MASK_GORC 0xfe00707f #define MATCH_GORCI 0x28005013 #define MASK_GORCI 0xfc00707f +#define MATCH_CMIX 0x6001033 +#define MASK_CMIX 0x600707f +#define MATCH_CMOV 0x6005033 +#define MASK_CMOV 0x600707f +#define MATCH_FSL 0x4001033 +#define MASK_FSL 0x600707f +#define MATCH_FSR 0x4005033 +#define MASK_FSR 0x600707f +#define MATCH_FSRI 0x4005013 +#define MASK_FSRI 0x400707f #define MATCH_CLZW 0x6000101b #define MASK_CLZW 0xfff0707f #define MATCH_CTZW 0x6010101b @@ -485,6 +569,56 @@ #define MASK_SH2ADD_UW 0xfe00707f #define MATCH_SH3ADD_UW 0x2000603b #define MASK_SH3ADD_UW 0xfe00707f +#define MATCH_BCLRW 0x4800103b +#define MASK_BCLRW 0xfe00707f +#define MATCH_BSETW 0x2800103b +#define MASK_BSETW 0xfe00707f +#define MATCH_BINVW 0x6800103b +#define MASK_BINVW 0xfe00707f +#define MATCH_BEXTW 0x4800503b +#define MASK_BEXTW 0xfe00707f +#define MATCH_GORCW 0x2800503b +#define MASK_GORCW 0xfe00707f +#define MATCH_GREVW 0x6800503b +#define MASK_GREVW 0xfe00707f +#define MATCH_SLOIW 0x2000101b +#define MASK_SLOIW 0xfe00707f +#define MATCH_SROIW 0x2000501b +#define MASK_SROIW 0xfe00707f +#define MATCH_BCLRIW 0x4800101b +#define MASK_BCLRIW 0xfe00707f +#define MATCH_BSETIW 0x2800101b +#define MASK_BSETIW 0xfe00707f +#define MATCH_BINVIW 0x6800101b +#define MASK_BINVIW 0xfe00707f +#define MATCH_GORCIW 0x2800501b +#define MASK_GORCIW 0xfe00707f +#define MATCH_GREVIW 0x6800501b +#define MASK_GREVIW 0xfe00707f +#define MATCH_FSLW 0x400103b +#define MASK_FSLW 0x600707f +#define MATCH_FSRW 0x400503B +#define MASK_FSRW 0x600707f +#define MATCH_FSRIW 0x400501B +#define MASK_FSRIW 0x600707f +#define MATCH_SHFLW 0x800103b +#define MASK_SHFLW 0xfe00707f +#define MATCH_UNSHFLW 0x800503b +#define MASK_UNSHFLW 0xfe00707f +#define MATCH_BCOMPRESSW 0x800603B +#define MASK_BCOMPRESSW 0xfe00707f +#define MATCH_BDECOMPRESSW 0x4800603b +#define MASK_BDECOMPRESSW 0xfe00707f +#define MATCH_BFPW 0x4800703b +#define MASK_BFPW 0xfe00707f +#define MATCH_XPERM_N 0x28002033 +#define MASK_XPERM_N 0xfe00707f +#define MATCH_XPERM_B 0x28004033 +#define MASK_XPERM_B 0xfe00707f +#define MATCH_XPERM_H 0x28006033 +#define MASK_XPERM_H 0xfe00707f +#define MATCH_XPERM_W 0x28000033 +#define MASK_XPERM_W 0xfe00707f #define MATCH_ADD_UW 0x800003b #define MASK_ADD_UW 0xfe00707f #define MATCH_SLLI_UW 0x800101b @@ -1102,6 +1236,78 @@ DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW) DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL) DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH) DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR) +DECLARE_INSN(pack, MATCH_PACK, MASK_PACK) +DECLARE_INSN(packu, MATCH_PACKU, MASK_PACKU) +DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH) +DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW) +DECLARE_INSN(packuw, MATCH_PACKUW, MASK_PACKUW) +DECLARE_INSN(grev, MATCH_GREV, MASK_GREV) +DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI) +DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW) +DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW) +DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC) +DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI) +DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW) +DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW) +DECLARE_INSN(shfl, MATCH_SHFL, MASK_SHFL) +DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI) +DECLARE_INSN(shflw, MATCH_SHFLW, MASK_SHFLW) +DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL) +DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI) +DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW) +DECLARE_INSN(xperm_n, MATCH_XPERM_N, MASK_XPERM_N) +DECLARE_INSN(xperm_b, MATCH_XPERM_B, MASK_XPERM_B) +DECLARE_INSN(xperm_h, MATCH_XPERM_H, MASK_XPERM_H) +DECLARE_INSN(xperm_w, MATCH_XPERM_W, MASK_XPERM_W) +DECLARE_INSN(bset, MATCH_BSET, MASK_BSET) +DECLARE_INSN(bclr, MATCH_BCLR, MASK_BCLR) +DECLARE_INSN(binv, MATCH_BINV, MASK_BINV) +DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT) +DECLARE_INSN(bcompress, MATCH_BCOMPRESS, MASK_BCOMPRESS) +DECLARE_INSN(bdecompress, MATCH_BDECOMPRESS, MASK_BDECOMPRESS) +DECLARE_INSN(bseti, MATCH_BSETI, MASK_BSETI) +DECLARE_INSN(bclri, MATCH_BCLRI, MASK_BCLRI) +DECLARE_INSN(binvi, MATCH_BINVI, MASK_BINVI) +DECLARE_INSN(bexti, MATCH_BEXTI, MASK_BEXTI) +DECLARE_INSN(bsetw, MATCH_BSETW, MASK_BSETW) +DECLARE_INSN(bclrw, MATCH_BCLRW, MASK_BCLRW) +DECLARE_INSN(binvw, MATCH_BINVW, MASK_BINVW) +DECLARE_INSN(bextw, MATCH_BEXTW, MASK_BEXTW) +DECLARE_INSN(bcompressw, MATCH_BCOMPRESSW, MASK_BCOMPRESSW) +DECLARE_INSN(bdecompressw, MATCH_BDECOMPRESSW, MASK_BDECOMPRESSW) +DECLARE_INSN(bsetiw, MATCH_BSETIW, MASK_BSETIW) +DECLARE_INSN(bclriw, MATCH_BCLRIW, MASK_BCLRIW) +DECLARE_INSN(binviw, MATCH_BINVIW, MASK_BINVIW) +DECLARE_INSN(slo, MATCH_SLO, MASK_SLO) +DECLARE_INSN(sro, MATCH_SRO, MASK_SRO) +DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI) +DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI) +DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW) +DECLARE_INSN(srow, MATCH_SROW, MASK_SROW) +DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW) +DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW) +DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP) +DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW) +DECLARE_INSN(bmator, MATCH_BMATOR, MASK_BMATOR) +DECLARE_INSN(bmatxor, MATCH_BMATXOR, MASK_BMATXOR) +DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP) +DECLARE_INSN(crc32_b, MATCH_CRC32_B, MASK_CRC32_B) +DECLARE_INSN(crc32_h, MATCH_CRC32_H, MASK_CRC32_H) +DECLARE_INSN(crc32_w, MATCH_CRC32_W, MASK_CRC32_W) +DECLARE_INSN(crc32c_b, MATCH_CRC32C_B, MASK_CRC32C_B) +DECLARE_INSN(crc32c_h, MATCH_CRC32C_H, MASK_CRC32C_H) +DECLARE_INSN(crc32c_w, MATCH_CRC32C_W, MASK_CRC32C_W) +DECLARE_INSN(crc32_d, MATCH_CRC32_D, MASK_CRC32_D) +DECLARE_INSN(crc32c_d, MATCH_CRC32C_D, MASK_CRC32C_D) +DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX) +DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV) +DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL) +DECLARE_INSN(fsr, MATCH_FSR, MASK_FSR) +DECLARE_INSN(fsri, MATCH_FSRI, MASK_FSRI) +DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW) +DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW) +DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW) +DECLARE_INSN(flh, MATCH_FLH, MASK_FLH) DECLARE_INSN(flw, MATCH_FLW, MASK_FLW) DECLARE_INSN(fld, MATCH_FLD, MASK_FLD) DECLARE_INSN(flq, MATCH_FLQ, MASK_FLQ) diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index fdf3df4f5c..ae8c6bd33f 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -319,6 +319,18 @@ enum riscv_insn_class INSN_CLASS_ZBA, INSN_CLASS_ZBB, INSN_CLASS_ZBC, + INSN_CLASS_ZBP, + INSN_CLASS_ZBB_OR_ZBP, + INSN_CLASS_ZBS, + INSN_CLASS_ZBE, + INSN_CLASS_ZBS_OR_ZBE, + INSN_CLASS_ZBF, + INSN_CLASS_ZBM, + INSN_CLASS_ZBP_OR_ZBM, + INSN_CLASS_ZBR, + INSN_CLASS_ZBT, + INSN_CLASS_ZBP_OR_ZBE_OR_ZBF, + INSN_CLASS_ZBP_OR_ZBE_OR_ZBF_OR_ZBM, }; /* This structure holds information for a particular instruction. */ diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index f55a01b071..3d9240262c 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -24,6 +24,130 @@ #include "opcode/riscv.h" #include +#define MASK_SHAMT (OP_MASK_SHAMT << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_32 (0b11111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_64 (0b111111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_P_32 (0b00001 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_P_64 (0b000001 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_N_32 (0b00011 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_N_64 (0b000011 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_B_32 (0b00111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_B_64 (0b000111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_H_32 (0b01111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_H_64 (0b001111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV_W_64 (0b011111 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_32 (0b11110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_64 (0b111110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_N_32 (0b00010 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_N_64 (0b000010 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_B_32 (0b00110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_B_64 (0b000110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_H_32 (0b01110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_H_64 (0b001110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV2_W_64 (0b011110 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_32 (0b11100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_64 (0b111100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_B_32 (0b00100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_B_64 (0b000100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_H_32 (0b01100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_H_64 (0b001100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV4_W_64 (0b011100 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV8_32 (0b11000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV8_64 (0b111000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV8_H_32 (0b01000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV8_H_64 (0b001000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV8_W_64 (0b011000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV16_32 (0b10000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV16_64 (0b110000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV16_W_64 (0b010000 << OP_SH_SHAMT) +#define MATCH_SHAMT_REV32_64 (0b100000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_32 (0b1111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_64 (0b11111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_N_32 (0b0001 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_N_64 (0b00001 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_B_32 (0b0011 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_B_64 (0b00011 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_H_32 (0b0111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_H_64 (0b00111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP_W_64 (0b01111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_32 (0b1110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_64 (0b11110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_B_32 (0b0010 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_B_64 (0b00010 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_H_32 (0b0110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_H_64 (0b00110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP2_W_64 (0b01110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP4_32 (0b1100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP4_64 (0b11100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP4_H_32 (0b0100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP4_H_64 (0b00100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP4_W_64 (0b01100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP8_32 (0b1000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP8_64 (0b11000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP8_W_64 (0b01000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ZIP16_64 (0b10000 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_32 (0b1111 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_64 (0b11111 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_N_32 (0b0001 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_N_64 (0b00001 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_B_32 (0b0011 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_B_64 (0b00011 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_H_32 (0b0111 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_H_64 (0b00111 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP_W_64 (0b01111 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_32 (0b1110 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_64 (0b11110 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_B_32 (0b0010 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_B_64 (0b00010 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_H_32 (0b0110 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_H_64 (0b00110 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP2_W_64 (0b01110 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP4_32 (0b1100 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP4_64 (0b11100 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP4_H_32 (0b0100 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP4_H_64 (0b00100 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP4_W_64 (0b01100 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP8_32 (0b1000 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP8_64 (0b11000 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP8_W_64 (0b01000 << OP_SH_SHAMT) +#define MATCH_SHAMT_UNZIP16_64 (0b10000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_32 (0b11111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_64 (0b111111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_P_32 (0b00001 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_P_64 (0b000001 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_N_32 (0b00011 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_N_64 (0b000011 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_B_32 (0b00111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_B_64 (0b000111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_H_32 (0b01111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_H_64 (0b001111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC_W_64 (0b011111 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_32 (0b11110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_64 (0b111110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_N_32 (0b00010 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_N_64 (0b000010 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_B_32 (0b00110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_B_64 (0b000110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_H_32 (0b01110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_H_64 (0b001110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC2_W_64 (0b011110 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_32 (0b11100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_64 (0b111100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_B_32 (0b00100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_B_64 (0b000100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_H_32 (0b01100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_H_64 (0b001100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC4_W_64 (0b011100 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC8_32 (0b11000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC8_64 (0b111000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC8_H_32 (0b01000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC8_H_64 (0b001000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC8_W_64 (0b011000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC16_32 (0b10000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC16_64 (0b110000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC16_W_64 (0b010000 << OP_SH_SHAMT) +#define MATCH_SHAMT_ORC32_64 (0b100000 << OP_SH_SHAMT) + /* Register names used by gas and objdump. */ const char * const riscv_gpr_names_numeric[NGPR] = @@ -827,6 +951,198 @@ const struct riscv_opcode riscv_opcodes[] = {"clmulh", 0, INSN_CLASS_ZBC, "d,s,t", MATCH_CLMULH, MASK_CLMULH, match_opcode, 0 }, {"clmulr", 0, INSN_CLASS_ZBC, "d,s,t", MATCH_CLMULR, MASK_CLMULR, match_opcode, 0 }, +/* ZBS instructions */ +{"bclr", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BCLR, MASK_BCLR, match_opcode, 0 }, +{"bclri", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BCLRI, MASK_BCLRI, match_opcode, 0 }, +{"bext", 0, INSN_CLASS_ZBS_OR_ZBE, "d,s,t", MATCH_BEXT, MASK_BEXT, match_opcode, 0 }, +{"bexti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BEXTI, MASK_BEXTI, match_opcode, 0 }, +{"binv", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BINV, MASK_BINV, match_opcode, 0 }, +{"binvi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BINVI, MASK_BINVI, match_opcode, 0 }, +{"bset", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_BSET, MASK_BSET, match_opcode, 0 }, +{"bseti", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_BSETI, MASK_BSETI, match_opcode, 0 }, + +/* B instructions excluded from spec1.0 */ +{"rev", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.p", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_P_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.p", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_P_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_N_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_N_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_B_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_B_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_N_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_N_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_B_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_B_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV2_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_B_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_B_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV4_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev8.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV8_H_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev8.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV8_H_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV8_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev16", 32, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV16_32, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev16", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV16_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev16.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV16_W_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"rev32", 64, INSN_CLASS_ZBP, "d,s", MATCH_GREVI|MATCH_SHAMT_REV32_64, MASK_GREVI|MASK_SHAMT, match_opcode, 0 }, +{"zip", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_N_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_N_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_B_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_B_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_H_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_H_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_B_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_B_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_H_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_H_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP2_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip4", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip4", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_H_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_H_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP4_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip8", 32, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP8_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip8", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP8_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP8_W_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"zip16", 64, INSN_CLASS_ZBP, "d,s", MATCH_SHFLI|MATCH_SHAMT_ZIP16_64, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_N_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_N_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_B_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_B_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_H_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_H_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_B_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_B_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_H_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_H_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP2_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip4", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip4", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_H_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_H_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP4_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip8", 32, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP8_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip8", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP8_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP8_W_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"unzip16", 64, INSN_CLASS_ZBP, "d,s", MATCH_UNSHFLI|MATCH_SHAMT_UNZIP16_64, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 }, +{"orc", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.p", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_P_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.p", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_P_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_N_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_N_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.n", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_N_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.n", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_N_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_B_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_B_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc2.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC2_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4.b", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_B_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4.b", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_B_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc4.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC4_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc8", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc8", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc8.h", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_H_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc8.h", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_H_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc8.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC8_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc16", 32, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC16_32, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc16", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC16_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc16.w", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC16_W_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"orc32", 64, INSN_CLASS_ZBP, "d,s", MATCH_GORCI|MATCH_SHAMT_ORC32_64, MASK_GORCI|MASK_SHAMT, match_opcode, 0 }, +{"pack", 0, INSN_CLASS_ZBP_OR_ZBE_OR_ZBF_OR_ZBM, "d,s,t", MATCH_PACK, MASK_PACK, match_opcode, 0 }, +{"packu", 0, INSN_CLASS_ZBP_OR_ZBM, "d,s,t", MATCH_PACKU, MASK_PACKU, match_opcode, 0 }, +{"packh", 0, INSN_CLASS_ZBP_OR_ZBE_OR_ZBF, "d,s,t", MATCH_PACKH, MASK_PACKH, match_opcode, 0 }, +{"packw", 64, INSN_CLASS_ZBP_OR_ZBE_OR_ZBF, "d,s,<", MATCH_PACKW, MASK_PACKW, match_opcode, 0 }, +{"packuw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_PACKUW, MASK_PACKUW, match_opcode, 0 }, +{"grev", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_GREV, MASK_GREV, match_opcode, 0 }, +{"grevi", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_GREVI, MASK_GREVI, match_opcode, 0 }, +{"grevw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GREVW, MASK_GREVW, match_opcode, 0 }, +{"greviw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GREVIW, MASK_GREVIW, match_opcode, 0 }, +{"gorc", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_GORC, MASK_GORC, match_opcode, 0 }, +{"gorci", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_GORCI, MASK_GORCI, match_opcode, 0 }, +{"gorcw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GORCW, MASK_GORCW, match_opcode, 0 }, +{"gorciw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_GORCIW, MASK_GORCIW, match_opcode, 0 }, +{"shfl", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_SHFL, MASK_SHFL, match_opcode, 0 }, +{"shfli", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_SHFLI, MASK_SHFLI, match_opcode, 0 }, +{"shflw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_SHFLW, MASK_SHFLW, match_opcode, 0 }, +{"unshfl", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_UNSHFL, MASK_UNSHFL, match_opcode, 0 }, +{"unshfli", 0, INSN_CLASS_ZBP, "d,s,>", MATCH_UNSHFLI, MASK_UNSHFLI, match_opcode, 0 }, +{"unshflw", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_UNSHFLW, MASK_UNSHFLW, match_opcode, 0 }, +{"xperm.n", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_XPERM_N, MASK_XPERM_N, match_opcode, 0 }, +{"xperm.b", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_XPERM_B, MASK_XPERM_B, match_opcode, 0 }, +{"xperm.h", 0, INSN_CLASS_ZBP, "d,s,t", MATCH_XPERM_H, MASK_XPERM_H, match_opcode, 0 }, +{"xperm.w", 64, INSN_CLASS_ZBP, "d,s,<", MATCH_XPERM_W, MASK_XPERM_W, match_opcode, 0 }, +{"bcompress",0, INSN_CLASS_ZBE, "d,s,t", MATCH_BCOMPRESS, MASK_BCOMPRESS, match_opcode, 0 }, +{"bdecompress",0, INSN_CLASS_ZBE, "d,s,t", MATCH_BDECOMPRESS, MASK_BDECOMPRESS, match_opcode, 0 }, +{"bsetw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BSETW, MASK_BSETW, match_opcode, 0 }, +{"bclrw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BCLRW, MASK_BCLRW, match_opcode, 0 }, +{"binvw", 64, INSN_CLASS_ZBS, "d,s,t", MATCH_BINVW, MASK_BINVW, match_opcode, 0 }, +{"bextw", 64, INSN_CLASS_ZBS_OR_ZBE, "d,s,t", MATCH_BEXTW, MASK_BEXTW, match_opcode, 0 }, +{"bcompressw",64, INSN_CLASS_ZBE, "d,s,<", MATCH_BCOMPRESSW, MASK_BCOMPRESSW, match_opcode, 0 }, +{"bdecompressw",64, INSN_CLASS_ZBE, "d,s,<", MATCH_BDECOMPRESSW, MASK_BDECOMPRESSW, match_opcode, 0 }, +{"bsetiw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_BSETIW, MASK_BSETIW, match_opcode, 0 }, +{"bclriw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_BCLRIW, MASK_BCLRIW, match_opcode, 0 }, +{"binviw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_BINVIW, MASK_BINVIW, match_opcode, 0 }, +{"slo", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_SLO, MASK_SLO, match_opcode, 0 }, +{"sro", 0, INSN_CLASS_ZBS, "d,s,t", MATCH_SRO, MASK_SRO, match_opcode, 0 }, +{"sloi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_SLOI, MASK_SLOI, match_opcode, 0 }, +{"sroi", 0, INSN_CLASS_ZBS, "d,s,>", MATCH_SROI, MASK_SROI, match_opcode, 0 }, +{"slow", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SLOW, MASK_SLOW, match_opcode, 0 }, +{"srow", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SROW, MASK_SROW, match_opcode, 0 }, +{"sloiw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SLOIW, MASK_SLOIW, match_opcode, 0 }, +{"sroiw", 64, INSN_CLASS_ZBS, "d,s,<", MATCH_SROIW, MASK_SROIW, match_opcode, 0 }, +{"bfp", 0, INSN_CLASS_ZBF, "d,s,t", MATCH_BFP, MASK_BFP, match_opcode, 0 }, +{"bfpw", 64, INSN_CLASS_ZBF, "d,s,<", MATCH_BFPW, MASK_BFPW, match_opcode, 0 }, +{"bmator", 64, INSN_CLASS_ZBM, "d,s,t", MATCH_BMATOR, MASK_BMATOR, match_opcode, 0 }, +{"bmatxor", 64, INSN_CLASS_ZBM, "d,s,t", MATCH_BMATXOR, MASK_BMATXOR, match_opcode, 0 }, +{"bmatflip", 64, INSN_CLASS_ZBM, "d,s", MATCH_BMATFLIP, MASK_BMATFLIP, match_opcode, 0 }, +{"crc32.b", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_B, MASK_CRC32_B, match_opcode, 0 }, +{"crc32.h", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_H, MASK_CRC32_H, match_opcode, 0 }, +{"crc32.w", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_W, MASK_CRC32_W, match_opcode, 0 }, +{"crc32c.b", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_B, MASK_CRC32C_B, match_opcode, 0 }, +{"crc32c.h", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_H, MASK_CRC32C_H, match_opcode, 0 }, +{"crc32c.w", 0, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_W, MASK_CRC32C_W, match_opcode, 0 }, +{"crc32.d", 64, INSN_CLASS_ZBR, "d,s", MATCH_CRC32_D, MASK_CRC32_D, match_opcode, 0 }, +{"crc32c.d", 64, INSN_CLASS_ZBR, "d,s", MATCH_CRC32C_D, MASK_CRC32C_D, match_opcode, 0 }, +{"cmix", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_CMIX, MASK_CMIX, match_opcode, 0 }, +{"cmov", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_CMOV, MASK_CMOV, match_opcode, 0 }, +{"fsl", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_FSL, MASK_FSL, match_opcode, 0 }, +{"fsr", 0, INSN_CLASS_ZBT, "d,s,t,r", MATCH_FSR, MASK_FSR, match_opcode, 0 }, +{"fsri", 0, INSN_CLASS_ZBT, "d,s,>,r", MATCH_FSRI, MASK_FSRI, match_opcode, 0 }, +{"fslw", 64, INSN_CLASS_ZBT, "d,s,<,r", MATCH_FSLW, MASK_FSLW, match_opcode, 0 }, +{"fsrw", 64, INSN_CLASS_ZBT, "d,s,<,r", MATCH_FSRW, MASK_FSRW, match_opcode, 0 }, +{"fsriw", 64, INSN_CLASS_ZBT, "d,s,<,r", MATCH_FSRIW, MASK_FSRIW, match_opcode, 0 }, /* Terminate the list. */ {0, 0, INSN_CLASS_NONE, 0, 0, 0, 0, 0} -- 2.33.1