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dubhe: glibc: Update glibc toolchain and added patch files

Updated glibc commit SHA and added new patch files to keep in line with
the latest StarFive toolchain version.

Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
Jun Yuan Tan 2 éve
szülő
commit
7ef4110371

+ 1 - 1
recipes-core/glibc/glibc-version.inc

@@ -1,6 +1,6 @@
 SRCBRANCH ?= "master"
 PV = "2.35"
-SRCREV_glibc ?= "90f0ac10a74b2d43b5a65aab4be40565e359be43"
+SRCREV_glibc ?= "1d3decee997ba2fc24af81803299b2f4f3c47063"
 SRCREV_localedef ?= "95c0221703ad970a52445e9eaf91c4aff35eebef"
 
 GLIBC_GIT_URI ?= "git://sourceware.org/git/glibc.git"

+ 55 - 0
recipes-core/glibc/glibc/0001-RISC-V-Remove-riscv-specific-sigcontext.h.patch

@@ -0,0 +1,55 @@
+From 4f78efecb2ef9e87a15a3dde8adbdaa53f0598d7 Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 13 Sep 2021 09:41:14 +0800
+Subject: [PATCH 1/8] RISC-V: Remove riscv-specific sigcontext.h
+
+Remove riscv-specific sigcontext.h so that Glibc can directly use
+sigcontext.h provided by the kernel to reduce synchronization work
+when new extension support is introduced.
+
+Signed-off-by: max.ma <max.ma@starfivetech.com>
+---
+ .../unix/sysv/linux/riscv/bits/sigcontext.h   | 31 -------------------
+ 1 file changed, 31 deletions(-)
+ delete mode 100644 sysdeps/unix/sysv/linux/riscv/bits/sigcontext.h
+
+diff --git a/sysdeps/unix/sysv/linux/riscv/bits/sigcontext.h b/sysdeps/unix/sysv/linux/riscv/bits/sigcontext.h
+deleted file mode 100644
+index 14e4e06fac..0000000000
+--- a/sysdeps/unix/sysv/linux/riscv/bits/sigcontext.h
++++ /dev/null
+@@ -1,31 +0,0 @@
+-/* Machine-dependent signal context structure for Linux.  RISC-V version.
+-   Copyright (C) 1996-2021 Free Software Foundation, Inc.  This file is part of the GNU C Library.
+-
+-   The GNU C Library is free software; you can redistribute it and/or
+-   modify it under the terms of the GNU Lesser General Public
+-   License as published by the Free Software Foundation; either
+-   version 2.1 of the License, or (at your option) any later version.
+-
+-   The GNU C Library is distributed in the hope that it will be useful,
+-   but WITHOUT ANY WARRANTY; without even the implied warranty of
+-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+-   Lesser General Public License for more details.
+-
+-   You should have received a copy of the GNU Lesser General Public
+-   License along with the GNU C Library.  If not, see
+-   <https://www.gnu.org/licenses/>.  */
+-
+-#ifndef _BITS_SIGCONTEXT_H
+-#define _BITS_SIGCONTEXT_H 1
+-
+-#if !defined _SIGNAL_H && !defined _SYS_UCONTEXT_H
+-# error "Never use <bits/sigcontext.h> directly; include <signal.h> instead."
+-#endif
+-
+-struct sigcontext {
+-  /* gregs[0] holds the program counter.  */
+-  unsigned long int gregs[32];
+-  unsigned long long int fpregs[66] __attribute__ ((__aligned__ (16)));
+-};
+-
+-#endif
+-- 
+2.33.1
+

+ 30 - 0
recipes-core/glibc/glibc/0002-RISC-V-Reserve-about-5K-space-in-mcontext_t-to-suppo.patch

@@ -0,0 +1,30 @@
+From bcface37cf6df3f3b0800f79e4282a690122b0c8 Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 13 Sep 2021 09:41:15 +0800
+Subject: [PATCH 2/8] RISC-V: Reserve about 5K space in mcontext_t to support
+ future ISA expansion.
+
+Following the changes of struct sigcontext in Linux to reserve about 5K space
+to support future ISA expansion.
+
+Signed-off-by: max.ma <max.ma@starfivetech.com>
+---
+ sysdeps/unix/sysv/linux/riscv/sys/ucontext.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h b/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h
+index cfafa44f99..80caf078fc 100644
+--- a/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h
++++ b/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h
+@@ -82,6 +82,8 @@ typedef struct mcontext_t
+   {
+     __riscv_mc_gp_state __gregs;
+     union  __riscv_mc_fp_state __fpregs;
++    /* 5K + 256 reserved for vector state and future expansion.  */
++    unsigned char __reserved[5376] __attribute__ ((__aligned__ (16)));
+   } mcontext_t;
+ 
+ /* Userlevel context.  */
+-- 
+2.33.1
+

+ 280 - 0
recipes-core/glibc/glibc/0003-RISC-V-Save-and-restore-VCSR-when-doing-user-context.patch

@@ -0,0 +1,280 @@
+From 1c08ed548a24c41542bdb7309e05c1aef70f135d Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 13 Sep 2021 09:41:16 +0800
+Subject: [PATCH 3/8] RISC-V: Save and restore VCSR when doing user context
+ switch
+
+According to the RISC-V V extension specification, all vector registers
+except VCSR are caller-saved registers. The VCSR (vxrm + vxsat) has thread
+storage duration. Therefore, only VCSR needs to be added to the user
+context operation.
+
+Signed-off-by: max.ma <max.ma@starfivetech.com>
+---
+ sysdeps/riscv/Makefile                       |  5 +++
+ sysdeps/riscv/rtld-global-offsets.sym        |  7 ++++
+ sysdeps/unix/sysv/linux/riscv/bits/hwcap.h   | 31 +++++++++++++++
+ sysdeps/unix/sysv/linux/riscv/getcontext.S   | 22 ++++++++++-
+ sysdeps/unix/sysv/linux/riscv/setcontext.S   | 22 +++++++++++
+ sysdeps/unix/sysv/linux/riscv/swapcontext.S  | 41 ++++++++++++++++++++
+ sysdeps/unix/sysv/linux/riscv/sysdep.h       |  1 +
+ sysdeps/unix/sysv/linux/riscv/ucontext_i.sym |  6 +++
+ 8 files changed, 134 insertions(+), 1 deletion(-)
+ create mode 100644 sysdeps/riscv/rtld-global-offsets.sym
+ create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+
+diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile
+index 20a9968106..a5c2106a09 100644
+--- a/sysdeps/riscv/Makefile
++++ b/sysdeps/riscv/Makefile
+@@ -2,6 +2,11 @@ ifeq ($(subdir),misc)
+ sysdep_headers += sys/asm.h
+ endif
+ 
++ifeq ($(subdir),csu)
++# get offset to rtld_global._dl_hwcap and rtld_global._dl_hwcap2.
++gen-as-const-headers += rtld-global-offsets.sym
++endif
++
+ # RISC-V's assembler also needs to know about PIC as it changes the definition
+ # of some assembler macros.
+ ASFLAGS-.os += $(pic-ccflag)
+diff --git a/sysdeps/riscv/rtld-global-offsets.sym b/sysdeps/riscv/rtld-global-offsets.sym
+new file mode 100644
+index 0000000000..ff4e97f2a6
+--- /dev/null
++++ b/sysdeps/riscv/rtld-global-offsets.sym
+@@ -0,0 +1,7 @@
++#define SHARED 1
++
++#include <ldsodefs.h>
++
++#define rtld_global_ro_offsetof(mem) offsetof (struct rtld_global_ro, mem)
++
++RTLD_GLOBAL_RO_DL_HWCAP_OFFSET	rtld_global_ro_offsetof (_dl_hwcap)
+diff --git a/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h b/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+new file mode 100644
+index 0000000000..e6c5ef5740
+--- /dev/null
++++ b/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+@@ -0,0 +1,31 @@
++/* Defines for bits in AT_HWCAP.  RISC-V Linux version.
++   Copyright (C) 2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#if !defined (_SYS_AUXV_H) && !defined (_LINUX_RISCV_SYSDEP_H)
++# error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
++#endif
++
++/* The following must match the kernel's <asm/hwcap.h>.  */
++#define HWCAP_ISA_I      0x100		//(1 << ('I' - 'A'))
++#define HWCAP_ISA_M      0x1000 	//(1 << ('M' - 'A'))
++#define HWCAP_ISA_A      0x1		//(1 << ('A' - 'A'))
++#define HWCAP_ISA_F      0x20		//(1 << ('F' - 'A'))
++#define HWCAP_ISA_D      0x8		//(1 << ('D' - 'A'))
++#define HWCAP_ISA_C      0x4		//(1 << ('C' - 'A'))
++#define HWCAP_ISA_V      0x200000	//(1 << ('V' - 'A'))
++
+diff --git a/sysdeps/unix/sysv/linux/riscv/getcontext.S b/sysdeps/unix/sysv/linux/riscv/getcontext.S
+index d6a9bbca60..840d8feca4 100644
+--- a/sysdeps/unix/sysv/linux/riscv/getcontext.S
++++ b/sysdeps/unix/sysv/linux/riscv/getcontext.S
+@@ -16,6 +16,8 @@
+    License along with the GNU C Library.  If not, see
+    <https://www.gnu.org/licenses/>.  */
+ 
++#include <sysdep.h>
++#include <rtld-global-offsets.h>
+ #include "ucontext-macros.h"
+ 
+ /* int getcontext (ucontext_t *ucp) */
+@@ -39,6 +41,25 @@ LEAF (__getcontext)
+ 	SAVE_INT_REG (s10, 26, a0)
+ 	SAVE_INT_REG (s11, 27, a0)
+ 
++#ifdef __riscv_vector
++# ifdef SHARED
++	la	t1, _rtld_global_ro
++	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
++# else
++	la	t1, _dl_hwcap
++	REG_L	t1, (t1)
++# endif
++	li	t2, HWCAP_ISA_V
++	and	t2, t1, t2
++	beqz	t2, 1f
++	addi	t2, a0,	MCONTEXT_EXTENSION
++	li	t1, RVV_MAGIC
++	sw	t1, (t2)
++	csrr	t1, vcsr
++	REG_S	t1, VCSR_OFFSET(t2)
++1:
++#endif
++
+ #ifndef __riscv_float_abi_soft
+ 	frsr	a1
+ 
+@@ -73,5 +94,4 @@ LEAF (__getcontext)
+ 99:	j	__syscall_error
+ 
+ PSEUDO_END (__getcontext)
+-
+ weak_alias (__getcontext, getcontext)
+diff --git a/sysdeps/unix/sysv/linux/riscv/setcontext.S b/sysdeps/unix/sysv/linux/riscv/setcontext.S
+index 9510518750..d2404fbe9c 100644
+--- a/sysdeps/unix/sysv/linux/riscv/setcontext.S
++++ b/sysdeps/unix/sysv/linux/riscv/setcontext.S
+@@ -16,6 +16,8 @@
+    License along with the GNU C Library.  If not, see
+    <https://www.gnu.org/licenses/>.  */
+ 
++#include <sysdep.h>
++#include <rtld-global-offsets.h>
+ #include "ucontext-macros.h"
+ 
+ /*  int __setcontext (const ucontext_t *ucp)
+@@ -64,6 +66,26 @@ LEAF (__setcontext)
+ 	fssr	t1
+ #endif /* __riscv_float_abi_soft */
+ 
++#ifdef __riscv_vector
++#ifdef SHARED
++	la	t1, _rtld_global_ro
++	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
++#else
++	la	t1, _dl_hwcap
++	REG_L	t1, (t1)
++#endif
++	li	t2, HWCAP_ISA_V
++	and	t2, t1, t2
++	beqz	t2, 1f
++	li      t1, RVV_MAGIC
++	addi	t2, t0,	MCONTEXT_EXTENSION
++	lw	a1, (t2)
++	bne	a1, t1, 1f
++	REG_L   t1, VCSR_OFFSET(t2)
++	csrw	vcsr, t1
++1:
++#endif
++
+ 	/* Note the contents of argument registers will be random
+ 	   unless makecontext() has been called.  */
+ 	RESTORE_INT_REG     (t1,   0, t0)
+diff --git a/sysdeps/unix/sysv/linux/riscv/swapcontext.S b/sysdeps/unix/sysv/linux/riscv/swapcontext.S
+index df0f69969c..94ae8e4bdc 100644
+--- a/sysdeps/unix/sysv/linux/riscv/swapcontext.S
++++ b/sysdeps/unix/sysv/linux/riscv/swapcontext.S
+@@ -16,6 +16,8 @@
+    License along with the GNU C Library.  If not, see
+    <https://www.gnu.org/licenses/>.  */
+ 
++#include <sysdep.h>
++#include <rtld-global-offsets.h>
+ #include "ucontext-macros.h"
+ 
+ /* int swapcontext (ucontext_t *oucp, const ucontext_t *ucp) */
+@@ -40,6 +42,25 @@ LEAF (__swapcontext)
+ 	SAVE_INT_REG (s10, 26, a0)
+ 	SAVE_INT_REG (s11, 27, a0)
+ 
++#ifdef __riscv_vector
++#ifdef SHARED
++	la      t1, _rtld_global_ro
++	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
++#else
++	la	t1, _dl_hwcap
++	REG_L   t1, (t1)
++#endif
++	li	t2, HWCAP_ISA_V
++	and	t2, t1, t2
++	beqz	t2, 1f
++	addi	t2, a0,	MCONTEXT_EXTENSION
++	li	t1, RVV_MAGIC
++	sw	t1, (t2)
++	csrr	t1, vcsr
++	REG_S	t1, VCSR_OFFSET(t2)
++1:
++#endif
++
+ #ifndef __riscv_float_abi_soft
+ 	frsr a1
+ 
+@@ -89,6 +110,26 @@ LEAF (__swapcontext)
+ 	fssr	t1
+ #endif /* __riscv_float_abi_soft */
+ 
++#ifdef __riscv_vector
++#ifdef SHARED
++	la      t1, _rtld_global_ro
++	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
++#else
++	la	t1, _dl_hwcap
++	REG_L   t1, (t1)
++#endif
++	li	t2, HWCAP_ISA_V
++	and	t2, t1, t2
++	beqz	t2, 1f
++	li      t1, RVV_MAGIC
++	addi	t2, t0,	MCONTEXT_EXTENSION
++	lw	a1, (t2)
++	bne	a1, t1, 1f
++	REG_L   t1, VCSR_OFFSET(t2)
++	csrw	vcsr, t1
++1:
++#endif
++
+ 	/* Note the contents of argument registers will be random
+ 	   unless makecontext() has been called.  */
+ 	RESTORE_INT_REG (t1,   0, t0)
+diff --git a/sysdeps/unix/sysv/linux/riscv/sysdep.h b/sysdeps/unix/sysv/linux/riscv/sysdep.h
+index 37ff07a0d7..c9f8fd8236 100644
+--- a/sysdeps/unix/sysv/linux/riscv/sysdep.h
++++ b/sysdeps/unix/sysv/linux/riscv/sysdep.h
+@@ -50,6 +50,7 @@
+ 
+ #ifdef __ASSEMBLER__
+ 
++# include <bits/hwcap.h>
+ # include <sys/asm.h>
+ 
+ # define ENTRY(name) LEAF(name)
+diff --git a/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym b/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym
+index be55b26310..4037473c9a 100644
+--- a/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym
++++ b/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym
+@@ -2,6 +2,7 @@
+ #include <signal.h>
+ #include <stddef.h>
+ #include <sys/ucontext.h>
++#include <asm/sigcontext.h>
+ 
+ -- Constants used by the rt_sigprocmask call.
+ 
+@@ -27,5 +28,10 @@ STACK_FLAGS			stack (ss_flags)
+ 
+ MCONTEXT_GREGS			mcontext (__gregs)
+ MCONTEXT_FPREGS			mcontext (__fpregs)
++MCONTEXT_EXTENSION 		mcontext (__reserved)
+ 
+ UCONTEXT_SIZE			sizeof (ucontext_t)
++
++VCSR_OFFSET			offsetof (struct __riscv_v_state, vcsr)
++
++RVV_MAGIC
+-- 
+2.33.1
+

+ 61 - 0
recipes-core/glibc/glibc/0004-RISC-V-Extend-MINSIGSTKSZ-and-SIGSTKSZ-to-backup-RVV.patch

@@ -0,0 +1,61 @@
+From 05c65dd1e572b489bbd85488c2897af76a143a01 Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 13 Sep 2021 09:41:17 +0800
+Subject: [PATCH 4/8] RISC-V: Extend MINSIGSTKSZ and SIGSTKSZ to backup RVV
+ registers
+
+As using RVV extension, the original MINSIGSTKSZ is not enough to
+back up all RVV registers for the normal case. Therefore, the MINSIGSTKSZ
+is expanded to about 5K and the SIGSTKSZ is expanded to about 16K. This
+space is enough for the case that the VLENB of a vector register is 128
+bytes. For the case that VLENB > 128 bytes, users can use
+sysconf (_SC_MINSIGSTKSZ) and sysconf (_SC_SIGSTKSZ) to get the
+appropriate signal stack size.
+
+Signed-off-by: max.ma <max.ma@starfivetech.com>
+---
+ sysdeps/unix/sysv/linux/riscv/bits/sigstack.h | 32 +++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+ create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/sigstack.h
+
+diff --git a/sysdeps/unix/sysv/linux/riscv/bits/sigstack.h b/sysdeps/unix/sysv/linux/riscv/bits/sigstack.h
+new file mode 100644
+index 0000000000..c18512f083
+--- /dev/null
++++ b/sysdeps/unix/sysv/linux/riscv/bits/sigstack.h
+@@ -0,0 +1,32 @@
++/* sigstack, sigaltstack definitions.
++   Copyright (C) 2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#ifndef _BITS_SIGSTACK_H
++#define _BITS_SIGSTACK_H 1
++
++#if !defined _SIGNAL_H && !defined _SYS_UCONTEXT_H
++# error "Never include this file directly.  Use <signal.h> instead"
++#endif
++
++/* Minimum stack size (5k+256 bytes) for a signal handler.  */
++#define MINSIGSTKSZ	5376
++
++/* System default stack size.  */
++#define SIGSTKSZ	16384
++
++#endif /* bits/sigstack.h */
+-- 
+2.33.1
+

+ 93 - 0
recipes-core/glibc/glibc/0005-RISC-V-Expand-PTHREAD_STACK_MIN-to-support-RVV-envir.patch

@@ -0,0 +1,93 @@
+From 200ea75b0643350a162a22d3a7fa1f1a056337c1 Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 13 Sep 2021 09:41:18 +0800
+Subject: [PATCH 5/8] RISC-V: Expand PTHREAD_STACK_MIN to support RVV
+ environment
+
+In order to support all pthread operations in the RVV environment, here
+PTHREAD_STACK_MIN is set to 4 times GLRO(dl_minsigstacksize), and the
+default PTHREAD_STACK_MIN is expanded to 20K bytes.
+
+Signed-off-by: max.ma <max.ma@starfivetech.com>
+---
+ .../sysv/linux/riscv/bits/pthread_stack_min.h | 21 ++++++++++
+ .../linux/riscv/sysconf-pthread_stack_min.h   | 39 +++++++++++++++++++
+ 2 files changed, 60 insertions(+)
+ create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/pthread_stack_min.h
+ create mode 100644 sysdeps/unix/sysv/linux/riscv/sysconf-pthread_stack_min.h
+
+diff --git a/sysdeps/unix/sysv/linux/riscv/bits/pthread_stack_min.h b/sysdeps/unix/sysv/linux/riscv/bits/pthread_stack_min.h
+new file mode 100644
+index 0000000000..83585b39f3
+--- /dev/null
++++ b/sysdeps/unix/sysv/linux/riscv/bits/pthread_stack_min.h
+@@ -0,0 +1,21 @@
++/* Definition of PTHREAD_STACK_MIN.  Linux/riscv version.
++   Copyright (C) 2021 Free Software Foundation, Inc.
++
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public License as
++   published by the Free Software Foundation; either version 2.1 of the
++   License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <https://www.gnu.org/licenses/>.  */
++
++/* Minimum size for a thread.  We are free to choose a reasonable value.  */
++#define PTHREAD_STACK_MIN	20480
+diff --git a/sysdeps/unix/sysv/linux/riscv/sysconf-pthread_stack_min.h b/sysdeps/unix/sysv/linux/riscv/sysconf-pthread_stack_min.h
+new file mode 100644
+index 0000000000..53ba6a1142
+--- /dev/null
++++ b/sysdeps/unix/sysv/linux/riscv/sysconf-pthread_stack_min.h
+@@ -0,0 +1,39 @@
++/* __get_pthread_stack_min ().  Linux version.
++   Copyright (C) 2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++/* Return sysconf (_SC_THREAD_STACK_MIN).  */
++
++static inline long int
++__get_pthread_stack_min (void)
++{
++  /* sysconf (_SC_THREAD_STACK_MIN) >= sysconf (_SC_MINSIGSTKSZ).  */
++  long int pthread_stack_min = GLRO(dl_minsigstacksize) * 4;
++  assert (pthread_stack_min != 0);
++  _Static_assert (__builtin_constant_p (PTHREAD_STACK_MIN),
++		  "PTHREAD_STACK_MIN is constant");
++  /* Return MAX (PTHREAD_STACK_MIN, pthread_stack_min).  */
++  if (pthread_stack_min < PTHREAD_STACK_MIN)
++    pthread_stack_min = PTHREAD_STACK_MIN;
++  /* We have a private interface, __pthread_get_minstack@GLIBC_PRIVATE
++     which returns a larger size that includes the required TLS variable
++     space which has been determined at startup.  For sysconf here we are
++     conservative and don't include the space required for TLS access.
++     Eventually the TLS variable space will not be part of the stack
++     (Bug 11787).  */
++  return pthread_stack_min;
++}
+-- 
+2.33.1
+

+ 1529 - 0
recipes-core/glibc/glibc/0006-add-vector-support-for-memset-memcmp-memmove-memcpy-.patch

@@ -0,0 +1,1529 @@
+From c4c3986117a0d2b5c4e093872f471b2b5b882cee Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Tue, 21 Dec 2021 17:42:04 -0800
+Subject: [PATCH 6/8] add vector support for
+ memset/memcmp/memmove/memcpy/memchr/strlen/strcmp
+
+---
+ sysdeps/riscv/riscv-ifunc.h                   |  34 ++++++
+ sysdeps/riscv/rv64/multiarch/Makefile         |   5 +
+ sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c   |   2 +
+ sysdeps/riscv/rv64/multiarch/ifunc-common.h   |  30 +++++
+ .../riscv/rv64/multiarch/ifunc-impl-list.c    |  65 ++++++++++
+ sysdeps/riscv/rv64/multiarch/memchr.c         |  32 +++++
+ sysdeps/riscv/rv64/multiarch/memchr_as.S      |  88 ++++++++++++++
+ sysdeps/riscv/rv64/multiarch/memchr_riscv.S   |  25 ++++
+ sysdeps/riscv/rv64/multiarch/memchr_vector.S  |  53 ++++++++
+ sysdeps/riscv/rv64/multiarch/memcmp.c         |  32 +++++
+ sysdeps/riscv/rv64/multiarch/memcmp_riscv.c   |  29 +++++
+ sysdeps/riscv/rv64/multiarch/memcmp_vector.S  |  56 +++++++++
+ sysdeps/riscv/rv64/multiarch/memcpy.c         |  33 +++++
+ sysdeps/riscv/rv64/multiarch/memcpy_as.S      | 114 ++++++++++++++++++
+ sysdeps/riscv/rv64/multiarch/memcpy_riscv.S   |  25 ++++
+ sysdeps/riscv/rv64/multiarch/memcpy_vector.S  |  54 +++++++++
+ sysdeps/riscv/rv64/multiarch/memmove.c        |  32 +++++
+ sysdeps/riscv/rv64/multiarch/memmove_riscv.c  |  29 +++++
+ sysdeps/riscv/rv64/multiarch/memmove_vector.S |  56 +++++++++
+ sysdeps/riscv/rv64/multiarch/memset.c         |  33 +++++
+ sysdeps/riscv/rv64/multiarch/memset_riscv.c   |  29 +++++
+ sysdeps/riscv/rv64/multiarch/memset_vector.S  |  45 +++++++
+ sysdeps/riscv/rv64/multiarch/rtld-memchr.S    |   1 +
+ sysdeps/riscv/rv64/multiarch/rtld-memcmp.c    |   1 +
+ sysdeps/riscv/rv64/multiarch/rtld-memcpy.S    |   1 +
+ sysdeps/riscv/rv64/multiarch/rtld-memmove.c   |  19 +++
+ sysdeps/riscv/rv64/multiarch/rtld-memset.c    |   1 +
+ sysdeps/riscv/rv64/multiarch/rtld-strcmp.S    |   1 +
+ sysdeps/riscv/rv64/multiarch/rtld-strlen.c    |   1 +
+ sysdeps/riscv/rv64/multiarch/strcmp.c         |  33 +++++
+ sysdeps/riscv/rv64/multiarch/strcmp_.S        |  39 ++++++
+ sysdeps/riscv/rv64/multiarch/strcmp_riscv.S   |   9 ++
+ sysdeps/riscv/rv64/multiarch/strcmp_vector.S  |  54 +++++++++
+ sysdeps/riscv/rv64/multiarch/strlen.c         |  32 +++++
+ sysdeps/riscv/rv64/multiarch/strlen_riscv.c   |  29 +++++
+ sysdeps/riscv/rv64/multiarch/strlen_vector.S  |  46 +++++++
+ sysdeps/riscv/sysdep.h                        |  24 ++++
+ sysdeps/unix/sysv/linux/riscv/sysdep.h        |   2 +-
+ 38 files changed, 1193 insertions(+), 1 deletion(-)
+ create mode 100644 sysdeps/riscv/riscv-ifunc.h
+ create mode 100644 sysdeps/riscv/rv64/multiarch/Makefile
+ create mode 100644 sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/ifunc-common.h
+ create mode 100644 sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memchr.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memchr_as.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memchr_riscv.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memchr_vector.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcmp.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcmp_riscv.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcmp_vector.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcpy.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcpy_as.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcpy_riscv.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memcpy_vector.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memmove.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memmove_riscv.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memmove_vector.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memset.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memset_riscv.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/memset_vector.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-memchr.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-memcmp.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-memcpy.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-memmove.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-memset.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-strcmp.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/rtld-strlen.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strcmp.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strcmp_.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strcmp_riscv.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strcmp_vector.S
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strlen.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strlen_riscv.c
+ create mode 100644 sysdeps/riscv/rv64/multiarch/strlen_vector.S
+ create mode 100644 sysdeps/riscv/sysdep.h
+
+diff --git a/sysdeps/riscv/riscv-ifunc.h b/sysdeps/riscv/riscv-ifunc.h
+new file mode 100644
+index 0000000000..6b4ea24758
+--- /dev/null
++++ b/sysdeps/riscv/riscv-ifunc.h
+@@ -0,0 +1,34 @@
++/* Common definition for ifunc resolvers.  Linux/RISCV version.
++   This file is part of the GNU C Library.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++#include <ifunc-init.h>
++
++#define INIT_ARCH()
++
++#define riscv_libc_ifunc_redirected(redirected_name, name, expr)	\
++  __ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH)
++
++#if defined SHARED
++# define riscv_libc_ifunc_hidden_def(redirect_name, name) \
++  __hidden_ver1 (name, __GI_##name, redirect_name) \
++    __attribute__ ((visibility ("hidden"))) \
++    __attribute_copy__ (name)
++#else
++# define riscv_libc_ifunc_hidden_def(redirect_name, name)
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/Makefile b/sysdeps/riscv/rv64/multiarch/Makefile
+new file mode 100644
+index 0000000000..3349bf4888
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/Makefile
+@@ -0,0 +1,5 @@
++ifeq ($(subdir),string)
++sysdep_routines += memcpy_vector memcpy_riscv memchr_riscv memchr_vector memcmp_riscv \
++                 memcmp_vector strcmp_riscv strcmp_vector strlen_riscv strlen_vector \
++                 memmove_vector memmove_riscv memset_vector memset_riscv
++endif
+diff --git a/sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c b/sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c
+new file mode 100644
+index 0000000000..2054d18261
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c
+@@ -0,0 +1,2 @@
++/* Empty file to override sysdeps/riscv version. See memcpy.S for definitions
++   of these functions.  */
+diff --git a/sysdeps/riscv/rv64/multiarch/ifunc-common.h b/sysdeps/riscv/rv64/multiarch/ifunc-common.h
+new file mode 100644
+index 0000000000..8c4c95371f
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/ifunc-common.h
+@@ -0,0 +1,30 @@
++/* Common definition for memcmp resolver.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#include <sys/auxv.h>
++
++__typeof (REDIRECT_NAME) OPTIMIZE (riscv) attribute_hidden;
++__typeof (REDIRECT_NAME) OPTIMIZE (vector) attribute_hidden;
++
++static inline void *
++IFUNC_SELECTOR (int hwcap)
++{
++  if (hwcap & HWCAP_ISA_V)
++    return OPTIMIZE (vector);
++  return OPTIMIZE (riscv);
++}
+diff --git a/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c b/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c
+new file mode 100644
+index 0000000000..28c6e123f0
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/ifunc-impl-list.c
+@@ -0,0 +1,65 @@
++/* Enumerate available IFUNC implementations of a function.  RISCV version.
++   Copyright (C) 2013-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#include <stdbool.h>
++#include <string.h>
++#include <ldsodefs.h>
++#include <sysdep.h>
++#include <ifunc-impl-list.h>
++
++/* Fill ARRAY of MAX elements with IFUNC implementations for function
++   NAME and return the number of valid entries.  */
++
++size_t
++__libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
++			size_t max)
++{
++  size_t i = 0;
++
++  bool use_rvv = (GLRO(dl_hwcap) & HWCAP_ISA_V) != 0;
++
++  IFUNC_IMPL (i, name, memcpy,
++	      IFUNC_IMPL_ADD (array, i, memcpy, use_rvv, __memcpy_vector)
++	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_riscv));
++
++  IFUNC_IMPL (i, name, memchr,
++	      IFUNC_IMPL_ADD (array, i, memchr, use_rvv, __memchr_vector)
++	      IFUNC_IMPL_ADD (array, i, memchr, 1, __memchr_riscv));
++
++  IFUNC_IMPL (i, name, memcmp,
++	      IFUNC_IMPL_ADD (array, i, memcmp, use_rvv, __memcmp_vector)
++	      IFUNC_IMPL_ADD (array, i, memcmp, 1, __memcmp_riscv));
++
++  IFUNC_IMPL (i, name, strcmp,
++	      IFUNC_IMPL_ADD (array, i, strcmp, use_rvv, __strcmp_vector)
++	      IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_riscv));
++
++  IFUNC_IMPL (i, name, strlen,
++	      IFUNC_IMPL_ADD (array, i, strlen, use_rvv, __strlen_vector)
++	      IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_riscv));
++
++  IFUNC_IMPL (i, name, memmove,
++	      IFUNC_IMPL_ADD (array, i, memmove, use_rvv, __memmove_vector)
++	      IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_riscv));
++
++  IFUNC_IMPL (i, name, memset,
++	      IFUNC_IMPL_ADD (array, i, memset, use_rvv, __memset_vector)
++	      IFUNC_IMPL_ADD (array, i, memset, 1, __memset_riscv));
++
++  return i;
++}
+diff --git a/sysdeps/riscv/rv64/multiarch/memchr.c b/sysdeps/riscv/rv64/multiarch/memchr.c
+new file mode 100644
+index 0000000000..1544bc3d01
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memchr.c
+@@ -0,0 +1,32 @@
++/* Multiple versions of memchr.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define memchr __redirect_memchr
++# include <string.h>
++# undef memchr
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME memchr
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_memchr, memchr, IFUNC_SELECTOR);
++riscv_libc_ifunc_hidden_def (__redirect_memchr, memchr);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memchr_as.S b/sysdeps/riscv/rv64/multiarch/memchr_as.S
+new file mode 100644
+index 0000000000..557098afda
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memchr_as.S
+@@ -0,0 +1,88 @@
++
++/* The assembly function for memchr.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++ENTRY (memchr)
++   zext.b	a3,a1
++   beqz	a2, .L_not_found
++   andi	a5,a0,7
++.L_not_aligned:      
++   beqz	a5,.L_aligned_8byte
++   lbu	a5,0(a0)
++   addi	a2,a2,-1
++   beq	a5,a3,.L_found
++   addi	a0,a0,1
++   andi	a5,a0,7
++   bnez	a2,.L_not_aligned
++
++.L_not_found:
++   li	a0,0
++.L_found:   
++   ret
++
++.L_aligned_8byte:
++   zext.b	a1,a1
++   slli	a5,a1,0x8
++   or	a1,a1,a5
++   slli	a5,a1,0x10
++   or	a5,a5,a1
++   slli	a1,a5,0x20
++   li	a4,7
++   or	a1,a1,a5
++   bgeu	a4,a2,.L_less_8bytes
++
++   ld    a7, mask1   
++   ld    a6, mask2
++   
++   li	t1,7
++   j	.L_8byte_compare_loop
++.L_8byte_compare:
++   addi	a2,a2,-8
++   addi	a0,a0,8
++   bgeu	t1,a2,.L_8byte_compare_exit
++.L_8byte_compare_loop:   
++   ld	a5,0(a0)
++   xor	a5,a5,a1
++   add	a4,a5,a7
++   not	a5,a5
++   and	a5,a5,a4
++   and	a5,a5,a6
++   beqz	a5,.L_8byte_compare
++
++.L_less_8bytes:
++   add	a2,a2,a0
++   j	.L_less_8bytes_compare
++.L_less_8bytes_loop:   
++   addi	a0,a0,1
++   beq	a2,a0,.L_not_found
++.L_less_8bytes_compare:   
++   lbu	a5,0(a0)
++   bne	a5,a3,.L_less_8bytes_loop
++   ret
++.L_8byte_compare_exit:
++   bnez	a2,.L_less_8bytes
++   j	.L_not_found
++  .align 3
++mask1:
++  .dword 0xfefefefefefefeff
++mask2:
++  .dword 0x8080808080808080
++END (memchr)
++libc_hidden_builtin_def (memchr)
+diff --git a/sysdeps/riscv/rv64/multiarch/memchr_riscv.S b/sysdeps/riscv/rv64/multiarch/memchr_riscv.S
+new file mode 100644
+index 0000000000..ce7b64bbe0
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memchr_riscv.S
+@@ -0,0 +1,25 @@
++/* The assembly function for memchr.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++#define memchr __memchr_riscv
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#include "memchr_as.S"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/memchr_vector.S b/sysdeps/riscv/rv64/multiarch/memchr_vector.S
+new file mode 100644
+index 0000000000..77693d716d
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memchr_vector.S
+@@ -0,0 +1,53 @@
++/* The assembly function for memchr.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines memchr.  */
++/* #ifndef __riscv_vector */
++# define memchr __memchr_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (memchr)
++
++   zext.b	a1,a1
++
++.L_memchr_loop:
++   vsetvli	a3,a2,e8,m8,tu,mu
++   vle8ff.v	v0,(a0)
++   vmseq.vx	v8,v0,a1
++   csrr	a3,vl
++   vfirst.m	a4,v8
++   sub	a2,a2,a3
++   bgez	a4,.L_found
++   add	a0,a0,a3
++   bltu	zero,a2,.L_memchr_loop
++
++.L_found:
++   bltz	a4,.L_not_found
++   
++   add	a0,a0,a4
++   ret
++.L_not_found:   
++   add	a0,zero,zero
++   ret
++END (memchr)
++libc_hidden_builtin_def (memchr)
+diff --git a/sysdeps/riscv/rv64/multiarch/memcmp.c b/sysdeps/riscv/rv64/multiarch/memcmp.c
+new file mode 100644
+index 0000000000..29730c6ed1
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcmp.c
+@@ -0,0 +1,32 @@
++/* Multiple versions of memcmp.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define memcmp __redirect_memcmp
++# include <string.h>
++# undef memcmp
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME memcmp
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_memcmp, memcmp, IFUNC_SELECTOR);
++riscv_libc_ifunc_hidden_def (__redirect_memcmp, memcmp);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memcmp_riscv.c b/sysdeps/riscv/rv64/multiarch/memcmp_riscv.c
+new file mode 100644
+index 0000000000..dda15d7d35
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcmp_riscv.c
+@@ -0,0 +1,29 @@
++/* RISCV C version memcmp.
++   Copyright (C) 2018-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#undef weak_alias
++#  define MEMCMP __memcmp_riscv
++# include <string/memcmp.c>
++#else
++
++# include <string/memcmp.c>
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memcmp_vector.S b/sysdeps/riscv/rv64/multiarch/memcmp_vector.S
+new file mode 100644
+index 0000000000..f6cbc1307b
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcmp_vector.S
+@@ -0,0 +1,56 @@
++/* The assembly function for memcmp.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines strcmp.  */
++/* #ifndef __riscv_vector */
++# define memcmp __memcmp_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (memcmp)
++
++.L_compare_loop:
++   vsetvli	a3,a2,e8,m8,tu,mu
++   vle8.v	v0,(a0)
++   vle8.v	v8,(a1)
++   vmsne.vv	v16,v0,v8
++   sub	a2,a2,a3
++   vfirst.m	a4,v16
++   bgez	a4,.L_compare_not_equal
++   add	a0,a0,a3
++   add	a1,a1,a3
++   bltu	zero,a2,.L_compare_loop
++   bltz	a4,.L_compare_equal
++   
++.L_compare_not_equal:   
++   add	a0,a0,a4
++   add	a1,a1,a4
++   lbu	a5,0(a0)
++   lbu	a6,0(a1)
++   sub	a0,a5,a6
++   ret
++.L_compare_equal:
++   add	a0,zero,zero
++   ret
++END (memcmp)
++libc_hidden_builtin_def (memcmp)
++
+diff --git a/sysdeps/riscv/rv64/multiarch/memcpy.c b/sysdeps/riscv/rv64/multiarch/memcpy.c
+new file mode 100644
+index 0000000000..0f20b7fd44
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcpy.c
+@@ -0,0 +1,33 @@
++/* Multiple versions of memcpy.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define memcpy __redirect_memcpy
++# include <string.h>
++# undef memcpy
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME memcpy
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_memcpy, memcpy, IFUNC_SELECTOR);
++
++riscv_libc_ifunc_hidden_def (__redirect_memcpy, memcpy);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memcpy_as.S b/sysdeps/riscv/rv64/multiarch/memcpy_as.S
+new file mode 100644
+index 0000000000..f0a074df13
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcpy_as.S
+@@ -0,0 +1,114 @@
++/* The assembly function for memcpy.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++
++#  define LABLE_ALIGN   \
++        .balignl 16, 0x00000013
++
++ENTRY (memcpy)
++
++        /* Test if len less than 8 bytes.  */
++        mv      t6, a0
++        sltiu   a3, a2, 8
++        li     t3, 1
++        bnez    a3, .L_copy_by_byte
++
++        andi    a3, a0, 7
++        li     t5, 8
++	/* Test if dest is not 8 bytes aligned.  */
++        bnez    a3, .L_dest_not_aligned
++.L_dest_aligned:
++        /* If dest is aligned, then copy.  */
++        srli    t4, a2, 6
++        /* Test if len less than 32 bytes.  */
++        beqz     t4, .L_len_less_16bytes
++	andi    a2, a2, 63
++
++.L_len_larger_16bytes:
++        ld      a4, 0(a1)
++        sd      a4, 0(a0)
++        ld      a5, 8(a1)
++        sd      a5, 8(a0)
++        ld      a6, 16(a1)
++        sd      a6, 16(a0)
++        ld      a7, 24(a1)
++        sd      a7, 24(a0)
++        ld      a4, 32(a1)
++        sd      a4, 32(a0)
++        ld      a5, 40(a1)
++        sd      a5, 40(a0)
++        ld      a6, 48(a1)
++        sd      a6, 48(a0)
++        ld      a7, 56(a1)
++        sub     t4, t4, t3
++        addi    a1, a1, 64
++        sd      a7, 56(a0)
++        addi    a0, a0, 64
++	bnez	t4, .L_len_larger_16bytes
++
++.L_len_less_16bytes:
++	srli    t4, a2, 2
++        beqz     t4, .L_copy_by_byte
++        andi    a2, a2, 3
++.L_len_less_16bytes_loop:
++        lw      a4, 0(a1)
++	sub	t4, t4, t3
++        addi    a1, a1, 4
++        sw      a4, 0(a0)
++        addi    a0, a0, 4
++	bnez    t4, .L_len_less_16bytes_loop
++
++        /* Copy tail.  */
++.L_copy_by_byte:
++        andi    t4, a2, 7
++        beqz     t4, .L_return
++.L_copy_by_byte_loop:
++        lb     a4, 0(a1)
++	sub	t4, t4, t3
++        addi    a1, a1, 1
++        sb     a4, 0(a0)
++        addi    a0, a0, 1
++	bnez	t4, .L_copy_by_byte_loop
++
++.L_return:
++        mv      a0, t6
++        ret
++
++        /* If dest is not aligned, just copying some bytes makes the dest
++           align.  */
++.L_dest_not_aligned:
++        sub     a3, t5, a3
++        mv      t5, a3
++.L_dest_not_aligned_loop:
++        /* Makes the dest align.  */
++        lb     a4, 0(a1)
++	sub	a3, a3, t3
++        addi    a1, a1, 1
++        sb     a4, 0(a0)
++        addi    a0, a0, 1
++	bnez	a3, .L_dest_not_aligned_loop
++        sub     a2, a2, t5
++	sltiu	a3, a2, 4
++        bnez    a3, .L_copy_by_byte
++        /* Check whether the src is aligned.  */
++        j		.L_dest_aligned
++END (memcpy)
++
++libc_hidden_builtin_def (memcpy)
+diff --git a/sysdeps/riscv/rv64/multiarch/memcpy_riscv.S b/sysdeps/riscv/rv64/multiarch/memcpy_riscv.S
+new file mode 100644
+index 0000000000..a0ba2150fc
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcpy_riscv.S
+@@ -0,0 +1,25 @@
++/* The assembly function for memcpy.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++#define memcpy __memcpy_riscv
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#include "memcpy_as.S"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/memcpy_vector.S b/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
+new file mode 100644
+index 0000000000..2319647de8
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
+@@ -0,0 +1,54 @@
++/* The assembly function for memcpy.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines memcpy.  */
++/* #ifndef __riscv_vector */
++# define memcpy __memcpy_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (memcpy)
++	mv	a3, a0
++	sltiu	a4, a2, 16
++	bnez	a4, .loop_cpy
++	andi	a5, a0, 15
++	li	a6, 16
++	beqz	a5, .loop_cpy
++	sub	a5, a6, a5
++	vsetvli	t0, a5, e8, m4
++	vle8.v	v0, (a1)
++	add	a1, a1, t0
++	sub	a2, a2, t0
++	vse8.v	v0, (a3)
++	add	a3, a3, t0
++.loop_cpy:
++	vsetvli	t0, a2, e8, m4
++	vle8.v	v0, (a1)
++	add	a1, a1, t0
++	sub	a2, a2, t0
++	vse8.v	v0, (a3)
++	add	a3, a3, t0
++	bnez	a2, .loop_cpy
++	ret
++END (memcpy)
++
++libc_hidden_builtin_def (memcpy)
+diff --git a/sysdeps/riscv/rv64/multiarch/memmove.c b/sysdeps/riscv/rv64/multiarch/memmove.c
+new file mode 100644
+index 0000000000..8d33da166d
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memmove.c
+@@ -0,0 +1,32 @@
++/* Multiple versions of memmove.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define memmove __redirect_memmove
++# include <string.h>
++# undef memmove
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME memmove
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_memmove, memmove, IFUNC_SELECTOR);
++riscv_libc_ifunc_hidden_def (__redirect_memmove, memmove);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memmove_riscv.c b/sysdeps/riscv/rv64/multiarch/memmove_riscv.c
+new file mode 100644
+index 0000000000..e11a9d1a43
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memmove_riscv.c
+@@ -0,0 +1,29 @@
++/* RISCV C version memmov.
++   Copyright (C) 2018-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#undef weak_alias
++#  define MEMMOVE __memmove_riscv
++# include <string/memmove.c>
++#else
++
++# include <string/memmove.c>
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memmove_vector.S b/sysdeps/riscv/rv64/multiarch/memmove_vector.S
+new file mode 100644
+index 0000000000..7bf89e6cf6
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memmove_vector.S
+@@ -0,0 +1,56 @@
++/* The assembly function for memmov.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines memmov.  */
++/* #ifndef __riscv_vector */
++# define memmove __memmove_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (memmove)
++	add	a4,a0,zero
++	bgeu	a1,a0,.L_forward_copy_loop
++	add	a5,a1,a2
++	add	a6,a0,a2
++	bltu	a0,a5,.L_backward_copy_loop
++
++.L_forward_copy_loop:
++	vsetvli	a3,a2,e8,m8,tu,mu
++	vle8.v	v0,(a1)
++	sub	a2,a2,a3
++	add	a1,a1,a3
++	vse8.v	v0,(a4)
++	add	a4,a4,a3
++	bltu	zero,a2,.L_forward_copy_loop
++	ret
++
++.L_backward_copy_loop:
++	vsetvli	a3,a2,e8,m8,tu,mu
++	sub	a5,a5,a3
++	vle8.v	v0,(a5)
++	sub	a2,a2,a3
++	sub	a6,a6,a3
++	vse8.v	v0,(a6)
++	bltu	zero,a2,.L_backward_copy_loop
++	ret
++END (memmove)
++libc_hidden_builtin_def (memmove)
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/memset.c b/sysdeps/riscv/rv64/multiarch/memset.c
+new file mode 100644
+index 0000000000..0d3582e49f
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memset.c
+@@ -0,0 +1,33 @@
++/* Multiple versions of memset.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define memset __redirect_memset
++# include <string.h>
++# undef memset
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME memset
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_memset, memset, IFUNC_SELECTOR);
++
++riscv_libc_ifunc_hidden_def (__redirect_memset, memset);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memset_riscv.c b/sysdeps/riscv/rv64/multiarch/memset_riscv.c
+new file mode 100644
+index 0000000000..1101c10f96
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memset_riscv.c
+@@ -0,0 +1,29 @@
++/* RISCV C version memset.
++   Copyright (C) 2018-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#undef weak_alias
++#  define MEMSET __memset_riscv
++# include <string/memset.c>
++#else
++
++# include <string/memset.c>
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/memset_vector.S b/sysdeps/riscv/rv64/multiarch/memset_vector.S
+new file mode 100644
+index 0000000000..54d04238d3
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/memset_vector.S
+@@ -0,0 +1,45 @@
++
++/* The assembly function for memset.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines memcpy.  */
++/* #ifndef __riscv_vector */
++# define memset __memset_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (memset)
++
++  zext.b	a1,a1
++  add	a5,a0,zero
++  vsetvli	a3,a2,e8,m8,tu,mu
++  vmv.v.x	v0,a1
++.L_memset_loop:
++  vse8.v	v0,(a5)
++  sub	a2,a2,a3
++  add	a5,a5,a3
++  vsetvli	a3,a2,e8,m8,tu,mu
++  bltu	zero,a2,.L_memset_loop
++  ret
++
++END (memset)
++libc_hidden_builtin_def (memset)
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-memchr.S b/sysdeps/riscv/rv64/multiarch/rtld-memchr.S
+new file mode 100644
+index 0000000000..0e68548e97
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-memchr.S
+@@ -0,0 +1 @@
++#include "memchr_as.S"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-memcmp.c b/sysdeps/riscv/rv64/multiarch/rtld-memcmp.c
+new file mode 100644
+index 0000000000..25faa66478
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-memcmp.c
+@@ -0,0 +1 @@
++#include "memcmp_riscv.c"
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-memcpy.S b/sysdeps/riscv/rv64/multiarch/rtld-memcpy.S
+new file mode 100644
+index 0000000000..81f48f3aea
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-memcpy.S
+@@ -0,0 +1 @@
++#include "memcpy_as.S"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-memmove.c b/sysdeps/riscv/rv64/multiarch/rtld-memmove.c
+new file mode 100644
+index 0000000000..435c059184
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-memmove.c
+@@ -0,0 +1,19 @@
++/* RISCV C version memmove.
++   Copyright (C) 2018-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#include "memmove_riscv.c"
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-memset.c b/sysdeps/riscv/rv64/multiarch/rtld-memset.c
+new file mode 100644
+index 0000000000..eff6790df5
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-memset.c
+@@ -0,0 +1 @@
++#include "memset_riscv.c"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-strcmp.S b/sysdeps/riscv/rv64/multiarch/rtld-strcmp.S
+new file mode 100644
+index 0000000000..eb6ff5f8d3
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-strcmp.S
+@@ -0,0 +1 @@
++#include "strcmp_.S"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/rtld-strlen.c b/sysdeps/riscv/rv64/multiarch/rtld-strlen.c
+new file mode 100644
+index 0000000000..73308eb0fa
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/rtld-strlen.c
+@@ -0,0 +1 @@
++#include "strlen_riscv.c"
+diff --git a/sysdeps/riscv/rv64/multiarch/strcmp.c b/sysdeps/riscv/rv64/multiarch/strcmp.c
+new file mode 100644
+index 0000000000..56969c77e8
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strcmp.c
+@@ -0,0 +1,33 @@
++/* Multiple versions of strcmp.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define strcmp __redirect_strcmp
++# include <string.h>
++# undef strcmp
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME strcmp
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_strcmp, strcmp, IFUNC_SELECTOR);
++
++riscv_libc_ifunc_hidden_def (__redirect_strcmp, strcmp);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/strcmp_.S b/sysdeps/riscv/rv64/multiarch/strcmp_.S
+new file mode 100644
+index 0000000000..db5a6346b8
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strcmp_.S
+@@ -0,0 +1,39 @@
++
++
++/* The assembly function for strcmp.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++	.p2align 6
++ENTRY (strcmp)
++.L_strcmp_by_byte:
++   lbu	a5,0(a0)
++   addi	a1,a1,1
++   addi	a0,a0,1
++   lbu	a4,-1(a1)
++   beqz	a5,.L_strcmp_by_byte_exit
++   beq	a5,a4,.L_strcmp_by_byte
++   subw	a0,a5,a4
++   ret
++.L_strcmp_by_byte_exit:
++   negw	a0,a4
++   ret
++
++END (strcmp)
++libc_hidden_builtin_def (strcmp)
+diff --git a/sysdeps/riscv/rv64/multiarch/strcmp_riscv.S b/sysdeps/riscv/rv64/multiarch/strcmp_riscv.S
+new file mode 100644
+index 0000000000..93e598f0c5
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strcmp_riscv.S
+@@ -0,0 +1,9 @@
++
++/* For __riscv_vector this file defines strcmp.  */
++/* #ifndef __riscv_vector */
++# define strcmp __strcmp_riscv
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++#include "strcmp_.S"
+\ No newline at end of file
+diff --git a/sysdeps/riscv/rv64/multiarch/strcmp_vector.S b/sysdeps/riscv/rv64/multiarch/strcmp_vector.S
+new file mode 100644
+index 0000000000..41d653748a
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strcmp_vector.S
+@@ -0,0 +1,54 @@
++/* The assembly function for strcmp.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines strcmp.  */
++/* #ifndef __riscv_vector */
++# define strcmp __strcmp_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (strcmp)
++
++   vsetvli	a3,zero,e8,m8,tu,mu
++.L_strcmp_loop:
++   vle8ff.v	v0,(a0)
++   vmseq.vx	v16,v0,zero
++   vle8ff.v	v8,(a1)
++   vmsne.vv	v17,v0,v8
++   vmor.mm v16,v16,v17
++   vfirst.m	a4,v16
++   bgez a4, .L_strcmp_loop_exit
++   add a0,a0,a3
++   add a1,a1,a3
++   j .L_strcmp_loop
++
++.L_strcmp_loop_exit:
++   add a0,a0,a4
++   add a1,a1,a4
++   lbu a4,0(a0)
++  	lbu a5,0(a1)
++  	sub a0,a4,a5
++   ret
++
++END (strcmp)
++libc_hidden_builtin_def (strcmp)
++
+diff --git a/sysdeps/riscv/rv64/multiarch/strlen.c b/sysdeps/riscv/rv64/multiarch/strlen.c
+new file mode 100644
+index 0000000000..292c9103fa
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strlen.c
+@@ -0,0 +1,32 @@
++/* Multiple versions of strlen.
++   All versions must be listed in ifunc-impl-list.c.
++   Copyright (C) 2017-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++# define strlen __redirect_strlen
++# include <string.h>
++# undef strlen
++
++# include <riscv-ifunc.h>
++
++# define SYMBOL_NAME strlen
++# include "ifunc-common.h"
++
++riscv_libc_ifunc_redirected (__redirect_strlen, strlen, IFUNC_SELECTOR);
++riscv_libc_ifunc_hidden_def (__redirect_strlen, strlen);
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/strlen_riscv.c b/sysdeps/riscv/rv64/multiarch/strlen_riscv.c
+new file mode 100644
+index 0000000000..e17a5dde31
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strlen_riscv.c
+@@ -0,0 +1,29 @@
++/* RISCV C version strlen.
++   Copyright (C) 2018-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#if IS_IN (libc)
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#undef weak_alias
++#  define STRLEN __strlen_riscv
++# include <string/strlen.c>
++#else
++
++# include <string/strlen.c>
++#endif
+diff --git a/sysdeps/riscv/rv64/multiarch/strlen_vector.S b/sysdeps/riscv/rv64/multiarch/strlen_vector.S
+new file mode 100644
+index 0000000000..dd080e3a2f
+--- /dev/null
++++ b/sysdeps/riscv/rv64/multiarch/strlen_vector.S
+@@ -0,0 +1,46 @@
++/* The assembly function for strlen.  RISC-V version.
++   Copyright (C) 2018 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <sysdep.h>
++
++/* For __riscv_vector this file defines strlen.  */
++/* #ifndef __riscv_vector */
++# define strlen __strlen_vector
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(a)
++/* #endif */
++
++	.p2align 6
++ENTRY (strlen)
++   mv	a1,a0
++
++.strlen_loop:
++   vsetvli	a2,zero,e8,m8,tu,mu
++   vle8ff.v	v0,(a1)
++   csrr	a2,vl
++   vmseq.vi	v8,v0,0
++   vfirst.m	a3,v8
++   add	a1,a1,a2
++   bltz	a3, .strlen_loop
++   add	a0,a0,a2
++   add	a1,a1,a3
++   sub	a0,a1,a0
++   ret
++
++END (strlen)
++libc_hidden_builtin_def (strlen)
+diff --git a/sysdeps/riscv/sysdep.h b/sysdeps/riscv/sysdep.h
+new file mode 100644
+index 0000000000..5229cfaf02
+--- /dev/null
++++ b/sysdeps/riscv/sysdep.h
+@@ -0,0 +1,24 @@
++/* Copyright (C) 2011-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <https://www.gnu.org/licenses/>.  */
++
++#define _SYSDEPS_SYSDEP_H 1
++#include <sysdeps/generic/sysdep.h>
++#include <sys/auxv.h>
++
++#ifdef	__ASSEMBLER__
++
++#endif	/* __ASSEMBLER__ */
+diff --git a/sysdeps/unix/sysv/linux/riscv/sysdep.h b/sysdeps/unix/sysv/linux/riscv/sysdep.h
+index c9f8fd8236..7b75bdfee2 100644
+--- a/sysdeps/unix/sysv/linux/riscv/sysdep.h
++++ b/sysdeps/unix/sysv/linux/riscv/sysdep.h
+@@ -21,6 +21,7 @@
+ 
+ #include <sysdeps/unix/sysv/linux/generic/sysdep.h>
+ #include <tls.h>
++# include <bits/hwcap.h>
+ 
+ #undef SYS_ify
+ #define SYS_ify(syscall_name)	__NR_##syscall_name
+@@ -50,7 +51,6 @@
+ 
+ #ifdef __ASSEMBLER__
+ 
+-# include <bits/hwcap.h>
+ # include <sys/asm.h>
+ 
+ # define ENTRY(name) LEAF(name)
+-- 
+2.33.1
+

+ 25 - 0
recipes-core/glibc/glibc/0007-add-NT_RISCV_VECTOR-macro-definition-to-align-with-l.patch

@@ -0,0 +1,25 @@
+From 4ca3f0f9517885ab7b6c60d9ec4e3a15b83d8d82 Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Tue, 21 Dec 2021 18:39:15 -0800
+Subject: [PATCH 7/8] add NT_RISCV_VECTOR macro definition to align with linux
+ elf.h
+
+---
+ elf/elf.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/elf/elf.h b/elf/elf.h
+index 50f87baceb..27f46afa27 100644
+--- a/elf/elf.h
++++ b/elf/elf.h
+@@ -822,6 +822,7 @@ typedef struct
+ #define NT_MIPS_DSP	0x800		/* MIPS DSP ASE registers.  */
+ #define NT_MIPS_FP_MODE	0x801		/* MIPS floating-point mode.  */
+ #define NT_MIPS_MSA	0x802		/* MIPS SIMD registers.  */
++#define NT_RISCV_VECTOR	0x900		/* RISC-V vector registers */
+ 
+ /* Legal values for the note segment descriptor types for object files.  */
+ 
+-- 
+2.33.1
+

+ 33 - 0
recipes-core/glibc/glibc/0008-fix-the-bcmp-unrecognized-issue.patch

@@ -0,0 +1,33 @@
+From 9f30b03a901457dd59b5c0f7740f8b413f653d5f Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Sun, 16 Jan 2022 16:56:07 -0800
+Subject: [PATCH 8/8] fix the bcmp unrecognized issue
+
+---
+ sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c  | 2 --
+ sysdeps/riscv/rv64/multiarch/memcmp_vector.S | 1 +
+ 2 files changed, 1 insertion(+), 2 deletions(-)
+ delete mode 100644 sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c
+
+diff --git a/sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c b/sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c
+deleted file mode 100644
+index 2054d18261..0000000000
+--- a/sysdeps/riscv/rv64/multiarch/aeabi_memcpy.c
++++ /dev/null
+@@ -1,2 +0,0 @@
+-/* Empty file to override sysdeps/riscv version. See memcpy.S for definitions
+-   of these functions.  */
+diff --git a/sysdeps/riscv/rv64/multiarch/memcmp_vector.S b/sysdeps/riscv/rv64/multiarch/memcmp_vector.S
+index f6cbc1307b..fe89f92268 100644
+--- a/sysdeps/riscv/rv64/multiarch/memcmp_vector.S
++++ b/sysdeps/riscv/rv64/multiarch/memcmp_vector.S
+@@ -52,5 +52,6 @@ ENTRY (memcmp)
+    add	a0,zero,zero
+    ret
+ END (memcmp)
++weak_alias (memcmp, bcmp)
+ libc_hidden_builtin_def (memcmp)
+ 
+-- 
+2.33.1
+

+ 27 - 0
recipes-core/glibc/glibc/0009-Revert-RISC-V-Reserve-about-5K-space-in-mcontext_t-t.patch

@@ -0,0 +1,27 @@
+From 0e504f890152ef8c96f4a5913dddd8179dbc1f71 Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Wed, 9 Feb 2022 23:04:46 -0800
+Subject: [PATCH 09/12] Revert "RISC-V: Reserve about 5K space in mcontext_t to
+ support future ISA expansion."
+
+This reverts commit bcface37cf6df3f3b0800f79e4282a690122b0c8.
+---
+ sysdeps/unix/sysv/linux/riscv/sys/ucontext.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h b/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h
+index 80caf078fc..cfafa44f99 100644
+--- a/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h
++++ b/sysdeps/unix/sysv/linux/riscv/sys/ucontext.h
+@@ -82,8 +82,6 @@ typedef struct mcontext_t
+   {
+     __riscv_mc_gp_state __gregs;
+     union  __riscv_mc_fp_state __fpregs;
+-    /* 5K + 256 reserved for vector state and future expansion.  */
+-    unsigned char __reserved[5376] __attribute__ ((__aligned__ (16)));
+   } mcontext_t;
+ 
+ /* Userlevel context.  */
+-- 
+2.33.1
+

+ 262 - 0
recipes-core/glibc/glibc/0010-Revert-RISC-V-Save-and-restore-VCSR-when-doing-user-.patch

@@ -0,0 +1,262 @@
+From edd15521391233dec3a1538c1e091881395b277b Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Wed, 9 Feb 2022 23:12:18 -0800
+Subject: [PATCH 10/12] Revert "RISC-V: Save and restore VCSR when doing user
+ context switch"
+
+This reverts commit 1c08ed548a24c41542bdb7309e05c1aef70f135d.
+---
+ sysdeps/riscv/Makefile                       |  5 ---
+ sysdeps/riscv/rtld-global-offsets.sym        |  7 ----
+ sysdeps/unix/sysv/linux/riscv/bits/hwcap.h   | 31 ---------------
+ sysdeps/unix/sysv/linux/riscv/getcontext.S   | 22 +----------
+ sysdeps/unix/sysv/linux/riscv/setcontext.S   | 22 -----------
+ sysdeps/unix/sysv/linux/riscv/swapcontext.S  | 41 --------------------
+ sysdeps/unix/sysv/linux/riscv/ucontext_i.sym |  6 ---
+ 7 files changed, 1 insertion(+), 133 deletions(-)
+ delete mode 100644 sysdeps/riscv/rtld-global-offsets.sym
+ delete mode 100644 sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+
+diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile
+index a5c2106a09..20a9968106 100644
+--- a/sysdeps/riscv/Makefile
++++ b/sysdeps/riscv/Makefile
+@@ -2,11 +2,6 @@ ifeq ($(subdir),misc)
+ sysdep_headers += sys/asm.h
+ endif
+ 
+-ifeq ($(subdir),csu)
+-# get offset to rtld_global._dl_hwcap and rtld_global._dl_hwcap2.
+-gen-as-const-headers += rtld-global-offsets.sym
+-endif
+-
+ # RISC-V's assembler also needs to know about PIC as it changes the definition
+ # of some assembler macros.
+ ASFLAGS-.os += $(pic-ccflag)
+diff --git a/sysdeps/riscv/rtld-global-offsets.sym b/sysdeps/riscv/rtld-global-offsets.sym
+deleted file mode 100644
+index ff4e97f2a6..0000000000
+--- a/sysdeps/riscv/rtld-global-offsets.sym
++++ /dev/null
+@@ -1,7 +0,0 @@
+-#define SHARED 1
+-
+-#include <ldsodefs.h>
+-
+-#define rtld_global_ro_offsetof(mem) offsetof (struct rtld_global_ro, mem)
+-
+-RTLD_GLOBAL_RO_DL_HWCAP_OFFSET	rtld_global_ro_offsetof (_dl_hwcap)
+diff --git a/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h b/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+deleted file mode 100644
+index e6c5ef5740..0000000000
+--- a/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
++++ /dev/null
+@@ -1,31 +0,0 @@
+-/* Defines for bits in AT_HWCAP.  RISC-V Linux version.
+-   Copyright (C) 2021 Free Software Foundation, Inc.
+-   This file is part of the GNU C Library.
+-
+-   The GNU C Library is free software; you can redistribute it and/or
+-   modify it under the terms of the GNU Lesser General Public
+-   License as published by the Free Software Foundation; either
+-   version 2.1 of the License, or (at your option) any later version.
+-
+-   The GNU C Library is distributed in the hope that it will be useful,
+-   but WITHOUT ANY WARRANTY; without even the implied warranty of
+-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+-   Lesser General Public License for more details.
+-
+-   You should have received a copy of the GNU Lesser General Public
+-   License along with the GNU C Library; if not, see
+-   <http://www.gnu.org/licenses/>.  */
+-
+-#if !defined (_SYS_AUXV_H) && !defined (_LINUX_RISCV_SYSDEP_H)
+-# error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
+-#endif
+-
+-/* The following must match the kernel's <asm/hwcap.h>.  */
+-#define HWCAP_ISA_I      0x100		//(1 << ('I' - 'A'))
+-#define HWCAP_ISA_M      0x1000 	//(1 << ('M' - 'A'))
+-#define HWCAP_ISA_A      0x1		//(1 << ('A' - 'A'))
+-#define HWCAP_ISA_F      0x20		//(1 << ('F' - 'A'))
+-#define HWCAP_ISA_D      0x8		//(1 << ('D' - 'A'))
+-#define HWCAP_ISA_C      0x4		//(1 << ('C' - 'A'))
+-#define HWCAP_ISA_V      0x200000	//(1 << ('V' - 'A'))
+-
+diff --git a/sysdeps/unix/sysv/linux/riscv/getcontext.S b/sysdeps/unix/sysv/linux/riscv/getcontext.S
+index 840d8feca4..d6a9bbca60 100644
+--- a/sysdeps/unix/sysv/linux/riscv/getcontext.S
++++ b/sysdeps/unix/sysv/linux/riscv/getcontext.S
+@@ -16,8 +16,6 @@
+    License along with the GNU C Library.  If not, see
+    <https://www.gnu.org/licenses/>.  */
+ 
+-#include <sysdep.h>
+-#include <rtld-global-offsets.h>
+ #include "ucontext-macros.h"
+ 
+ /* int getcontext (ucontext_t *ucp) */
+@@ -41,25 +39,6 @@ LEAF (__getcontext)
+ 	SAVE_INT_REG (s10, 26, a0)
+ 	SAVE_INT_REG (s11, 27, a0)
+ 
+-#ifdef __riscv_vector
+-# ifdef SHARED
+-	la	t1, _rtld_global_ro
+-	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
+-# else
+-	la	t1, _dl_hwcap
+-	REG_L	t1, (t1)
+-# endif
+-	li	t2, HWCAP_ISA_V
+-	and	t2, t1, t2
+-	beqz	t2, 1f
+-	addi	t2, a0,	MCONTEXT_EXTENSION
+-	li	t1, RVV_MAGIC
+-	sw	t1, (t2)
+-	csrr	t1, vcsr
+-	REG_S	t1, VCSR_OFFSET(t2)
+-1:
+-#endif
+-
+ #ifndef __riscv_float_abi_soft
+ 	frsr	a1
+ 
+@@ -94,4 +73,5 @@ LEAF (__getcontext)
+ 99:	j	__syscall_error
+ 
+ PSEUDO_END (__getcontext)
++
+ weak_alias (__getcontext, getcontext)
+diff --git a/sysdeps/unix/sysv/linux/riscv/setcontext.S b/sysdeps/unix/sysv/linux/riscv/setcontext.S
+index d2404fbe9c..9510518750 100644
+--- a/sysdeps/unix/sysv/linux/riscv/setcontext.S
++++ b/sysdeps/unix/sysv/linux/riscv/setcontext.S
+@@ -16,8 +16,6 @@
+    License along with the GNU C Library.  If not, see
+    <https://www.gnu.org/licenses/>.  */
+ 
+-#include <sysdep.h>
+-#include <rtld-global-offsets.h>
+ #include "ucontext-macros.h"
+ 
+ /*  int __setcontext (const ucontext_t *ucp)
+@@ -66,26 +64,6 @@ LEAF (__setcontext)
+ 	fssr	t1
+ #endif /* __riscv_float_abi_soft */
+ 
+-#ifdef __riscv_vector
+-#ifdef SHARED
+-	la	t1, _rtld_global_ro
+-	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
+-#else
+-	la	t1, _dl_hwcap
+-	REG_L	t1, (t1)
+-#endif
+-	li	t2, HWCAP_ISA_V
+-	and	t2, t1, t2
+-	beqz	t2, 1f
+-	li      t1, RVV_MAGIC
+-	addi	t2, t0,	MCONTEXT_EXTENSION
+-	lw	a1, (t2)
+-	bne	a1, t1, 1f
+-	REG_L   t1, VCSR_OFFSET(t2)
+-	csrw	vcsr, t1
+-1:
+-#endif
+-
+ 	/* Note the contents of argument registers will be random
+ 	   unless makecontext() has been called.  */
+ 	RESTORE_INT_REG     (t1,   0, t0)
+diff --git a/sysdeps/unix/sysv/linux/riscv/swapcontext.S b/sysdeps/unix/sysv/linux/riscv/swapcontext.S
+index 94ae8e4bdc..df0f69969c 100644
+--- a/sysdeps/unix/sysv/linux/riscv/swapcontext.S
++++ b/sysdeps/unix/sysv/linux/riscv/swapcontext.S
+@@ -16,8 +16,6 @@
+    License along with the GNU C Library.  If not, see
+    <https://www.gnu.org/licenses/>.  */
+ 
+-#include <sysdep.h>
+-#include <rtld-global-offsets.h>
+ #include "ucontext-macros.h"
+ 
+ /* int swapcontext (ucontext_t *oucp, const ucontext_t *ucp) */
+@@ -42,25 +40,6 @@ LEAF (__swapcontext)
+ 	SAVE_INT_REG (s10, 26, a0)
+ 	SAVE_INT_REG (s11, 27, a0)
+ 
+-#ifdef __riscv_vector
+-#ifdef SHARED
+-	la      t1, _rtld_global_ro
+-	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
+-#else
+-	la	t1, _dl_hwcap
+-	REG_L   t1, (t1)
+-#endif
+-	li	t2, HWCAP_ISA_V
+-	and	t2, t1, t2
+-	beqz	t2, 1f
+-	addi	t2, a0,	MCONTEXT_EXTENSION
+-	li	t1, RVV_MAGIC
+-	sw	t1, (t2)
+-	csrr	t1, vcsr
+-	REG_S	t1, VCSR_OFFSET(t2)
+-1:
+-#endif
+-
+ #ifndef __riscv_float_abi_soft
+ 	frsr a1
+ 
+@@ -110,26 +89,6 @@ LEAF (__swapcontext)
+ 	fssr	t1
+ #endif /* __riscv_float_abi_soft */
+ 
+-#ifdef __riscv_vector
+-#ifdef SHARED
+-	la      t1, _rtld_global_ro
+-	REG_L   t1, RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(t1)
+-#else
+-	la	t1, _dl_hwcap
+-	REG_L   t1, (t1)
+-#endif
+-	li	t2, HWCAP_ISA_V
+-	and	t2, t1, t2
+-	beqz	t2, 1f
+-	li      t1, RVV_MAGIC
+-	addi	t2, t0,	MCONTEXT_EXTENSION
+-	lw	a1, (t2)
+-	bne	a1, t1, 1f
+-	REG_L   t1, VCSR_OFFSET(t2)
+-	csrw	vcsr, t1
+-1:
+-#endif
+-
+ 	/* Note the contents of argument registers will be random
+ 	   unless makecontext() has been called.  */
+ 	RESTORE_INT_REG (t1,   0, t0)
+diff --git a/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym b/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym
+index 4037473c9a..be55b26310 100644
+--- a/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym
++++ b/sysdeps/unix/sysv/linux/riscv/ucontext_i.sym
+@@ -2,7 +2,6 @@
+ #include <signal.h>
+ #include <stddef.h>
+ #include <sys/ucontext.h>
+-#include <asm/sigcontext.h>
+ 
+ -- Constants used by the rt_sigprocmask call.
+ 
+@@ -28,10 +27,5 @@ STACK_FLAGS			stack (ss_flags)
+ 
+ MCONTEXT_GREGS			mcontext (__gregs)
+ MCONTEXT_FPREGS			mcontext (__fpregs)
+-MCONTEXT_EXTENSION 		mcontext (__reserved)
+ 
+ UCONTEXT_SIZE			sizeof (ucontext_t)
+-
+-VCSR_OFFSET			offsetof (struct __riscv_v_state, vcsr)
+-
+-RVV_MAGIC
+-- 
+2.33.1
+

+ 137 - 0
recipes-core/glibc/glibc/0011-riscv-Resolve-symbols-directly-for-symbols-with-STO_.patch

@@ -0,0 +1,137 @@
+From fac8b2beac5d568ca0ed7f5e04a347befda44f58 Mon Sep 17 00:00:00 2001
+From: Hsiangkai Wang <kai.wang@sifive.com>
+Date: Tue, 18 Jan 2022 12:31:59 +0800
+Subject: [PATCH 11/12] riscv: Resolve symbols directly for symbols with
+ STO_RISCV_VARIANT_CC.
+
+In some cases, we do not want to go through the resolver for function
+calls. For example, functions with vector arguments will use vector
+registers to pass arguments. In the resolver, we do not save/restore the
+vector argument registers for lazy binding efficiency. To avoid ruining
+the vector arguments, functions with vector arguments will not go
+through the resolver.
+
+To achieve the goal, we will annotate the function symbols with
+STO_RISCV_VARIANT_CC flag and add DT_RISCV_VARIANT_CC tag in the dynamic
+section. In the first pass on PLT relocations, we do not set up to call
+_dl_runtime_resolve. Instead, we resolve the functions directly.
+
+Signed-off-by: Hsiangkai Wang <kai.wang@sifive.com>
+Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
+---
+ elf/elf.h                    |  7 +++++++
+ manual/platform.texi         |  6 ++++++
+ sysdeps/riscv/dl-dtprocnum.h | 21 +++++++++++++++++++++
+ sysdeps/riscv/dl-machine.h   | 26 ++++++++++++++++++++++++++
+ 4 files changed, 60 insertions(+)
+ create mode 100644 sysdeps/riscv/dl-dtprocnum.h
+
+diff --git a/elf/elf.h b/elf/elf.h
+index 27f46afa27..cc62deca0d 100644
+--- a/elf/elf.h
++++ b/elf/elf.h
+@@ -3907,6 +3907,13 @@ enum
+ 
+ #define R_TILEGX_NUM		130
+ 
++/* RISC-V specific values for the Dyn d_tag field.  */
++#define DT_RISCV_VARIANT_CC	(DT_LOPROC + 1)
++#define DT_RISCV_NUM		2
++
++/* RISC-V specific values for the st_other field.  */
++#define STO_RISCV_VARIANT_CC 0x80
++
+ /* RISC-V ELF Flags */
+ #define EF_RISCV_RVC 			0x0001
+ #define EF_RISCV_FLOAT_ABI 		0x0006
+diff --git a/manual/platform.texi b/manual/platform.texi
+index d5fdc5bd05..a1a740f381 100644
+--- a/manual/platform.texi
++++ b/manual/platform.texi
+@@ -121,6 +121,12 @@ when it is not allowed, the priority is set to medium.
+ @node RISC-V
+ @appendixsec RISC-V-specific Facilities
+ 
++Functions that are lazily bound must be compatible with the standard calling
++convention. When a function is annotated with STO_RISCV_VARIANT_CC, it means
++this function is not compatible with the standard calling convention. The
++dynamic linker will directly resolve it instead of using the lazy binding
++mechanism.
++
+ Cache management facilities specific to RISC-V systems that implement the Linux
+ ABI are declared in @file{sys/cachectl.h}.
+ 
+diff --git a/sysdeps/riscv/dl-dtprocnum.h b/sysdeps/riscv/dl-dtprocnum.h
+new file mode 100644
+index 0000000000..f189fd700a
+--- /dev/null
++++ b/sysdeps/riscv/dl-dtprocnum.h
+@@ -0,0 +1,21 @@
++/* Configuration of lookup functions.  RISC-V version.
++   Copyright (C) 2019-2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library.  If not, see
++   <https://www.gnu.org/licenses/>.  */
++
++/* Number of extra dynamic section entries for this architecture.  By
++   default there are none.  */
++#define DT_THISPROCNUM	DT_RISCV_NUM
+diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h
+index ce2b3c3875..22e3c81706 100644
+--- a/sysdeps/riscv/dl-machine.h
++++ b/sysdeps/riscv/dl-machine.h
+@@ -53,6 +53,9 @@
+      || (__WORDSIZE == 64 && (type) == R_RISCV_TLS_TPREL64)))	\
+    | (ELF_RTYPE_CLASS_COPY * ((type) == R_RISCV_COPY)))
+ 
++//* Translate a processor specific dynamic tag to the index in l_info array.  */
++#define DT_RISCV(x) (DT_RISCV_##x - DT_LOPROC + DT_NUM)
++
+ /* Return nonzero iff ELF header is compatible with the running host.  */
+ static inline int __attribute_used__
+ elf_machine_matches_host (const ElfW(Ehdr) *ehdr)
+@@ -299,6 +302,29 @@ elf_machine_lazy_rel (struct link_map *map, struct r_scope_elem *scope[],
+   /* Check for unexpected PLT reloc type.  */
+   if (__glibc_likely (r_type == R_RISCV_JUMP_SLOT))
+     {
++      if (__glibc_unlikely (map->l_info[DT_RISCV (VARIANT_CC)] != NULL))
++	{
++          /* Check the symbol table for variant CC symbols.  */
++          const Elf_Symndx symndx = ELFW(R_SYM) (reloc->r_info);
++          const ElfW(Sym) *symtab =
++            (const void *)D_PTR (map, l_info[DT_SYMTAB]);
++          const ElfW(Sym) *sym = &symtab[symndx];
++          if (__glibc_unlikely (sym->st_other & STO_RISCV_VARIANT_CC))
++            {
++              /* Avoid lazy resolution of variant CC symbols.  */
++              const struct r_found_version *version = NULL;
++              if (map->l_info[VERSYMIDX (DT_VERSYM)] != NULL)
++                {
++                  const ElfW(Half) *vernum =
++                    (const void *)D_PTR (map, l_info[VERSYMIDX (DT_VERSYM)]);
++                  version = &map->l_versions[vernum[symndx] & 0x7fff];
++                }
++              elf_machine_rela (map, scope, reloc, sym, version, reloc_addr,
++                                skip_ifunc);
++              return;
++            }
++	}
++
+       if (__glibc_unlikely (map->l_mach.plt == 0))
+ 	{
+ 	  if (l_addr)
+-- 
+2.33.1
+

+ 49 - 0
recipes-core/glibc/glibc/0012-add-hwcap.h-header-file.patch

@@ -0,0 +1,49 @@
+From b20b70ad45a75c817b2320bed6c8f463e230c20e Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Mon, 14 Feb 2022 15:40:51 -0800
+Subject: [PATCH 12/12] add hwcap.h header file
+
+---
+ sysdeps/unix/sysv/linux/riscv/bits/hwcap.h | 30 ++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+ create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+
+diff --git a/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h b/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+new file mode 100644
+index 0000000000..a90e7bb070
+--- /dev/null
++++ b/sysdeps/unix/sysv/linux/riscv/bits/hwcap.h
+@@ -0,0 +1,30 @@
++/* Defines for bits in AT_HWCAP.  RISC-V Linux version.
++   Copyright (C) 2021 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#if !defined (_SYS_AUXV_H) && !defined (_LINUX_RISCV_SYSDEP_H)
++# error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
++#endif
++
++/* The following must match the kernel's <asm/hwcap.h>.  */
++#define HWCAP_ISA_I      0x100		//(1 << ('I' - 'A'))
++#define HWCAP_ISA_M      0x1000 	//(1 << ('M' - 'A'))
++#define HWCAP_ISA_A      0x1		//(1 << ('A' - 'A'))
++#define HWCAP_ISA_F      0x20		//(1 << ('F' - 'A'))
++#define HWCAP_ISA_D      0x8		//(1 << ('D' - 'A'))
++#define HWCAP_ISA_C      0x4		//(1 << ('C' - 'A'))
++#define HWCAP_ISA_V      0x200000	//(1 << ('V' - 'A'))
+-- 
+2.33.1
+

+ 33 - 0
recipes-core/glibc/glibc/0013-change-memcpy_vector-LMUL-to-m8.patch

@@ -0,0 +1,33 @@
+From 5ba1268621eb208a5ed4a8ce2bbb6ae3392046a7 Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Mon, 28 Feb 2022 18:49:58 -0800
+Subject: [PATCH 13/13] change memcpy_vector LMUL to m8
+
+---
+ sysdeps/riscv/rv64/multiarch/memcpy_vector.S | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/sysdeps/riscv/rv64/multiarch/memcpy_vector.S b/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
+index 2319647de8..bae330f6e0 100644
+--- a/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
++++ b/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
+@@ -34,14 +34,14 @@ ENTRY (memcpy)
+ 	li	a6, 16
+ 	beqz	a5, .loop_cpy
+ 	sub	a5, a6, a5
+-	vsetvli	t0, a5, e8, m4
++	vsetvli	t0, a5, e8, m8
+ 	vle8.v	v0, (a1)
+ 	add	a1, a1, t0
+ 	sub	a2, a2, t0
+ 	vse8.v	v0, (a3)
+ 	add	a3, a3, t0
+ .loop_cpy:
+-	vsetvli	t0, a2, e8, m4
++	vsetvli	t0, a2, e8, m8
+ 	vle8.v	v0, (a1)
+ 	add	a1, a1, t0
+ 	sub	a2, a2, t0
+-- 
+2.33.1
+

+ 13 - 0
recipes-core/glibc/glibc_2.35.bb

@@ -56,6 +56,19 @@ SRC_URI =  "${GLIBC_GIT_URI};branch=${SRCBRANCH};name=glibc \
            file://0029-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch \
            file://0030-powerpc-Do-not-ask-compiler-for-finding-arch.patch \
            file://0001-fix-create-thread-failed-in-unprivileged-process-BZ-.patch \
+           file://0001-RISC-V-Remove-riscv-specific-sigcontext.h.patch \
+           file://0002-RISC-V-Reserve-about-5K-space-in-mcontext_t-to-suppo.patch \
+           file://0003-RISC-V-Save-and-restore-VCSR-when-doing-user-context.patch \
+           file://0004-RISC-V-Extend-MINSIGSTKSZ-and-SIGSTKSZ-to-backup-RVV.patch \
+           file://0005-RISC-V-Expand-PTHREAD_STACK_MIN-to-support-RVV-envir.patch \
+           file://0006-add-vector-support-for-memset-memcmp-memmove-memcpy-.patch \
+           file://0007-add-NT_RISCV_VECTOR-macro-definition-to-align-with-l.patch \
+           file://0008-fix-the-bcmp-unrecognized-issue.patch \
+           file://0009-Revert-RISC-V-Reserve-about-5K-space-in-mcontext_t-t.patch  \
+           file://0010-Revert-RISC-V-Save-and-restore-VCSR-when-doing-user-.patch  \
+           file://0011-riscv-Resolve-symbols-directly-for-symbols-with-STO_.patch  \
+           file://0012-add-hwcap.h-header-file.patch  \
+           file://0013-change-memcpy_vector-LMUL-to-m8.patch \
            "
 S = "${WORKDIR}/git"
 B = "${WORKDIR}/build-${TARGET_SYS}"