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dubhe: Update Dhrystone compiler flags

Changed arguments from -finline-functions to -fno-inline for Dhrystone.

Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
Jun Yuan Tan 2 years ago
parent
commit
6afb041e7f

+ 29 - 0
recipes-benchmark/dhrystone/dhrystone/0001-dhrystone-Edit-compiler-flags.patch

@@ -0,0 +1,29 @@
+From f204001c9478facc466400be5089ed8bf1a77ce8 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Fri, 29 Oct 2021 10:42:16 +0800
+Subject: [PATCH] dhrystone: Edit compiler flags
+
+This patch is needed for adding compiler flags for Dhrystone
+
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ Makefile | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index 6fb3e5a..6640037 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,10 +1,10 @@
+ DHRY-LFLAGS =
+ 
+ DHRY-CFLAGS := -O3 -DTIME -DNOENUM -Wno-implicit -save-temps
+-DHRY-CFLAGS += -fno-builtin-printf -fno-common -falign-functions=4
++DHRY-CFLAGS += -mabi=lp64d -O3 -fno-common -funroll-loops -fno-inline -funroll-all-loops -falign-jumps=8 -falign-loops=8 -finline-limit=1000 -falign-functions=8 -ffast-math -fno-tree-loop-distribute-patterns --param fsm-scale-path-stmts=3 -mcmodel=medany -fno-builtin-printf -lrt
+ 
+ #Uncomment below for FPGA run, default DHRY_ITERS is 2000 for RTL
+-#DHRY-CFLAGS += -DDHRY_ITERS=20000000
++DHRY-CFLAGS += -DDHRY_ITERS=20000000
+ 
+ SRC = dhry_1.c dhry_2.c strcmp.S
+ HDR = dhry.h

+ 1 - 1
recipes-benchmark/dhrystone/dhrystone_2.1.bb

@@ -5,7 +5,7 @@ LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/PD;md5=b3597d1
 INHIBIT_PACKAGE_STRIP = "1"
 
 SRC_URI = "git://github.com/sifive/benchmark-dhrystone.git \
-           file://0001-Edit-Makefile-to-add-compiler-flags.patch \
+           file://0001-dhrystone-Edit-compiler-flags.patch \
            "
 SRCREV = "0ddff533cc9052c524990d5ace4560372053314b"
 

+ 0 - 29
recipes-benchmark/dhrystone/files/0001-Edit-Makefile-to-add-compiler-flags.patch

@@ -1,29 +0,0 @@
-From 62f00defc2fbee9cb76d7a424df7281fcec748c7 Mon Sep 17 00:00:00 2001
-From: junyuantan <junyuan.tan@starfivetech.com>
-Date: Mon, 16 Aug 2021 17:41:19 +0800
-Subject: [PATCH] Edit Makefile to add compiler flags
-
-This patch is needed for adding compiler flags for Coremark
-
-Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
----
- Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 6fb3e5a..2454959 100644
---- a/Makefile
-+++ b/Makefile
-@@ -1,10 +1,10 @@
- DHRY-LFLAGS =
- 
- DHRY-CFLAGS := -O3 -DTIME -DNOENUM -Wno-implicit -save-temps
--DHRY-CFLAGS += -fno-builtin-printf -fno-common -falign-functions=4
-+DHRY-CFLAGS += -mabi=lp64d -O3 -fno-common -funroll-loops -finline-functions -funroll-all-loops -falign-jumps=8 -falign-loops=8 -finline-limit=1000 -falign-functions=8 -ffast-math -fno-tree-loop-distribute-patterns --param fsm-scale-path-stmts=3 -mcmodel=medany -fno-builtin-printf -lrt
- 
- #Uncomment below for FPGA run, default DHRY_ITERS is 2000 for RTL
--#DHRY-CFLAGS += -DDHRY_ITERS=20000000
-+DHRY-CFLAGS += -DDHRY_ITERS=20000000
- 
- SRC = dhry_1.c dhry_2.c strcmp.S
- HDR = dhry.h