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+SUMMARY = "RISC-V Open Source Supervisor Binary Interface (OpenSBI)"
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+DESCRIPTION = "OpenSBI aims to provide an open-source and extensible implementation of the RISC-V SBI specification for a platform specific firmware (M-mode) and a general purpose OS, hypervisor or bootloader (S-mode or HS-mode). OpenSBI implementation can be easily extended by RISC-V platform or System-on-Chip vendors to fit a particular hadware configuration."
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+HOMEPAGE = "https://github.com/riscv/opensbi"
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+LICENSE = "BSD-2-Clause"
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+LIC_FILES_CHKSUM = "file://COPYING.BSD;md5=42dd9555eb177f35150cf9aa240b61e5"
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+
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+require opensbi-payloads.inc
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+
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+inherit autotools-brokensep deploy
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+
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+SRCREV = "bee8253d8f04c56017860386d1b2132cf4f4b7c5"
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+SRC_URI = "git://git@192.168.110.45/starfive-tech/opensbi.git;protocol=ssh;branch=starfive-v1.1-dubhe"
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+
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+S = "${WORKDIR}/git"
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+
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+EXTRA_OEMAKE += "PLATFORM=${RISCV_SBI_PLAT} I=${D} FW_PIC=n CLANG_TARGET= "
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+# If RISCV_SBI_PAYLOAD is set then include it as a payload
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+EXTRA_OEMAKE:append = " ${@riscv_get_extra_oemake_image(d)}"
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+EXTRA_OEMAKE:append = " ${@riscv_get_extra_oemake_fdt(d)}"
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+
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+# Required if specifying a custom payload
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+do_compile[depends] += "${@riscv_get_do_compile_depends(d)}"
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+
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+do_install:append() {
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+ # In the future these might be required as a dependency for other packages.
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+ # At the moment just delete them to avoid warnings
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+ rm -r ${D}/include
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+ rm -r ${D}/lib*
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+ rm -r ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/payloads
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+}
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+
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+do_deploy () {
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+ install -m 755 ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_payload.* ${DEPLOYDIR}/
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+ install -m 755 ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_jump.* ${DEPLOYDIR}/
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+ install -m 755 ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_dynamic.* ${DEPLOYDIR}/
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+}
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+
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+addtask deploy before do_build after do_install
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+
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+FILES:${PN} += "/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_jump.*"
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+FILES:${PN} += "/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_payload.*"
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+FILES:${PN} += "/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_dynamic.*"
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+
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+COMPATIBLE_HOST = "(riscv64|riscv32).*"
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+INHIBIT_PACKAGE_STRIP = "1"
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+
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+SECURITY_CFLAGS = ""
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