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dubhe: Clang/LLVM: Updated Clang/LLVM version to 14.0.0

Updated Clang/LLVM to 14.0.0 and added patch files to support RISC-V B
and V extension instructions.

Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
Jun Yuan Tan 2 years ago
parent
commit
1f748c5427
50 changed files with 4129 additions and 0 deletions
  1. 3 0
      recipes-devtools/clang/clang-cross-canadian_git.bbappend
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  4. 207 0
      recipes-devtools/clang/clang/0001-Merge-B-instruction-from-0p94-to-1.0.patch
  5. 43 0
      recipes-devtools/clang/clang/0001-lldb-Add-lxml2-to-linker-cmdline-of-xml-is-found.patch
  6. 63 0
      recipes-devtools/clang/clang/0002-libcxxabi-Find-libunwind-headers-when.patch
  7. 1449 0
      recipes-devtools/clang/clang/0002-update-B-instruction-to-1.0-and-Merge-four-Custom-CS.patch
  8. 154 0
      recipes-devtools/clang/clang/0003-add-pref-instruction.patch
  9. 48 0
      recipes-devtools/clang/clang/0003-compiler-rt-Simplify-cross-compilation.-Don-t-use-na.patch
  10. 94 0
      recipes-devtools/clang/clang/0004-llvm-TargetLibraryInfo-Undefine-libc-functions-if-th.patch
  11. 40 0
      recipes-devtools/clang/clang/0005-llvm-allow-env-override-of-exe-path.patch
  12. 67 0
      recipes-devtools/clang/clang/0006-clang-driver-Check-sysroot-for-ldso-path.patch
  13. 37 0
      recipes-devtools/clang/clang/0007-clang-Driver-tools.cpp-Add-lssp_nonshared-on-musl.patch
  14. 31 0
      recipes-devtools/clang/clang/0008-clang-musl-ppc-does-not-support-128-bit-long-double.patch
  15. 44 0
      recipes-devtools/clang/clang/0009-clang-Prepend-trailing-to-sysroot.patch
  16. 47 0
      recipes-devtools/clang/clang/0010-clang-Look-inside-the-target-sysroot-for-compiler-ru.patch
  17. 52 0
      recipes-devtools/clang/clang/0011-clang-Define-releative-gcc-installation-dir.patch
  18. 40 0
      recipes-devtools/clang/clang/0012-clang-Add-lpthread-and-ldl-along-with-lunwind-for-st.patch
  19. 30 0
      recipes-devtools/clang/clang/0013-Pass-PYTHON_EXECUTABLE-when-cross-compiling-for-nati.patch
  20. 39 0
      recipes-devtools/clang/clang/0014-Check-for-atomic-double-intrinsics.patch
  21. 44 0
      recipes-devtools/clang/clang/0015-libcxx-Add-compiler-runtime-library-to-link-step-for.patch
  22. 122 0
      recipes-devtools/clang/clang/0016-clang-llvm-cmake-Fix-configure-for-packages-using.patch
  23. 45 0
      recipes-devtools/clang/clang/0017-clang-Fix-resource-dir-location-for-cross-toolchains.patch
  24. 32 0
      recipes-devtools/clang/clang/0018-fix-path-to-libffi.patch
  25. 73 0
      recipes-devtools/clang/clang/0019-clang-driver-Add-dyld-prefix-when-checking-sysroot-f.patch
  26. 108 0
      recipes-devtools/clang/clang/0020-clang-Use-python3-in-python-scripts.patch
  27. 76 0
      recipes-devtools/clang/clang/0021-For-x86_64-set-Yocto-based-GCC-install-search-path.patch
  28. 50 0
      recipes-devtools/clang/clang/0022-llvm-Do-not-use-find_library-for-ncurses.patch
  29. 38 0
      recipes-devtools/clang/clang/0023-llvm-Insert-anchor-for-adding-OE-distro-vendor-names.patch
  30. 78 0
      recipes-devtools/clang/clang/0024-compiler-rt-Use-mcr-based-barrier-on-armv6.patch
  31. 33 0
      recipes-devtools/clang/clang/0025-clang-Switch-defaults-to-dwarf-5-debug-info-on-Linux.patch
  32. 74 0
      recipes-devtools/clang/clang/0026-compiler-rt-Do-not-use-backtrace-APIs-on-non-glibc-l.patch
  33. 34 0
      recipes-devtools/clang/clang/0027-clang-Fix-x86-triple-for-non-debian-multiarch-linux-.patch
  34. 35 0
      recipes-devtools/clang/clang/0028-compiler-rt-Link-scudo-with-SANITIZER_CXX_ABI_LIBRAR.patch
  35. 35 0
      recipes-devtools/clang/clang/0029-compiler-rt-Link-scudo-standalone-with-libatomic-on-.patch
  36. 61 0
      recipes-devtools/clang/clang/0030-libunwind-Added-unw_backtrace-method.patch
  37. 41 0
      recipes-devtools/clang/clang/0031-compiler-rt-Use-uintptr_t-instead-of-_Unwind_Word.patch
  38. 52 0
      recipes-devtools/clang/clang/0032-compiler-rt-Do-not-force-thumb-mode-directive.patch
  39. 37 0
      recipes-devtools/clang/clang/0033-clang-Do-not-use-install-relative-libc-headers.patch
  40. 90 0
      recipes-devtools/clang/clang/0034-clang-Fix-how-driver-finds-GCC-installation-path-on.patch
  41. 9 0
      recipes-devtools/clang/clang/libunwind.pc.in
  42. 44 0
      recipes-devtools/clang/clang/llvm-config
  43. 7 0
      recipes-devtools/clang/clang_git.bbappend
  44. 11 0
      recipes-devtools/clang/compiler-rt_git.bbappend
  45. 8 0
      recipes-devtools/clang/libcxx_git.bbappend
  46. 50 0
      recipes-devtools/clang/llvm-project-source.bbappend
  47. 31 0
      recipes-devtools/llvm/llvm/0001-AsmMatcherEmitter-sort-ClassInfo-lists-by-name-as-we.patch
  48. 90 0
      recipes-devtools/llvm/llvm/0006-llvm-TargetLibraryInfo-Undefine-libc-functions-if-th.patch
  49. 37 0
      recipes-devtools/llvm/llvm/0007-llvm-allow-env-override-of-exe-path.patch
  50. 190 0
      recipes-devtools/llvm/llvm_git.bb

+ 3 - 0
recipes-devtools/clang/clang-cross-canadian_git.bbappend

@@ -0,0 +1,3 @@
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"

+ 3 - 0
recipes-devtools/clang/clang-cross_git.bbappend

@@ -0,0 +1,3 @@
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"

+ 3 - 0
recipes-devtools/clang/clang-crosssdk_git.bbappend

@@ -0,0 +1,3 @@
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"

+ 207 - 0
recipes-devtools/clang/clang/0001-Merge-B-instruction-from-0p94-to-1.0.patch

@@ -0,0 +1,207 @@
+From fb2eb2b94ec405ee159ef7615d3745aa6178bff6 Mon Sep 17 00:00:00 2001
+From: "yilun.xie" <yilun.xie@starfivetech.com>
+Date: Mon, 25 Oct 2021 17:04:21 +0800
+Subject: [PATCH 1/3] Merge B instruction from 0p94 to 1.0
+
+---
+ .arcconfig                                    |  0
+ .arclint                                      |  0
+ .clang-format                                 |  0
+ .clang-tidy                                   |  0
+ .git-blame-ignore-revs                        |  0
+ .github/lockdown.yml                          |  0
+ .github/workflows/README.md                   |  0
+ .gitignore                                    |  0
+ clang/lib/Driver/ToolChains/Arch/RISCV.cpp    | 14 ++++-------
+ .../Target/RISCV/AsmParser/RISCVAsmParser.cpp | 24 +++++++++----------
+ .../MCTargetDesc/RISCVTargetStreamer.cpp      | 24 +++++++++----------
+ llvm/lib/Target/RISCV/RISCV.td                |  8 +------
+ 12 files changed, 30 insertions(+), 40 deletions(-)
+ mode change 100644 => 100755 .arcconfig
+ mode change 100644 => 100755 .arclint
+ mode change 100644 => 100755 .clang-format
+ mode change 100644 => 100755 .clang-tidy
+ mode change 100644 => 100755 .git-blame-ignore-revs
+ mode change 100644 => 100755 .github/lockdown.yml
+ mode change 100644 => 100755 .github/workflows/README.md
+ mode change 100644 => 100755 .gitignore
+
+diff --git a/.arcconfig b/.arcconfig
+old mode 100644
+new mode 100755
+diff --git a/.arclint b/.arclint
+old mode 100644
+new mode 100755
+diff --git a/.clang-format b/.clang-format
+old mode 100644
+new mode 100755
+diff --git a/.clang-tidy b/.clang-tidy
+old mode 100644
+new mode 100755
+diff --git a/.git-blame-ignore-revs b/.git-blame-ignore-revs
+old mode 100644
+new mode 100755
+diff --git a/.github/lockdown.yml b/.github/lockdown.yml
+old mode 100644
+new mode 100755
+diff --git a/.github/workflows/README.md b/.github/workflows/README.md
+old mode 100644
+new mode 100755
+diff --git a/.gitignore b/.gitignore
+old mode 100644
+new mode 100755
+diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+index ade93d6881a7..f54ac5b166d4 100644
+--- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
++++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+@@ -59,9 +59,11 @@ static StringRef getExtensionType(StringRef Ext) {
+ static Optional<RISCVExtensionVersion>
+ isExperimentalExtension(StringRef Ext) {
+   if (Ext == "b" || Ext == "zba" || Ext == "zbb" || Ext == "zbc" ||
+-      Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" ||
+-      Ext == "zbr" || Ext == "zbs" || Ext == "zbt" || Ext == "zbproposedc")
+-    return RISCVExtensionVersion{"0", "93"};
++      Ext == "zbs")
++    return RISCVExtensionVersion{"1", "0"};
++  if (Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" ||
++      Ext == "zbr" || Ext == "zbt" || Ext == "zbproposedc")
++    return RISCVExtensionVersion{"0", "94"};
+   if (Ext == "v" || Ext == "zvamo" || Ext == "zvlsseg")
+     return RISCVExtensionVersion{"0", "10"};
+   if (Ext == "zfh")
+@@ -422,13 +424,7 @@ static bool getArchFeatures(const Driver &D, StringRef MArch,
+       Features.push_back("+experimental-zba");
+       Features.push_back("+experimental-zbb");
+       Features.push_back("+experimental-zbc");
+-      Features.push_back("+experimental-zbe");
+-      Features.push_back("+experimental-zbf");
+-      Features.push_back("+experimental-zbm");
+-      Features.push_back("+experimental-zbp");
+-      Features.push_back("+experimental-zbr");
+       Features.push_back("+experimental-zbs");
+-      Features.push_back("+experimental-zbt");
+       break;
+     case 'v':
+       Features.push_back("+experimental-v");
+diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+index ddf07b808d03..17548b7141a3 100644
+--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
++++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+@@ -2192,33 +2192,33 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
+       if (getFeatureBits(RISCV::FeatureStdExtC))
+         formalArchStr = (Twine(formalArchStr) + "_c2p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtB))
+-        formalArchStr = (Twine(formalArchStr) + "_b0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_b1p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtV))
+         formalArchStr = (Twine(formalArchStr) + "_v0p10").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZfh))
+         formalArchStr = (Twine(formalArchStr) + "_zfh0p1").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZba))
+-        formalArchStr = (Twine(formalArchStr) + "_zba0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zba1p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbb))
+-        formalArchStr = (Twine(formalArchStr) + "_zbb0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbb1p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbc))
+-        formalArchStr = (Twine(formalArchStr) + "_zbc0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbc1p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbe))
+-        formalArchStr = (Twine(formalArchStr) + "_zbe0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbe0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbf))
+-        formalArchStr = (Twine(formalArchStr) + "_zbf0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbf0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbm))
+-        formalArchStr = (Twine(formalArchStr) + "_zbm0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbm0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbp))
+-        formalArchStr = (Twine(formalArchStr) + "_zbp0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbp0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbproposedc))
+-        formalArchStr = (Twine(formalArchStr) + "_zbproposedc0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbproposedc0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbr))
+-        formalArchStr = (Twine(formalArchStr) + "_zbr0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbr0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbs))
+-        formalArchStr = (Twine(formalArchStr) + "_zbs0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbs1p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbt))
+-        formalArchStr = (Twine(formalArchStr) + "_zbt0p93").str();
++        formalArchStr = (Twine(formalArchStr) + "_zbt0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZvamo))
+         formalArchStr = (Twine(formalArchStr) + "_zvamo0p10").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZvlsseg))
+diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+index fd6e49d02c22..14b54fb83097 100644
+--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
++++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+@@ -61,33 +61,33 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) {
+   if (STI.hasFeature(RISCV::FeatureStdExtC))
+     Arch += "_c2p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtB))
+-    Arch += "_b0p93";
++    Arch += "_b1p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtV))
+     Arch += "_v0p10";
+   if (STI.hasFeature(RISCV::FeatureStdExtZfh))
+     Arch += "_zfh0p1";
+   if (STI.hasFeature(RISCV::FeatureStdExtZba))
+-    Arch += "_zba0p93";
++    Arch += "_zba1p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbb))
+-    Arch += "_zbb0p93";
++    Arch += "_zbb1p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbc))
+-    Arch += "_zbc0p93";
++    Arch += "_zbc1p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbe))
+-    Arch += "_zbe0p93";
++    Arch += "_zbe0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbf))
+-    Arch += "_zbf0p93";
++    Arch += "_zbf0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbm))
+-    Arch += "_zbm0p93";
++    Arch += "_zbm0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbp))
+-    Arch += "_zbp0p93";
++    Arch += "_zbp0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbproposedc))
+-    Arch += "_zbproposedc0p93";
++    Arch += "_zbproposedc0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbr))
+-    Arch += "_zbr0p93";
++    Arch += "_zbr0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbs))
+-    Arch += "_zbs0p93";
++    Arch += "_zbs1p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbt))
+-    Arch += "_zbt0p93";
++    Arch += "_zbt0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZvamo))
+     Arch += "_zvamo0p10";
+   if (STI.hasFeature(RISCV::FeatureStdExtZvlsseg))
+diff --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td
+index ae6c6b252d22..93f6acd53147 100644
+--- a/llvm/lib/Target/RISCV/RISCV.td
++++ b/llvm/lib/Target/RISCV/RISCV.td
+@@ -148,13 +148,7 @@ def FeatureStdExtB
+                        [FeatureStdExtZba,
+                         FeatureStdExtZbb,
+                         FeatureStdExtZbc,
+-                        FeatureStdExtZbe,
+-                        FeatureStdExtZbf,
+-                        FeatureStdExtZbm,
+-                        FeatureStdExtZbp,
+-                        FeatureStdExtZbr,
+-                        FeatureStdExtZbs,
+-                        FeatureStdExtZbt]>;
++                        FeatureStdExtZbs]>;
+ def HasStdExtB : Predicate<"Subtarget->hasStdExtB()">,
+                            AssemblerPredicate<(all_of FeatureStdExtB),
+                            "'B' (Bit Manipulation Instructions)">;
+-- 
+2.33.1
+

+ 43 - 0
recipes-devtools/clang/clang/0001-lldb-Add-lxml2-to-linker-cmdline-of-xml-is-found.patch

@@ -0,0 +1,43 @@
+From 5dacb904357c6474808aa0ee44615168d4f2da39 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 09:56:36 +0800
+Subject: [PATCH 01/34] lldb: Add -lxml2 to linker cmdline of xml is found
+
+When cross compiling for systems where static libs
+for libxml are not available cmake's detection mechanism
+resort to linking with libxml.so but doesnt use -lxml2
+liblldbHost.a however requires libxml on linker
+cmdline _after_ itself so its use of symbols from libxml2
+can be resolved. Here check for libxml2 being detected and
+add it if its found.
+
+Fixes
+
+| ../../../../lib/liblldbHost.a(XML.cpp.o): In function `lldb_private::XMLDocument::Clear()':
+| /usr/src/debug/lldb/5.0.0+gitAUTOINC+69edad7913_08d6b47db9_cf6c5b3386-r0/git/tools/lldb/source/Host/common/XML.cpp:29: undefined reference to `xmlFreeDoc'
+| /usr/src/debug/lldb/5.0.0+gitAUTOINC+69edad7913_08d6b47db9_cf6c5b3386-r0/git/tools/lldb/source/Host/common/XML.cpp:29: undefined reference to `xmlFreeDoc'
+
+Rebased to 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ lldb/source/Host/CMakeLists.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/lldb/source/Host/CMakeLists.txt b/lldb/source/Host/CMakeLists.txt
+index a018fd6c183d..936bdd461350 100644
+--- a/lldb/source/Host/CMakeLists.txt
++++ b/lldb/source/Host/CMakeLists.txt
+@@ -137,7 +137,7 @@ if (CMAKE_SYSTEM_NAME MATCHES "NetBSD")
+   list(APPEND EXTRA_LIBS kvm)
+ endif()
+ if (LLDB_ENABLE_LIBXML2)
+-  list(APPEND EXTRA_LIBS ${LIBXML2_LIBRARIES})
++  list(APPEND EXTRA_LIBS xml2)
+ endif()
+ if (HAVE_LIBDL)
+   list(APPEND EXTRA_LIBS ${CMAKE_DL_LIBS})
+-- 
+2.33.1
+

+ 63 - 0
recipes-devtools/clang/clang/0002-libcxxabi-Find-libunwind-headers-when.patch

@@ -0,0 +1,63 @@
+From 2b467f98cd2a1d6521bcebf6068412d6416c1b0d Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 09:58:40 +0800
+Subject: [PATCH 02/34] libcxxabi: Find libunwind headers when 
+ LIBCXXABI_LIBUNWIND_INCLUDES is set
+
+Currently, when LIBCXXABI_LIBUNWIND_INCLUDES is set via CMake arguments
+then it ends up not searching the specified dir and unwind.h is not found
+especially for ARM targets
+
+This patch makes the searching synthesized directories and then set
+LIBCXXABI_LIBUNWIND_INCLUDES if its there in environment
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ libcxxabi/CMakeLists.txt | 16 +++++++++++-----
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+diff --git a/libcxxabi/CMakeLists.txt b/libcxxabi/CMakeLists.txt
+index cee2aa675d9c..23c127d831f3 100644
+--- a/libcxxabi/CMakeLists.txt
++++ b/libcxxabi/CMakeLists.txt
+@@ -523,7 +523,7 @@ set(LIBCXXABI_LIBUNWIND_PATH "${LIBCXXABI_LIBUNWIND_PATH}" CACHE PATH
+ 
+ include_directories(include)
+ if (LIBCXXABI_USE_LLVM_UNWINDER OR LLVM_NATIVE_ARCH MATCHES ARM)
+-  find_path(LIBCXXABI_LIBUNWIND_INCLUDES_INTERNAL libunwind.h
++  find_path(LIBCXXABI_LIBUNWIND_INCLUDES libunwind.h
+     PATHS ${LIBCXXABI_LIBUNWIND_INCLUDES}
+           ${LIBCXXABI_LIBUNWIND_PATH}/include
+           ${CMAKE_BINARY_DIR}/${LIBCXXABI_LIBUNWIND_INCLUDES}
+@@ -534,15 +534,21 @@ if (LIBCXXABI_USE_LLVM_UNWINDER OR LLVM_NATIVE_ARCH MATCHES ARM)
+     NO_CMAKE_FIND_ROOT_PATH
+   )
+ 
+-  if (LIBCXXABI_LIBUNWIND_INCLUDES_INTERNAL STREQUAL "LIBCXXABI_LIBUNWIND_INCLUDES_INTERNAL-NOTFOUND")
+-    set(LIBCXXABI_LIBUNWIND_INCLUDES_INTERNAL "")
++  if (LIBCXXABI_LIBUNWIND_INCLUDES STREQUAL "LIBCXXABI_LIBUNWIND_INCLUDES-NOTFOUND")
++    set(LIBCXXABI_LIBUNWIND_INCLUDES "")
+   endif()
+ 
+-  if (NOT LIBCXXABI_LIBUNWIND_INCLUDES_INTERNAL STREQUAL "")
+-    include_directories("${LIBCXXABI_LIBUNWIND_INCLUDES_INTERNAL}")
++  if (NOT LIBCXXABI_LIBUNWIND_INCLUDES STREQUAL "")
++    include_directories("${LIBCXXABI_LIBUNWIND_INCLUDES}")
+   endif()
+ endif()
+ 
++set(LIBCXXABI_LIBUNWIND_INCLUDES "${LIBCXXABI_LIBUNWIND_INCLUDES}" CACHE PATH
++    "Specify path to libunwind includes." FORCE)
++set(LIBCXXABI_LIBUNWIND_PATH "${LIBCXXABI_LIBUNWIND_PATH}" CACHE PATH
++    "Specify path to libunwind source." FORCE)
++
++
+ # Add source code. This also contains all of the logic for deciding linker flags
+ # soname, etc...
+ add_subdirectory(src)
+-- 
+2.33.1
+

+ 1449 - 0
recipes-devtools/clang/clang/0002-update-B-instruction-to-1.0-and-Merge-four-Custom-CS.patch

@@ -0,0 +1,1449 @@
+From 05cd9526d2438fab6b4b671d682445aae38b5438 Mon Sep 17 00:00:00 2001
+From: "yilun.xie" <yilun.xie@starfivetech.com>
+Date: Fri, 29 Oct 2021 10:16:06 +0800
+Subject: [PATCH 2/3] update B instruction to 1.0 and Merge four Custom CSR
+ cache instruction
+
+---
+ clang/include/clang/Basic/BuiltinsRISCV.def   |  33 --
+ clang/lib/CodeGen/CGBuiltin.cpp               |  92 +---
+ clang/lib/Driver/ToolChains/Arch/RISCV.cpp    |   3 +-
+ llvm/include/llvm/IR/IntrinsicsRISCV.td       |  23 -
+ .../Target/RISCV/AsmParser/RISCVAsmParser.cpp |  30 --
+ .../MCTargetDesc/RISCVTargetStreamer.cpp      |  12 -
+ llvm/lib/Target/RISCV/RISCVISelLowering.cpp   | 323 +-----------
+ llvm/lib/Target/RISCV/RISCVInstrFormats.td    |  12 +
+ llvm/lib/Target/RISCV/RISCVInstrInfo.td       |  13 +
+ llvm/lib/Target/RISCV/RISCVInstrInfoB.td      | 473 ++----------------
+ 10 files changed, 68 insertions(+), 946 deletions(-)
+
+diff --git a/clang/include/clang/Basic/BuiltinsRISCV.def b/clang/include/clang/Basic/BuiltinsRISCV.def
+index b2b4950f92bd..583c5712e41d 100644
+--- a/clang/include/clang/Basic/BuiltinsRISCV.def
++++ b/clang/include/clang/Basic/BuiltinsRISCV.def
+@@ -26,38 +26,5 @@ TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "experimental-zbc")
+ TARGET_BUILTIN(__builtin_riscv_clmulh, "LiLiLi", "nc", "experimental-zbc")
+ TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "experimental-zbc")
+ 
+-// Zbe extension
+-TARGET_BUILTIN(__builtin_riscv_bcompress_32, "ZiZiZi", "nc", "experimental-zbe")
+-TARGET_BUILTIN(__builtin_riscv_bcompress_64, "WiWiWi", "nc",
+-               "experimental-zbe,64bit")
+-TARGET_BUILTIN(__builtin_riscv_bdecompress_32, "ZiZiZi", "nc",
+-               "experimental-zbe")
+-TARGET_BUILTIN(__builtin_riscv_bdecompress_64, "WiWiWi", "nc",
+-               "experimental-zbe,64bit")
+-
+-// Zbp extension
+-TARGET_BUILTIN(__builtin_riscv_grev_32, "ZiZiZi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_grev_64, "WiWiWi", "nc", "experimental-zbp,64bit")
+-TARGET_BUILTIN(__builtin_riscv_gorc_32, "ZiZiZi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_gorc_64, "WiWiWi", "nc", "experimental-zbp,64bit")
+-TARGET_BUILTIN(__builtin_riscv_shfl_32, "ZiZiZi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_shfl_64, "WiWiWi", "nc", "experimental-zbp,64bit")
+-TARGET_BUILTIN(__builtin_riscv_unshfl_32, "ZiZiZi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_unshfl_64, "WiWiWi", "nc", "experimental-zbp,64bit")
+-TARGET_BUILTIN(__builtin_riscv_xperm_n, "LiLiLi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_xperm_b, "LiLiLi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_xperm_h, "LiLiLi", "nc", "experimental-zbp")
+-TARGET_BUILTIN(__builtin_riscv_xperm_w, "WiWiWi", "nc", "experimental-zbp,64bit")
+-
+-// Zbr extension
+-TARGET_BUILTIN(__builtin_riscv_crc32_b, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32_h, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32_w, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32c_b, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32c_h, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32c_w, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32_d, "LiLi", "nc", "experimental-zbr")
+-TARGET_BUILTIN(__builtin_riscv_crc32c_d, "LiLi", "nc", "experimental-zbr")
+-
+ #undef BUILTIN
+ #undef TARGET_BUILTIN
+diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
+index 2a9ab387fa52..b38c8bf7d383 100644
+--- a/clang/lib/CodeGen/CGBuiltin.cpp
++++ b/clang/lib/CodeGen/CGBuiltin.cpp
+@@ -18514,31 +18514,7 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
+   case RISCV::BI__builtin_riscv_orc_b_64:
+   case RISCV::BI__builtin_riscv_clmul:
+   case RISCV::BI__builtin_riscv_clmulh:
+-  case RISCV::BI__builtin_riscv_clmulr:
+-  case RISCV::BI__builtin_riscv_bcompress_32:
+-  case RISCV::BI__builtin_riscv_bcompress_64:
+-  case RISCV::BI__builtin_riscv_bdecompress_32:
+-  case RISCV::BI__builtin_riscv_bdecompress_64:
+-  case RISCV::BI__builtin_riscv_grev_32:
+-  case RISCV::BI__builtin_riscv_grev_64:
+-  case RISCV::BI__builtin_riscv_gorc_32:
+-  case RISCV::BI__builtin_riscv_gorc_64:
+-  case RISCV::BI__builtin_riscv_shfl_32:
+-  case RISCV::BI__builtin_riscv_shfl_64:
+-  case RISCV::BI__builtin_riscv_unshfl_32:
+-  case RISCV::BI__builtin_riscv_unshfl_64:
+-  case RISCV::BI__builtin_riscv_xperm_n:
+-  case RISCV::BI__builtin_riscv_xperm_b:
+-  case RISCV::BI__builtin_riscv_xperm_h:
+-  case RISCV::BI__builtin_riscv_xperm_w:
+-  case RISCV::BI__builtin_riscv_crc32_b:
+-  case RISCV::BI__builtin_riscv_crc32_h:
+-  case RISCV::BI__builtin_riscv_crc32_w:
+-  case RISCV::BI__builtin_riscv_crc32_d:
+-  case RISCV::BI__builtin_riscv_crc32c_b:
+-  case RISCV::BI__builtin_riscv_crc32c_h:
+-  case RISCV::BI__builtin_riscv_crc32c_w:
+-  case RISCV::BI__builtin_riscv_crc32c_d: {
++  case RISCV::BI__builtin_riscv_clmulr: {
+     switch (BuiltinID) {
+     default: llvm_unreachable("unexpected builtin ID");
+     // Zbb
+@@ -18557,72 +18533,6 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
+     case RISCV::BI__builtin_riscv_clmulr:
+       ID = Intrinsic::riscv_clmulr;
+       break;
+-
+-    // Zbe
+-    case RISCV::BI__builtin_riscv_bcompress_32:
+-    case RISCV::BI__builtin_riscv_bcompress_64:
+-      ID = Intrinsic::riscv_bcompress;
+-      break;
+-    case RISCV::BI__builtin_riscv_bdecompress_32:
+-    case RISCV::BI__builtin_riscv_bdecompress_64:
+-      ID = Intrinsic::riscv_bdecompress;
+-      break;
+-
+-    // Zbp
+-    case RISCV::BI__builtin_riscv_grev_32:
+-    case RISCV::BI__builtin_riscv_grev_64:
+-      ID = Intrinsic::riscv_grev;
+-      break;
+-    case RISCV::BI__builtin_riscv_gorc_32:
+-    case RISCV::BI__builtin_riscv_gorc_64:
+-      ID = Intrinsic::riscv_gorc;
+-      break;
+-    case RISCV::BI__builtin_riscv_shfl_32:
+-    case RISCV::BI__builtin_riscv_shfl_64:
+-      ID = Intrinsic::riscv_shfl;
+-      break;
+-    case RISCV::BI__builtin_riscv_unshfl_32:
+-    case RISCV::BI__builtin_riscv_unshfl_64:
+-      ID = Intrinsic::riscv_unshfl;
+-      break;
+-    case RISCV::BI__builtin_riscv_xperm_n:
+-      ID = Intrinsic::riscv_xperm_n;
+-      break;
+-    case RISCV::BI__builtin_riscv_xperm_b:
+-      ID = Intrinsic::riscv_xperm_b;
+-      break;
+-    case RISCV::BI__builtin_riscv_xperm_h:
+-      ID = Intrinsic::riscv_xperm_h;
+-      break;
+-    case RISCV::BI__builtin_riscv_xperm_w:
+-      ID = Intrinsic::riscv_xperm_w;
+-      break;
+-
+-    // Zbr
+-    case RISCV::BI__builtin_riscv_crc32_b:
+-      ID = Intrinsic::riscv_crc32_b;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32_h:
+-      ID = Intrinsic::riscv_crc32_h;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32_w:
+-      ID = Intrinsic::riscv_crc32_w;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32_d:
+-      ID = Intrinsic::riscv_crc32_d;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32c_b:
+-      ID = Intrinsic::riscv_crc32c_b;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32c_h:
+-      ID = Intrinsic::riscv_crc32c_h;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32c_w:
+-      ID = Intrinsic::riscv_crc32c_w;
+-      break;
+-    case RISCV::BI__builtin_riscv_crc32c_d:
+-      ID = Intrinsic::riscv_crc32c_d;
+-      break;
+     }
+ 
+     IntrinsicTypes = {ResultType};
+diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+index f54ac5b166d4..e7ac0a6a0e14 100644
+--- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
++++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+@@ -61,8 +61,7 @@ isExperimentalExtension(StringRef Ext) {
+   if (Ext == "b" || Ext == "zba" || Ext == "zbb" || Ext == "zbc" ||
+       Ext == "zbs")
+     return RISCVExtensionVersion{"1", "0"};
+-  if (Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" ||
+-      Ext == "zbr" || Ext == "zbt" || Ext == "zbproposedc")
++  if (Ext == "zbproposedc")
+     return RISCVExtensionVersion{"0", "94"};
+   if (Ext == "v" || Ext == "zvamo" || Ext == "zvlsseg")
+     return RISCVExtensionVersion{"0", "10"};
+diff --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td b/llvm/include/llvm/IR/IntrinsicsRISCV.td
+index b3f82c7022a8..053f98452652 100644
+--- a/llvm/include/llvm/IR/IntrinsicsRISCV.td
++++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td
+@@ -89,29 +89,6 @@ let TargetPrefix = "riscv" in {
+   def int_riscv_clmulh : BitManipGPRGPRIntrinsics;
+   def int_riscv_clmulr : BitManipGPRGPRIntrinsics;
+ 
+-  // Zbe
+-  def int_riscv_bcompress   : BitManipGPRGPRIntrinsics;
+-  def int_riscv_bdecompress : BitManipGPRGPRIntrinsics;
+-
+-  // Zbp
+-  def int_riscv_grev  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_gorc  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_shfl  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_unshfl  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_xperm_n  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_xperm_b  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_xperm_h  : BitManipGPRGPRIntrinsics;
+-  def int_riscv_xperm_w  : BitManipGPRGPRIntrinsics;
+-
+-  // Zbr
+-  def int_riscv_crc32_b : BitManipGPRIntrinsics;
+-  def int_riscv_crc32_h : BitManipGPRIntrinsics;
+-  def int_riscv_crc32_w : BitManipGPRIntrinsics;
+-  def int_riscv_crc32_d : BitManipGPRIntrinsics;
+-  def int_riscv_crc32c_b : BitManipGPRIntrinsics;
+-  def int_riscv_crc32c_h : BitManipGPRIntrinsics;
+-  def int_riscv_crc32c_w : BitManipGPRIntrinsics;
+-  def int_riscv_crc32c_d : BitManipGPRIntrinsics;
+ } // TargetPrefix = "riscv"
+ 
+ //===----------------------------------------------------------------------===//
+diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+index 17548b7141a3..14e67bb8c6c9 100644
+--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
++++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+@@ -2078,15 +2078,9 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
+     clearFeatureBits(RISCV::FeatureStdExtZba, "experimental-zba");
+     clearFeatureBits(RISCV::FeatureStdExtZbb, "experimental-zbb");
+     clearFeatureBits(RISCV::FeatureStdExtZbc, "experimental-zbc");
+-    clearFeatureBits(RISCV::FeatureStdExtZbe, "experimental-zbe");
+-    clearFeatureBits(RISCV::FeatureStdExtZbf, "experimental-zbf");
+-    clearFeatureBits(RISCV::FeatureStdExtZbm, "experimental-zbm");
+-    clearFeatureBits(RISCV::FeatureStdExtZbp, "experimental-zbp");
+     clearFeatureBits(RISCV::FeatureStdExtZbproposedc,
+                      "experimental-zbproposedc");
+-    clearFeatureBits(RISCV::FeatureStdExtZbr, "experimental-zbr");
+     clearFeatureBits(RISCV::FeatureStdExtZbs, "experimental-zbs");
+-    clearFeatureBits(RISCV::FeatureStdExtZbt, "experimental-zbt");
+     clearFeatureBits(RISCV::FeatureStdExtZvamo, "experimental-zvamo");
+     clearFeatureBits(RISCV::FeatureStdExtZvlsseg, "experimental-zvlsseg");
+ 
+@@ -2126,23 +2120,11 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
+           setFeatureBits(RISCV::FeatureStdExtZbb, "experimental-zbb");
+         else if (Ext == "zbc")
+           setFeatureBits(RISCV::FeatureStdExtZbc, "experimental-zbc");
+-        else if (Ext == "zbe")
+-          setFeatureBits(RISCV::FeatureStdExtZbe, "experimental-zbe");
+-        else if (Ext == "zbf")
+-          setFeatureBits(RISCV::FeatureStdExtZbf, "experimental-zbf");
+-        else if (Ext == "zbm")
+-          setFeatureBits(RISCV::FeatureStdExtZbm, "experimental-zbm");
+-        else if (Ext == "zbp")
+-          setFeatureBits(RISCV::FeatureStdExtZbp, "experimental-zbp");
+         else if (Ext == "zbproposedc")
+           setFeatureBits(RISCV::FeatureStdExtZbproposedc,
+                          "experimental-zbproposedc");
+-        else if (Ext == "zbr")
+-          setFeatureBits(RISCV::FeatureStdExtZbr, "experimental-zbr");
+         else if (Ext == "zbs")
+           setFeatureBits(RISCV::FeatureStdExtZbs, "experimental-zbs");
+-        else if (Ext == "zbt")
+-          setFeatureBits(RISCV::FeatureStdExtZbt, "experimental-zbt");
+         else if (Ext == "zfh")
+           setFeatureBits(RISCV::FeatureStdExtZfh, "experimental-zfh");
+         else if (Ext == "zvamo")
+@@ -2203,22 +2185,10 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
+         formalArchStr = (Twine(formalArchStr) + "_zbb1p0").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbc))
+         formalArchStr = (Twine(formalArchStr) + "_zbc1p0").str();
+-      if (getFeatureBits(RISCV::FeatureStdExtZbe))
+-        formalArchStr = (Twine(formalArchStr) + "_zbe0p94").str();
+-      if (getFeatureBits(RISCV::FeatureStdExtZbf))
+-        formalArchStr = (Twine(formalArchStr) + "_zbf0p94").str();
+-      if (getFeatureBits(RISCV::FeatureStdExtZbm))
+-        formalArchStr = (Twine(formalArchStr) + "_zbm0p94").str();
+-      if (getFeatureBits(RISCV::FeatureStdExtZbp))
+-        formalArchStr = (Twine(formalArchStr) + "_zbp0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbproposedc))
+         formalArchStr = (Twine(formalArchStr) + "_zbproposedc0p94").str();
+-      if (getFeatureBits(RISCV::FeatureStdExtZbr))
+-        formalArchStr = (Twine(formalArchStr) + "_zbr0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZbs))
+         formalArchStr = (Twine(formalArchStr) + "_zbs1p0").str();
+-      if (getFeatureBits(RISCV::FeatureStdExtZbt))
+-        formalArchStr = (Twine(formalArchStr) + "_zbt0p94").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZvamo))
+         formalArchStr = (Twine(formalArchStr) + "_zvamo0p10").str();
+       if (getFeatureBits(RISCV::FeatureStdExtZvlsseg))
+diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+index 14b54fb83097..043fb2b8c962 100644
+--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
++++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+@@ -72,22 +72,10 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) {
+     Arch += "_zbb1p0";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbc))
+     Arch += "_zbc1p0";
+-  if (STI.hasFeature(RISCV::FeatureStdExtZbe))
+-    Arch += "_zbe0p94";
+-  if (STI.hasFeature(RISCV::FeatureStdExtZbf))
+-    Arch += "_zbf0p94";
+-  if (STI.hasFeature(RISCV::FeatureStdExtZbm))
+-    Arch += "_zbm0p94";
+-  if (STI.hasFeature(RISCV::FeatureStdExtZbp))
+-    Arch += "_zbp0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbproposedc))
+     Arch += "_zbproposedc0p94";
+-  if (STI.hasFeature(RISCV::FeatureStdExtZbr))
+-    Arch += "_zbr0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZbs))
+     Arch += "_zbs1p0";
+-  if (STI.hasFeature(RISCV::FeatureStdExtZbt))
+-    Arch += "_zbt0p94";
+   if (STI.hasFeature(RISCV::FeatureStdExtZvamo))
+     Arch += "_zvamo0p10";
+   if (STI.hasFeature(RISCV::FeatureStdExtZvlsseg))
+diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+index 005f653975dd..55b592ecec58 100644
+--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
++++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+@@ -245,7 +245,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
+   setOperationAction(ISD::SRL_PARTS, XLenVT, Custom);
+   setOperationAction(ISD::SRA_PARTS, XLenVT, Custom);
+ 
+-  if (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtZbp()) {
++  if (Subtarget.hasStdExtZbb()) {
+     if (Subtarget.is64Bit()) {
+       setOperationAction(ISD::ROTL, MVT::i32, Custom);
+       setOperationAction(ISD::ROTR, MVT::i32, Custom);
+@@ -255,26 +255,10 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
+     setOperationAction(ISD::ROTR, XLenVT, Expand);
+   }
+ 
+-  if (Subtarget.hasStdExtZbp()) {
+-    // Custom lower bswap/bitreverse so we can convert them to GREVI to enable
+-    // more combining.
+-    setOperationAction(ISD::BITREVERSE, XLenVT,   Custom);
+-    setOperationAction(ISD::BSWAP,      XLenVT,   Custom);
+-    setOperationAction(ISD::BITREVERSE, MVT::i8,  Custom);
+-    // BSWAP i8 doesn't exist.
+-    setOperationAction(ISD::BITREVERSE, MVT::i16, Custom);
+-    setOperationAction(ISD::BSWAP,      MVT::i16, Custom);
+-
+-    if (Subtarget.is64Bit()) {
+-      setOperationAction(ISD::BITREVERSE, MVT::i32, Custom);
+-      setOperationAction(ISD::BSWAP,      MVT::i32, Custom);
+-    }
+-  } else {
+-    // With Zbb we have an XLen rev8 instruction, but not GREVI. So we'll
+-    // pattern match it directly in isel.
+-    setOperationAction(ISD::BSWAP, XLenVT,
+-                       Subtarget.hasStdExtZbb() ? Legal : Expand);
+-  }
++  // With Zbb we have an XLen rev8 instruction, but not GREVI. So we'll
++   // pattern match it directly in isel.
++  setOperationAction(ISD::BSWAP, XLenVT,
++                      Subtarget.hasStdExtZbb() ? Legal : Expand);
+ 
+   if (Subtarget.hasStdExtZbb()) {
+     setOperationAction(ISD::SMIN, XLenVT, Legal);
+@@ -294,18 +278,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
+     setOperationAction(ISD::CTPOP, XLenVT, Expand);
+   }
+ 
+-  if (Subtarget.hasStdExtZbt()) {
+-    setOperationAction(ISD::FSHL, XLenVT, Custom);
+-    setOperationAction(ISD::FSHR, XLenVT, Custom);
+-    setOperationAction(ISD::SELECT, XLenVT, Legal);
+-
+-    if (Subtarget.is64Bit()) {
+-      setOperationAction(ISD::FSHL, MVT::i32, Custom);
+-      setOperationAction(ISD::FSHR, MVT::i32, Custom);
+-    }
+-  } else {
+-    setOperationAction(ISD::SELECT, XLenVT, Custom);
+-  }
++  setOperationAction(ISD::SELECT, XLenVT, Custom);
++  
+ 
+   static const ISD::CondCode FPCCToExpand[] = {
+       ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
+@@ -2416,20 +2390,6 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
+     return LowerINTRINSIC_W_CHAIN(Op, DAG);
+   case ISD::INTRINSIC_VOID:
+     return LowerINTRINSIC_VOID(Op, DAG);
+-  case ISD::BSWAP:
+-  case ISD::BITREVERSE: {
+-    // Convert BSWAP/BITREVERSE to GREVI to enable GREVI combinining.
+-    assert(Subtarget.hasStdExtZbp() && "Unexpected custom legalisation");
+-    MVT VT = Op.getSimpleValueType();
+-    SDLoc DL(Op);
+-    // Start with the maximum immediate value which is the bitwidth - 1.
+-    unsigned Imm = VT.getSizeInBits() - 1;
+-    // If this is BSWAP rather than BITREVERSE, clear the lower 3 bits.
+-    if (Op.getOpcode() == ISD::BSWAP)
+-      Imm &= ~0x7U;
+-    return DAG.getNode(RISCVISD::GREV, DL, VT, Op.getOperand(0),
+-                       DAG.getConstant(Imm, DL, VT));
+-  }
+   case ISD::FSHL:
+   case ISD::FSHR: {
+     MVT VT = Op.getSimpleValueType();
+@@ -3841,24 +3801,6 @@ SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
+     // Lower to the GORCI encoding for orc.b.
+     return DAG.getNode(RISCVISD::GORC, DL, XLenVT, Op.getOperand(1),
+                        DAG.getConstant(7, DL, XLenVT));
+-  case Intrinsic::riscv_grev:
+-  case Intrinsic::riscv_gorc: {
+-    unsigned Opc =
+-        IntNo == Intrinsic::riscv_grev ? RISCVISD::GREV : RISCVISD::GORC;
+-    return DAG.getNode(Opc, DL, XLenVT, Op.getOperand(1), Op.getOperand(2));
+-  }
+-  case Intrinsic::riscv_shfl:
+-  case Intrinsic::riscv_unshfl: {
+-    unsigned Opc =
+-        IntNo == Intrinsic::riscv_shfl ? RISCVISD::SHFL : RISCVISD::UNSHFL;
+-    return DAG.getNode(Opc, DL, XLenVT, Op.getOperand(1), Op.getOperand(2));
+-  }
+-  case Intrinsic::riscv_bcompress:
+-  case Intrinsic::riscv_bdecompress: {
+-    unsigned Opc = IntNo == Intrinsic::riscv_bcompress ? RISCVISD::BCOMPRESS
+-                                                       : RISCVISD::BDECOMPRESS;
+-    return DAG.getNode(Opc, DL, XLenVT, Op.getOperand(1), Op.getOperand(2));
+-  }
+   case Intrinsic::riscv_vmv_x_s:
+     assert(Op.getValueType() == XLenVT && "Unexpected VT!");
+     return DAG.getNode(RISCVISD::VMV_X_S, DL, Op.getValueType(),
+@@ -5712,26 +5654,6 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
+     Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, NewRes));
+     break;
+   }
+-  case ISD::BSWAP:
+-  case ISD::BITREVERSE: {
+-    MVT VT = N->getSimpleValueType(0);
+-    MVT XLenVT = Subtarget.getXLenVT();
+-    assert((VT == MVT::i8 || VT == MVT::i16 ||
+-            (VT == MVT::i32 && Subtarget.is64Bit())) &&
+-           Subtarget.hasStdExtZbp() && "Unexpected custom legalisation");
+-    SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, XLenVT, N->getOperand(0));
+-    unsigned Imm = VT.getSizeInBits() - 1;
+-    // If this is BSWAP rather than BITREVERSE, clear the lower 3 bits.
+-    if (N->getOpcode() == ISD::BSWAP)
+-      Imm &= ~0x7U;
+-    unsigned Opc = Subtarget.is64Bit() ? RISCVISD::GREVW : RISCVISD::GREV;
+-    SDValue GREVI =
+-        DAG.getNode(Opc, DL, XLenVT, NewOp0, DAG.getConstant(Imm, DL, XLenVT));
+-    // ReplaceNodeResults requires we maintain the same type for the return
+-    // value.
+-    Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, GREVI));
+-    break;
+-  }
+   case ISD::FSHL:
+   case ISD::FSHR: {
+     assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
+@@ -5816,67 +5738,6 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
+     default:
+       llvm_unreachable(
+           "Don't know how to custom type legalize this intrinsic!");
+-    case Intrinsic::riscv_orc_b: {
+-      // Lower to the GORCI encoding for orc.b with the operand extended.
+-      SDValue NewOp =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
+-      // If Zbp is enabled, use GORCIW which will sign extend the result.
+-      unsigned Opc =
+-          Subtarget.hasStdExtZbp() ? RISCVISD::GORCW : RISCVISD::GORC;
+-      SDValue Res = DAG.getNode(Opc, DL, MVT::i64, NewOp,
+-                                DAG.getConstant(7, DL, MVT::i64));
+-      Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Res));
+-      return;
+-    }
+-    case Intrinsic::riscv_grev:
+-    case Intrinsic::riscv_gorc: {
+-      assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
+-             "Unexpected custom legalisation");
+-      SDValue NewOp1 =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
+-      SDValue NewOp2 =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(2));
+-      unsigned Opc =
+-          IntNo == Intrinsic::riscv_grev ? RISCVISD::GREVW : RISCVISD::GORCW;
+-      SDValue Res = DAG.getNode(Opc, DL, MVT::i64, NewOp1, NewOp2);
+-      Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Res));
+-      break;
+-    }
+-    case Intrinsic::riscv_shfl:
+-    case Intrinsic::riscv_unshfl: {
+-      assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
+-             "Unexpected custom legalisation");
+-      SDValue NewOp1 =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
+-      SDValue NewOp2 =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(2));
+-      unsigned Opc =
+-          IntNo == Intrinsic::riscv_shfl ? RISCVISD::SHFLW : RISCVISD::UNSHFLW;
+-      if (isa<ConstantSDNode>(N->getOperand(2))) {
+-        NewOp2 = DAG.getNode(ISD::AND, DL, MVT::i64, NewOp2,
+-                             DAG.getConstant(0xf, DL, MVT::i64));
+-        Opc =
+-            IntNo == Intrinsic::riscv_shfl ? RISCVISD::SHFL : RISCVISD::UNSHFL;
+-      }
+-      SDValue Res = DAG.getNode(Opc, DL, MVT::i64, NewOp1, NewOp2);
+-      Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Res));
+-      break;
+-    }
+-    case Intrinsic::riscv_bcompress:
+-    case Intrinsic::riscv_bdecompress: {
+-      assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
+-             "Unexpected custom legalisation");
+-      SDValue NewOp1 =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
+-      SDValue NewOp2 =
+-          DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(2));
+-      unsigned Opc = IntNo == Intrinsic::riscv_bcompress
+-                         ? RISCVISD::BCOMPRESSW
+-                         : RISCVISD::BDECOMPRESSW;
+-      SDValue Res = DAG.getNode(Opc, DL, MVT::i64, NewOp1, NewOp2);
+-      Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Res));
+-      break;
+-    }
+     case Intrinsic::riscv_vmv_x_s: {
+       EVT VT = N->getValueType(0);
+       MVT XLenVT = Subtarget.getXLenVT();
+@@ -6060,91 +5921,6 @@ static Optional<RISCVBitmanipPat> matchGREVIPat(SDValue Op) {
+   return matchRISCVBitmanipPat(Op, BitmanipMasks);
+ }
+ 
+-// Match the following pattern as a GREVI(W) operation
+-//   (or (BITMANIP_SHL x), (BITMANIP_SRL x))
+-static SDValue combineORToGREV(SDValue Op, SelectionDAG &DAG,
+-                               const RISCVSubtarget &Subtarget) {
+-  assert(Subtarget.hasStdExtZbp() && "Expected Zbp extenson");
+-  EVT VT = Op.getValueType();
+-
+-  if (VT == Subtarget.getXLenVT() || (Subtarget.is64Bit() && VT == MVT::i32)) {
+-    auto LHS = matchGREVIPat(Op.getOperand(0));
+-    auto RHS = matchGREVIPat(Op.getOperand(1));
+-    if (LHS && RHS && LHS->formsPairWith(*RHS)) {
+-      SDLoc DL(Op);
+-      return DAG.getNode(RISCVISD::GREV, DL, VT, LHS->Op,
+-                         DAG.getConstant(LHS->ShAmt, DL, VT));
+-    }
+-  }
+-  return SDValue();
+-}
+-
+-// Matches any the following pattern as a GORCI(W) operation
+-// 1.  (or (GREVI x, shamt), x) if shamt is a power of 2
+-// 2.  (or x, (GREVI x, shamt)) if shamt is a power of 2
+-// 3.  (or (or (BITMANIP_SHL x), x), (BITMANIP_SRL x))
+-// Note that with the variant of 3.,
+-//     (or (or (BITMANIP_SHL x), (BITMANIP_SRL x)), x)
+-// the inner pattern will first be matched as GREVI and then the outer
+-// pattern will be matched to GORC via the first rule above.
+-// 4.  (or (rotl/rotr x, bitwidth/2), x)
+-static SDValue combineORToGORC(SDValue Op, SelectionDAG &DAG,
+-                               const RISCVSubtarget &Subtarget) {
+-  assert(Subtarget.hasStdExtZbp() && "Expected Zbp extenson");
+-  EVT VT = Op.getValueType();
+-
+-  if (VT == Subtarget.getXLenVT() || (Subtarget.is64Bit() && VT == MVT::i32)) {
+-    SDLoc DL(Op);
+-    SDValue Op0 = Op.getOperand(0);
+-    SDValue Op1 = Op.getOperand(1);
+-
+-    auto MatchOROfReverse = [&](SDValue Reverse, SDValue X) {
+-      if (Reverse.getOpcode() == RISCVISD::GREV && Reverse.getOperand(0) == X &&
+-          isa<ConstantSDNode>(Reverse.getOperand(1)) &&
+-          isPowerOf2_32(Reverse.getConstantOperandVal(1)))
+-        return DAG.getNode(RISCVISD::GORC, DL, VT, X, Reverse.getOperand(1));
+-      // We can also form GORCI from ROTL/ROTR by half the bitwidth.
+-      if ((Reverse.getOpcode() == ISD::ROTL ||
+-           Reverse.getOpcode() == ISD::ROTR) &&
+-          Reverse.getOperand(0) == X &&
+-          isa<ConstantSDNode>(Reverse.getOperand(1))) {
+-        uint64_t RotAmt = Reverse.getConstantOperandVal(1);
+-        if (RotAmt == (VT.getSizeInBits() / 2))
+-          return DAG.getNode(RISCVISD::GORC, DL, VT, X,
+-                             DAG.getConstant(RotAmt, DL, VT));
+-      }
+-      return SDValue();
+-    };
+-
+-    // Check for either commutable permutation of (or (GREVI x, shamt), x)
+-    if (SDValue V = MatchOROfReverse(Op0, Op1))
+-      return V;
+-    if (SDValue V = MatchOROfReverse(Op1, Op0))
+-      return V;
+-
+-    // OR is commutable so canonicalize its OR operand to the left
+-    if (Op0.getOpcode() != ISD::OR && Op1.getOpcode() == ISD::OR)
+-      std::swap(Op0, Op1);
+-    if (Op0.getOpcode() != ISD::OR)
+-      return SDValue();
+-    SDValue OrOp0 = Op0.getOperand(0);
+-    SDValue OrOp1 = Op0.getOperand(1);
+-    auto LHS = matchGREVIPat(OrOp0);
+-    // OR is commutable so swap the operands and try again: x might have been
+-    // on the left
+-    if (!LHS) {
+-      std::swap(OrOp0, OrOp1);
+-      LHS = matchGREVIPat(OrOp0);
+-    }
+-    auto RHS = matchGREVIPat(Op1);
+-    if (LHS && RHS && LHS->formsPairWith(*RHS) && LHS->Op == OrOp1) {
+-      return DAG.getNode(RISCVISD::GORC, DL, VT, LHS->Op,
+-                         DAG.getConstant(LHS->ShAmt, DL, VT));
+-    }
+-  }
+-  return SDValue();
+-}
+-
+ // Matches any of the following bit-manipulation patterns:
+ //   (and (shl x, 1), (0x22222222 << 1))
+ //   (and (srl x, 1), 0x22222222)
+@@ -6166,80 +5942,6 @@ static Optional<RISCVBitmanipPat> matchSHFLPat(SDValue Op) {
+   return matchRISCVBitmanipPat(Op, BitmanipMasks);
+ }
+ 
+-// Match (or (or (SHFL_SHL x), (SHFL_SHR x)), (SHFL_AND x)
+-static SDValue combineORToSHFL(SDValue Op, SelectionDAG &DAG,
+-                               const RISCVSubtarget &Subtarget) {
+-  assert(Subtarget.hasStdExtZbp() && "Expected Zbp extenson");
+-  EVT VT = Op.getValueType();
+-
+-  if (VT != MVT::i32 && VT != Subtarget.getXLenVT())
+-    return SDValue();
+-
+-  SDValue Op0 = Op.getOperand(0);
+-  SDValue Op1 = Op.getOperand(1);
+-
+-  // Or is commutable so canonicalize the second OR to the LHS.
+-  if (Op0.getOpcode() != ISD::OR)
+-    std::swap(Op0, Op1);
+-  if (Op0.getOpcode() != ISD::OR)
+-    return SDValue();
+-
+-  // We found an inner OR, so our operands are the operands of the inner OR
+-  // and the other operand of the outer OR.
+-  SDValue A = Op0.getOperand(0);
+-  SDValue B = Op0.getOperand(1);
+-  SDValue C = Op1;
+-
+-  auto Match1 = matchSHFLPat(A);
+-  auto Match2 = matchSHFLPat(B);
+-
+-  // If neither matched, we failed.
+-  if (!Match1 && !Match2)
+-    return SDValue();
+-
+-  // We had at least one match. if one failed, try the remaining C operand.
+-  if (!Match1) {
+-    std::swap(A, C);
+-    Match1 = matchSHFLPat(A);
+-    if (!Match1)
+-      return SDValue();
+-  } else if (!Match2) {
+-    std::swap(B, C);
+-    Match2 = matchSHFLPat(B);
+-    if (!Match2)
+-      return SDValue();
+-  }
+-  assert(Match1 && Match2);
+-
+-  // Make sure our matches pair up.
+-  if (!Match1->formsPairWith(*Match2))
+-    return SDValue();
+-
+-  // All the remains is to make sure C is an AND with the same input, that masks
+-  // out the bits that are being shuffled.
+-  if (C.getOpcode() != ISD::AND || !isa<ConstantSDNode>(C.getOperand(1)) ||
+-      C.getOperand(0) != Match1->Op)
+-    return SDValue();
+-
+-  uint64_t Mask = C.getConstantOperandVal(1);
+-
+-  static const uint64_t BitmanipMasks[] = {
+-      0x9999999999999999ULL, 0xC3C3C3C3C3C3C3C3ULL, 0xF00FF00FF00FF00FULL,
+-      0xFF0000FFFF0000FFULL, 0xFFFF00000000FFFFULL,
+-  };
+-
+-  unsigned Width = Op.getValueType() == MVT::i64 ? 64 : 32;
+-  unsigned MaskIdx = Log2_32(Match1->ShAmt);
+-  uint64_t ExpMask = BitmanipMasks[MaskIdx] & maskTrailingOnes<uint64_t>(Width);
+-
+-  if (Mask != ExpMask)
+-    return SDValue();
+-
+-  SDLoc DL(Op);
+-  return DAG.getNode(RISCVISD::SHFL, DL, VT, Match1->Op,
+-                     DAG.getConstant(Match1->ShAmt, DL, VT));
+-}
+-
+ // Optimize (add (shl x, c0), (shl y, c1)) ->
+ //          (SLLI (SH*ADD x, y), c0), if c1-c0 equals to [1|2|3].
+ static SDValue transformAddShlImm(SDNode *N, SelectionDAG &DAG,
+@@ -6465,15 +6167,6 @@ static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG) {
+ 
+ static SDValue performORCombine(SDNode *N, SelectionDAG &DAG,
+                                 const RISCVSubtarget &Subtarget) {
+-  if (Subtarget.hasStdExtZbp()) {
+-    if (auto GREV = combineORToGREV(SDValue(N, 0), DAG, Subtarget))
+-      return GREV;
+-    if (auto GORC = combineORToGORC(SDValue(N, 0), DAG, Subtarget))
+-      return GORC;
+-    if (auto SHFL = combineORToSHFL(SDValue(N, 0), DAG, Subtarget))
+-      return SHFL;
+-  }
+-
+   // fold (or (select cond, 0, y), x) ->
+   //      (select cond, x, (or x, y))
+   return combineSelectAndUseCommutative(N, DAG, /*AllOnes*/ false);
+@@ -7159,7 +6852,7 @@ bool RISCVTargetLowering::targetShrinkDemandedConstant(
+     return false;
+ 
+   // Preserve (and X, 0xffff) when zext.h is supported.
+-  if (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtZbp()) {
++  if (Subtarget.hasStdExtZbb()) {
+     APInt NewMask = APInt(Mask.getBitWidth(), 0xffff);
+     if (IsLegalMask(NewMask))
+       return UseMask(NewMask);
+diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormats.td b/llvm/lib/Target/RISCV/RISCVInstrFormats.td
+index a6e2710949b2..d82e414a3f98 100644
+--- a/llvm/lib/Target/RISCV/RISCVInstrFormats.td
++++ b/llvm/lib/Target/RISCV/RISCVInstrFormats.td
+@@ -322,6 +322,18 @@ class RVInstI<bits<3> funct3, RISCVOpcode opcode, dag outs, dag ins,
+   let Opcode = opcode.Value;
+ }
+ 
++class RVInstCache<bits<12> cache, RISCVOpcode opcode, dag outs, dag ins,
++                   string opcodestr, string argstr>
++    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
++  bits<5> rs1;
++
++  let Inst{31-20} = cache;
++  let Inst{19-15} = rs1;
++  let Inst{14-12} = 0;
++  let Inst{11-7} = 0;
++  let Opcode = opcode.Value;
++}
++
+ class RVInstIShift<bits<5> imm11_7, bits<3> funct3, RISCVOpcode opcode,
+                    dag outs, dag ins, string opcodestr, string argstr>
+     : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
+diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+index 575df86d27a8..ea009dc98101 100644
+--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td
++++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+@@ -446,6 +446,12 @@ class CSR_ir<bits<3> funct3, string opcodestr>
+     : RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), (ins csr_sysreg:$imm12, GPR:$rs1),
+               opcodestr, "$rd, $imm12, $rs1">, Sched<[WriteCSR, ReadCSR]>;
+ 
++let hasNoSchedulingInfo = 1,
++    hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
++class CSR_cache<bits<12> cache, string opcodestr>
++    : RVInstCache<cache, OPC_SYSTEM, (outs), (ins GPR:$rs1),
++              opcodestr, "$rs1">, Sched<[WriteCSR, ReadCSR]>;
++
+ let hasNoSchedulingInfo = 1,
+     hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
+ class CSR_ii<bits<3> funct3, string opcodestr>
+@@ -588,6 +594,13 @@ def UNIMP : RVInstI<0b001, OPC_SYSTEM, (outs), (ins), "unimp", "">,
+ }
+ } // hasSideEffects = 1, mayLoad = 0, mayStore = 0
+ 
++/* Custom instruction and CSRs */
++def CFLUSH_D_L1   : CSR_cache<0b111111000000, "cflush.d.l1">;
++def CDISCARD_D_L1 : CSR_cache<0b111111000010, "cdiscard.d.l1">;
++def CFLUSH_D_L2   : CSR_cache<0b111111000100, "cflush.d.l2">;
++def CDISCARD_D_L2 : CSR_cache<0b111111000110, "cdiscard.d.l2">;
++/* End */
++
+ def CSRRW : CSR_ir<0b001, "csrrw">;
+ def CSRRS : CSR_ir<0b010, "csrrs">;
+ def CSRRC : CSR_ir<0b011, "csrrc">;
+diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+index d2e77ae86a83..7f4985ab4940 100644
+--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
++++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+@@ -299,14 +299,14 @@ class RVBTernaryImm5<bits<2> funct2, bits<3> funct3, RISCVOpcode opcode,
+ // Instructions
+ //===----------------------------------------------------------------------===//
+ 
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ def ANDN  : ALU_rr<0b0100000, 0b111, "andn">,
+             Sched<[WriteIALU, ReadIALU, ReadIALU]>;
+ def ORN   : ALU_rr<0b0100000, 0b110, "orn">,
+             Sched<[WriteIALU, ReadIALU, ReadIALU]>;
+ def XNOR  : ALU_rr<0b0100000, 0b100, "xnor">,
+             Sched<[WriteIALU, ReadIALU, ReadIALU]>;
+-} // Predicates = [HasStdExtZbbOrZbp]
++} // Predicates = [HasStdExtZbb]
+ 
+ let Predicates = [HasStdExtZba] in {
+ def SH1ADD : ALU_rr<0b0010000, 0b010, "sh1add">,
+@@ -317,12 +317,12 @@ def SH3ADD : ALU_rr<0b0010000, 0b110, "sh3add">,
+              Sched<[WriteSHXADD, ReadSHXADD, ReadSHXADD]>;
+ } // Predicates = [HasStdExtZba]
+ 
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ def ROL   : ALU_rr<0b0110000, 0b001, "rol">,
+             Sched<[WriteRotateReg, ReadRotateReg, ReadRotateReg]>;
+ def ROR   : ALU_rr<0b0110000, 0b101, "ror">,
+             Sched<[WriteRotateReg, ReadRotateReg, ReadRotateReg]>;
+-} // Predicates = [HasStdExtZbbOrZbp]
++} // Predicates = [HasStdExtZbb]
+ 
+ let Predicates = [HasStdExtZbs] in {
+ def BCLR : ALU_rr<0b0100100, 0b001, "bclr">, Sched<[]>;
+@@ -331,18 +331,7 @@ def BINV : ALU_rr<0b0110100, 0b001, "binv">, Sched<[]>;
+ def BEXT : ALU_rr<0b0100100, 0b101, "bext">, Sched<[]>;
+ } // Predicates = [HasStdExtZbs]
+ 
+-let Predicates = [HasStdExtZbp] in {
+-def GORC : ALU_rr<0b0010100, 0b101, "gorc">, Sched<[]>;
+-def GREV : ALU_rr<0b0110100, 0b101, "grev">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbp] in {
+-def XPERMN : ALU_rr<0b0010100, 0b010, "xperm.n">, Sched<[]>;
+-def XPERMB : ALU_rr<0b0010100, 0b100, "xperm.b">, Sched<[]>;
+-def XPERMH : ALU_rr<0b0010100, 0b110, "xperm.h">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbbOrZbp] in
++let Predicates = [HasStdExtZbb] in
+ def RORI  : RVBShift_ri<0b01100, 0b101, OPC_OP_IMM, "rori">,
+             Sched<[WriteRotateImm, ReadRotateImm]>;
+ 
+@@ -353,24 +342,6 @@ def BINVI : RVBShift_ri<0b01101, 0b001, OPC_OP_IMM, "binvi">, Sched<[]>;
+ def BEXTI : RVBShift_ri<0b01001, 0b101, OPC_OP_IMM, "bexti">, Sched<[]>;
+ } // Predicates = [HasStdExtZbs]
+ 
+-let Predicates = [HasStdExtZbp] in {
+-def GREVI : RVBShift_ri<0b01101, 0b101, OPC_OP_IMM, "grevi">, Sched<[]>;
+-def GORCI : RVBShift_ri<0b00101, 0b101, OPC_OP_IMM, "gorci">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbt] in {
+-def CMIX : RVBTernaryR<0b11, 0b001, OPC_OP, "cmix", "$rd, $rs2, $rs1, $rs3">,
+-           Sched<[]>;
+-def CMOV : RVBTernaryR<0b11, 0b101, OPC_OP, "cmov", "$rd, $rs2, $rs1, $rs3">,
+-           Sched<[]>;
+-def FSL  : RVBTernaryR<0b10, 0b001, OPC_OP, "fsl", "$rd, $rs1, $rs3, $rs2">,
+-           Sched<[]>;
+-def FSR  : RVBTernaryR<0b10, 0b101, OPC_OP, "fsr", "$rd, $rs1, $rs3, $rs2">,
+-           Sched<[]>;
+-def FSRI : RVBTernaryImm6<0b101, OPC_OP_IMM, "fsri",
+-                          "$rd, $rs1, $rs3, $shamt">, Sched<[]>;
+-} // Predicates = [HasStdExtZbt]
+-
+ let Predicates = [HasStdExtZbb] in {
+ def CLZ  : RVBUnary<0b0110000, 0b00000, 0b001, RISCVOpcode<0b0010011>, "clz">,
+            Sched<[WriteCLZ, ReadCLZ]>;
+@@ -380,10 +351,6 @@ def CPOP : RVBUnary<0b0110000, 0b00010, 0b001, RISCVOpcode<0b0010011>, "cpop">,
+            Sched<[WriteCPOP, ReadCPOP]>;
+ } // Predicates = [HasStdExtZbb]
+ 
+-let Predicates = [HasStdExtZbm, IsRV64] in
+-def BMATFLIP : RVBUnary<0b0110000, 0b00011, 0b001, RISCVOpcode<0b0010011>,
+-                        "bmatflip">, Sched<[]>;
+-
+ let Predicates = [HasStdExtZbb] in {
+ def SEXTB : RVBUnary<0b0110000, 0b00100, 0b001, RISCVOpcode<0b0010011>,
+                      "sext.b">, Sched<[WriteIALU, ReadIALU]>;
+@@ -391,32 +358,6 @@ def SEXTH : RVBUnary<0b0110000, 0b00101, 0b001, RISCVOpcode<0b0010011>,
+                      "sext.h">, Sched<[WriteIALU, ReadIALU]>;
+ } // Predicates = [HasStdExtZbb]
+ 
+-let Predicates = [HasStdExtZbr] in {
+-def CRC32B : RVBUnary<0b0110000, 0b10000, 0b001, RISCVOpcode<0b0010011>,
+-                      "crc32.b">, Sched<[]>;
+-def CRC32H : RVBUnary<0b0110000, 0b10001, 0b001, RISCVOpcode<0b0010011>,
+-                      "crc32.h">, Sched<[]>;
+-def CRC32W : RVBUnary<0b0110000, 0b10010, 0b001, RISCVOpcode<0b0010011>,
+-                      "crc32.w">, Sched<[]>;
+-} // Predicates = [HasStdExtZbr]
+-
+-let Predicates = [HasStdExtZbr, IsRV64] in
+-def CRC32D  : RVBUnary<0b0110000, 0b10011, 0b001, RISCVOpcode<0b0010011>,
+-                       "crc32.d">, Sched<[]>;
+-
+-let Predicates = [HasStdExtZbr] in {
+-def CRC32CB : RVBUnary<0b0110000, 0b11000, 0b001, RISCVOpcode<0b0010011>,
+-                       "crc32c.b">, Sched<[]>;
+-def CRC32CH : RVBUnary<0b0110000, 0b11001, 0b001, RISCVOpcode<0b0010011>,
+-                       "crc32c.h">, Sched<[]>;
+-def CRC32CW : RVBUnary<0b0110000, 0b11010, 0b001, RISCVOpcode<0b0010011>,
+-                       "crc32c.w">, Sched<[]>;
+-} // Predicates = [HasStdExtZbr]
+-
+-let Predicates = [HasStdExtZbr, IsRV64] in
+-def CRC32CD : RVBUnary<0b0110000, 0b11011, 0b001, RISCVOpcode<0b0010011>,
+-                       "crc32c.d">, Sched<[]>;
+-
+ let Predicates = [HasStdExtZbc] in {
+ def CLMUL  : ALU_rr<0b0000101, 0b001, "clmul">, Sched<[]>;
+ def CLMULR : ALU_rr<0b0000101, 0b010, "clmulr">, Sched<[]>;
+@@ -434,37 +375,6 @@ def MAXU : ALU_rr<0b0000101, 0b111, "maxu">,
+            Sched<[WriteIALU, ReadIALU, ReadIALU]>;
+ } // Predicates = [HasStdExtZbb]
+ 
+-let Predicates = [HasStdExtZbp] in {
+-def SHFL   : ALU_rr<0b0000100, 0b001, "shfl">, Sched<[]>;
+-def UNSHFL : ALU_rr<0b0000100, 0b101, "unshfl">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbe] in {
+-// NOTE: These mnemonics are from the 0.94 spec. There is a name conflict with
+-// bext in the 0.93 spec.
+-def BDECOMPRESS : ALU_rr<0b0100100, 0b110, "bdecompress">, Sched<[]>;
+-def BCOMPRESS   : ALU_rr<0b0000100, 0b110, "bcompress">, Sched<[]>;
+-} // Predicates = [HasStdExtZbe]
+-
+-let Predicates = [HasStdExtZbp] in {
+-def PACK  : ALU_rr<0b0000100, 0b100, "pack">, Sched<[]>;
+-def PACKU : ALU_rr<0b0100100, 0b100, "packu">, Sched<[]>;
+-def PACKH : ALU_rr<0b0000100, 0b111, "packh">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbm, IsRV64] in {
+-def BMATOR   : ALU_rr<0b0000100, 0b011, "bmator">, Sched<[]>;
+-def BMATXOR  : ALU_rr<0b0100100, 0b011, "bmatxor">, Sched<[]>;
+-} // Predicates = [HasStdExtZbm, IsRV64]
+-
+-let Predicates = [HasStdExtZbf] in
+-def BFP : ALU_rr<0b0100100, 0b111, "bfp">, Sched<[]>;
+-
+-let Predicates = [HasStdExtZbp] in {
+-def SHFLI   : RVBShfl_ri<0b0000100, 0b001, OPC_OP_IMM, "shfli">, Sched<[]>;
+-def UNSHFLI : RVBShfl_ri<0b0000100, 0b101, OPC_OP_IMM, "unshfli">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp]
+-
+ let Predicates = [HasStdExtZba, IsRV64] in {
+ def SLLIUW : RVBShift_ri<0b00001, 0b001, OPC_OP_IMM_32, "slli.uw">,
+              Sched<[WriteShiftImm32, ReadShiftImm32]>;
+@@ -476,14 +386,14 @@ def SH2ADDUW : ALUW_rr<0b0010000, 0b100, "sh2add.uw">,
+                Sched<[WriteSHXADD32, ReadSHXADD32, ReadSHXADD32]>;
+ def SH3ADDUW : ALUW_rr<0b0010000, 0b110, "sh3add.uw">,
+                Sched<[WriteSHXADD32, ReadSHXADD32, ReadSHXADD32]>;
+-} // Predicates = [HasStdExtZbb, IsRV64]
++} // Predicates = [HasStdExtZba, IsRV64]
+ 
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
++let Predicates = [HasStdExtZbb, IsRV64] in {
+ def ROLW  : ALUW_rr<0b0110000, 0b001, "rolw">,
+             Sched<[WriteRotateReg32, ReadRotateReg32, ReadRotateReg32]>;
+ def RORW  : ALUW_rr<0b0110000, 0b101, "rorw">,
+             Sched<[WriteRotateReg32, ReadRotateReg32, ReadRotateReg32]>;
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV64]
++} // Predicates = [HasStdExtZbb, IsRV64]
+ 
+ let Predicates = [HasStdExtZbs, IsRV64] in {
+ // NOTE: These instructions have been removed from the 0.94 spec. As a result
+@@ -494,16 +404,7 @@ def BINVW : ALUW_rr<0b0110100, 0b001, "binvw">, Sched<[]>;
+ def BEXTW : ALUW_rr<0b0100100, 0b101, "bextw">, Sched<[]>;
+ } // Predicates = [HasStdExtZbs, IsRV64]
+ 
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def GORCW  : ALUW_rr<0b0010100, 0b101, "gorcw">, Sched<[]>;
+-def GREVW  : ALUW_rr<0b0110100, 0b101, "grevw">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def XPERMW : ALU_rr<0b0010100, 0b000, "xperm.w">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in
++let Predicates = [HasStdExtZbb, IsRV64] in
+ def RORIW : RVBShiftW_ri<0b0110000, 0b101, OPC_OP_IMM_32, "roriw">,
+             Sched<[WriteRotateImm32, ReadRotateImm32]>;
+ 
+@@ -518,20 +419,6 @@ def BINVIW : RVBShiftW_ri<0b0110100, 0b001, OPC_OP_IMM_32, "binviw">,
+               Sched<[]>;
+ } // Predicates = [HasStdExtZbs, IsRV64]
+ 
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def GORCIW : RVBShiftW_ri<0b0010100, 0b101, OPC_OP_IMM_32, "gorciw">, Sched<[]>;
+-def GREVIW : RVBShiftW_ri<0b0110100, 0b101, OPC_OP_IMM_32, "greviw">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbt, IsRV64] in {
+-def FSLW  : RVBTernaryR<0b10, 0b001, OPC_OP_32,
+-                        "fslw", "$rd, $rs1, $rs3, $rs2">, Sched<[]>;
+-def FSRW  : RVBTernaryR<0b10, 0b101, OPC_OP_32, "fsrw",
+-                        "$rd, $rs1, $rs3, $rs2">, Sched<[]>;
+-def FSRIW : RVBTernaryImm5<0b10, 0b101, OPC_OP_IMM_32,
+-                           "fsriw", "$rd, $rs1, $rs3, $shamt">, Sched<[]>;
+-} // Predicates = [HasStdExtZbt, IsRV64]
+-
+ let Predicates = [HasStdExtZbb, IsRV64] in {
+ def CLZW   : RVBUnary<0b0110000, 0b00000, 0b001, RISCVOpcode<0b0011011>,
+                       "clzw">, Sched<[WriteCLZ32, ReadCLZ32]>;
+@@ -541,43 +428,23 @@ def CPOPW  : RVBUnary<0b0110000, 0b00010, 0b001, RISCVOpcode<0b0011011>,
+                       "cpopw">, Sched<[WriteCPOP32, ReadCPOP32]>;
+ } // Predicates = [HasStdExtZbb, IsRV64]
+ 
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def SHFLW   : ALUW_rr<0b0000100, 0b001, "shflw">, Sched<[]>;
+-def UNSHFLW : ALUW_rr<0b0000100, 0b101, "unshflw">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbe, IsRV64] in {
+-// NOTE: These mnemonics are from the 0.94 spec. There is a name conflict with
+-// bextw in the 0.93 spec.
+-def BDECOMPRESSW : ALUW_rr<0b0100100, 0b110, "bdecompressw">, Sched<[]>;
+-def BCOMPRESSW   : ALUW_rr<0b0000100, 0b110, "bcompressw">, Sched<[]>;
+-} // Predicates = [HasStdExtZbe, IsRV64]
+-
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def PACKW  : ALUW_rr<0b0000100, 0b100, "packw">, Sched<[]>;
+-def PACKUW : ALUW_rr<0b0100100, 0b100, "packuw">, Sched<[]>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbf, IsRV64] in
+-def BFPW : ALUW_rr<0b0100100, 0b111, "bfpw">, Sched<[]>;
+-
+-let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {
++let Predicates = [HasStdExtZbb, IsRV32] in {
+ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+ def ZEXTH_RV32 : RVInstR<0b0000100, 0b100, OPC_OP, (outs GPR:$rd),
+                          (ins GPR:$rs1), "zext.h", "$rd, $rs1">,
+                  Sched<[WriteIALU, ReadIALU]> {
+   let rs2 = 0b00000;
+ }
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV32]
++} // Predicates = [HasStdExtZbb, IsRV32]
+ 
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
++let Predicates = [HasStdExtZbb, IsRV64] in {
+ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+ def ZEXTH_RV64 : RVInstR<0b0000100, 0b100, OPC_OP_32, (outs GPR:$rd),
+                          (ins GPR:$rs1), "zext.h", "$rd, $rs1">,
+                  Sched<[WriteIALU, ReadIALU]> {
+   let rs2 = 0b00000;
+ }
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV64]
++} // Predicates = [HasStdExtZbb, IsRV64]
+ 
+ // We treat rev8 and orc.b as standalone instructions even though they use a
+ // portion of the encodings for grevi and gorci. This allows us to support only
+@@ -586,29 +453,29 @@ def ZEXTH_RV64 : RVInstR<0b0000100, 0b100, OPC_OP_32, (outs GPR:$rd),
+ // causes diagnostics to suggest that Zbp rather than Zbb is required for rev8
+ // or gorci. Since Zbb is closer to being finalized than Zbp this will be
+ // misleading to users.
+-let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {
++let Predicates = [HasStdExtZbb, IsRV32] in {
+ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+ def REV8_RV32 : RVInstI<0b101, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1),
+                         "rev8", "$rd, $rs1">, Sched<[WriteREV8, ReadREV8]> {
+   let imm12 = { 0b01101, 0b0011000 };
+ }
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV32]
++} // Predicates = [HasStdExtZbb, IsRV32]
+ 
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
++let Predicates = [HasStdExtZbb, IsRV64] in {
+ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+ def REV8_RV64 : RVInstI<0b101, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1),
+                         "rev8", "$rd, $rs1">, Sched<[WriteREV8, ReadREV8]> {
+   let imm12 = { 0b01101, 0b0111000 };
+ }
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV64]
++} // Predicates = [HasStdExtZbb, IsRV64]
+ 
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+ def ORCB : RVInstI<0b101, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1),
+                    "orc.b", "$rd, $rs1">, Sched<[WriteORCB, ReadORCB]> {
+   let imm12 = { 0b00101, 0b0000111 };
+ }
+-} // Predicates = [HasStdExtZbbOrZbp]
++} // Predicates = [HasStdExtZbb]
+ 
+ //===----------------------------------------------------------------------===//
+ // Future compressed instructions
+@@ -651,138 +518,15 @@ let Predicates = [HasStdExtZba, IsRV64] in {
+ def : InstAlias<"zext.w $rd, $rs", (ADDUW GPR:$rd, GPR:$rs, X0)>;
+ }
+ 
+-let Predicates = [HasStdExtZbp] in {
+-def : InstAlias<"rev.p $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b00001)>;
+-def : InstAlias<"rev2.n $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b00010)>;
+-def : InstAlias<"rev.n $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b00011)>;
+-def : InstAlias<"rev4.b $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b00100)>;
+-def : InstAlias<"rev2.b $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b00110)>;
+-def : InstAlias<"rev.b $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b00111)>;
+-def : InstAlias<"rev8.h $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b01000)>;
+-def : InstAlias<"rev4.h $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b01100)>;
+-def : InstAlias<"rev2.h $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b01110)>;
+-def : InstAlias<"rev.h $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b01111)>;
+-
+-def : InstAlias<"zip.n $rd, $rs",    (SHFLI   GPR:$rd, GPR:$rs, 0b0001)>;
+-def : InstAlias<"unzip.n $rd, $rs",  (UNSHFLI GPR:$rd, GPR:$rs, 0b0001)>;
+-def : InstAlias<"zip2.b $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b0010)>;
+-def : InstAlias<"unzip2.b $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b0010)>;
+-def : InstAlias<"zip.b $rd, $rs",    (SHFLI   GPR:$rd, GPR:$rs, 0b0011)>;
+-def : InstAlias<"unzip.b $rd, $rs",  (UNSHFLI GPR:$rd, GPR:$rs, 0b0011)>;
+-def : InstAlias<"zip4.h $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b0100)>;
+-def : InstAlias<"unzip4.h $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b0100)>;
+-def : InstAlias<"zip2.h $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b0110)>;
+-def : InstAlias<"unzip2.h $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b0110)>;
+-def : InstAlias<"zip.h $rd, $rs",    (SHFLI   GPR:$rd, GPR:$rs, 0b0111)>;
+-def : InstAlias<"unzip.h $rd, $rs",  (UNSHFLI GPR:$rd, GPR:$rs, 0b0111)>;
+-
+-def : InstAlias<"orc.p $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b00001)>;
+-def : InstAlias<"orc2.n $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b00010)>;
+-def : InstAlias<"orc.n $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b00011)>;
+-def : InstAlias<"orc4.b $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b00100)>;
+-def : InstAlias<"orc2.b $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b00110)>;
+-// orc.b is considered an instruction rather than an alias.
+-def : InstAlias<"orc8.h $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b01000)>;
+-def : InstAlias<"orc4.h $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b01100)>;
+-def : InstAlias<"orc2.h $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b01110)>;
+-def : InstAlias<"orc.h $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b01111)>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbp, IsRV32] in {
+-def : InstAlias<"rev16 $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b10000)>;
+-// rev8 is considered an instruction rather than an alias.
+-def : InstAlias<"rev4 $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b11100)>;
+-def : InstAlias<"rev2 $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b11110)>;
+-def : InstAlias<"rev $rd, $rs",   (GREVI GPR:$rd, GPR:$rs, 0b11111)>;
+-
+-def : InstAlias<"zip8 $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b1000)>;
+-def : InstAlias<"unzip8 $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b1000)>;
+-def : InstAlias<"zip4 $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b1100)>;
+-def : InstAlias<"unzip4 $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b1100)>;
+-def : InstAlias<"zip2 $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b1110)>;
+-def : InstAlias<"unzip2 $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b1110)>;
+-def : InstAlias<"zip $rd, $rs",    (SHFLI   GPR:$rd, GPR:$rs, 0b1111)>;
+-def : InstAlias<"unzip $rd, $rs",  (UNSHFLI GPR:$rd, GPR:$rs, 0b1111)>;
+-
+-def : InstAlias<"orc16 $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b10000)>;
+-def : InstAlias<"orc8 $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b11000)>;
+-def : InstAlias<"orc4 $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b11100)>;
+-def : InstAlias<"orc2 $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b11110)>;
+-def : InstAlias<"orc $rd, $rs",   (GORCI GPR:$rd, GPR:$rs, 0b11111)>;
+-} // Predicates = [HasStdExtZbp, IsRV32]
+-
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def : InstAlias<"rev16.w $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b010000)>;
+-def : InstAlias<"rev8.w $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b011000)>;
+-def : InstAlias<"rev4.w $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b011100)>;
+-def : InstAlias<"rev2.w $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b011110)>;
+-def : InstAlias<"rev.w $rd, $rs",   (GREVI GPR:$rd, GPR:$rs, 0b011111)>;
+-def : InstAlias<"rev32 $rd, $rs",   (GREVI GPR:$rd, GPR:$rs, 0b100000)>;
+-def : InstAlias<"rev16 $rd, $rs",   (GREVI GPR:$rd, GPR:$rs, 0b110000)>;
+-// rev8 is considered an instruction rather than an alias.
+-def : InstAlias<"rev4 $rd, $rs",    (GREVI GPR:$rd, GPR:$rs, 0b111100)>;
+-def : InstAlias<"rev2 $rd, $rs",    (GREVI GPR:$rd, GPR:$rs, 0b111110)>;
+-def : InstAlias<"rev $rd, $rs",     (GREVI GPR:$rd, GPR:$rs, 0b111111)>;
+-
+-def : InstAlias<"zip8.w $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b01000)>;
+-def : InstAlias<"unzip8.w $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b01000)>;
+-def : InstAlias<"zip4.w $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b01100)>;
+-def : InstAlias<"unzip4.w $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b01100)>;
+-def : InstAlias<"zip2.w $rd, $rs",   (SHFLI   GPR:$rd, GPR:$rs, 0b01110)>;
+-def : InstAlias<"unzip2.w $rd, $rs", (UNSHFLI GPR:$rd, GPR:$rs, 0b01110)>;
+-def : InstAlias<"zip.w $rd, $rs",    (SHFLI   GPR:$rd, GPR:$rs, 0b01111)>;
+-def : InstAlias<"unzip.w $rd, $rs",  (UNSHFLI GPR:$rd, GPR:$rs, 0b01111)>;
+-def : InstAlias<"zip16 $rd, $rs",    (SHFLI   GPR:$rd, GPR:$rs, 0b10000)>;
+-def : InstAlias<"unzip16 $rd, $rs",  (UNSHFLI GPR:$rd, GPR:$rs, 0b10000)>;
+-def : InstAlias<"zip8 $rd, $rs",     (SHFLI   GPR:$rd, GPR:$rs, 0b11000)>;
+-def : InstAlias<"unzip8 $rd, $rs",   (UNSHFLI GPR:$rd, GPR:$rs, 0b11000)>;
+-def : InstAlias<"zip4 $rd, $rs",     (SHFLI   GPR:$rd, GPR:$rs, 0b11100)>;
+-def : InstAlias<"unzip4 $rd, $rs",   (UNSHFLI GPR:$rd, GPR:$rs, 0b11100)>;
+-def : InstAlias<"zip2 $rd, $rs",     (SHFLI   GPR:$rd, GPR:$rs, 0b11110)>;
+-def : InstAlias<"unzip2 $rd, $rs",   (UNSHFLI GPR:$rd, GPR:$rs, 0b11110)>;
+-def : InstAlias<"zip $rd, $rs",      (SHFLI   GPR:$rd, GPR:$rs, 0b11111)>;
+-def : InstAlias<"unzip $rd, $rs",    (UNSHFLI GPR:$rd, GPR:$rs, 0b11111)>;
+-
+-def : InstAlias<"orc16.w $rd, $rs", (GORCI GPR:$rd, GPR:$rs, 0b010000)>;
+-def : InstAlias<"orc8.w $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b011000)>;
+-def : InstAlias<"orc4.w $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b011100)>;
+-def : InstAlias<"orc2.w $rd, $rs",  (GORCI GPR:$rd, GPR:$rs, 0b011110)>;
+-def : InstAlias<"orc.w $rd, $rs",   (GORCI GPR:$rd, GPR:$rs, 0b011111)>;
+-def : InstAlias<"orc32 $rd, $rs",   (GORCI GPR:$rd, GPR:$rs, 0b100000)>;
+-def : InstAlias<"orc16 $rd, $rs",   (GORCI GPR:$rd, GPR:$rs, 0b110000)>;
+-def : InstAlias<"orc8 $rd, $rs",    (GORCI GPR:$rd, GPR:$rs, 0b111000)>;
+-def : InstAlias<"orc4 $rd, $rs",    (GORCI GPR:$rd, GPR:$rs, 0b111100)>;
+-def : InstAlias<"orc2 $rd, $rs",    (GORCI GPR:$rd, GPR:$rs, 0b111110)>;
+-def : InstAlias<"orc $rd, $rs",     (GORCI GPR:$rd, GPR:$rs, 0b111111)>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ def : InstAlias<"ror $rd, $rs1, $shamt",
+                 (RORI  GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+-} // Predicates = [HasStdExtZbbOrZbp]
++} // Predicates = [HasStdExtZbb]
+ 
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
++let Predicates = [HasStdExtZbb, IsRV64] in {
+ def : InstAlias<"rorw $rd, $rs1, $shamt",
+                 (RORIW  GPR:$rd, GPR:$rs1, uimm5:$shamt), 0>;
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbp] in {
+-def : InstAlias<"grev $rd, $rs1, $shamt",
+-                (GREVI  GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+-def : InstAlias<"gorc $rd, $rs1, $shamt",
+-                (GORCI  GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
+-def : InstAlias<"shfl $rd, $rs1, $shamt",
+-                (SHFLI  GPR:$rd, GPR:$rs1, shfl_uimm:$shamt), 0>;
+-def : InstAlias<"unshfl $rd, $rs1, $shamt",
+-                (UNSHFLI  GPR:$rd, GPR:$rs1, shfl_uimm:$shamt), 0>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def : InstAlias<"grevw $rd, $rs1, $shamt",
+-                (GREVIW  GPR:$rd, GPR:$rs1, uimm5:$shamt), 0>;
+-def : InstAlias<"gorcw $rd, $rs1, $shamt",
+-                (GORCIW  GPR:$rd, GPR:$rs1, uimm5:$shamt), 0>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
++} // Predicates = [HasStdExtZbb, IsRV64]
+ 
+ let Predicates = [HasStdExtZbs] in {
+ def : InstAlias<"bset $rd, $rs1, $shamt",
+@@ -814,16 +558,16 @@ def : CompressPat<(ADDUW GPRC:$rs1, GPRC:$rs1, X0),
+ // Codegen patterns
+ //===----------------------------------------------------------------------===//
+ 
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ def : Pat<(and GPR:$rs1, (not GPR:$rs2)), (ANDN GPR:$rs1, GPR:$rs2)>;
+ def : Pat<(or  GPR:$rs1, (not GPR:$rs2)), (ORN  GPR:$rs1, GPR:$rs2)>;
+ def : Pat<(xor GPR:$rs1, (not GPR:$rs2)), (XNOR GPR:$rs1, GPR:$rs2)>;
+-} // Predicates = [HasStdExtZbbOrZbp]
++} // Predicates = [HasStdExtZbb]
+ 
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ def : PatGprGpr<rotl, ROL>;
+ def : PatGprGpr<rotr, ROR>;
+-} // Predicates = [HasStdExtZbbOrZbp]
++} // Predicates = [HasStdExtZbb]
+ 
+ let Predicates = [HasStdExtZbs] in {
+ def : Pat<(and (not (shiftop<shl> 1, GPR:$rs2)), GPR:$rs1),
+@@ -871,7 +615,7 @@ def : Pat<(and GPR:$r, BCLRIANDIMask:$i),
+ 
+ // There's no encoding for roli in the the 'B' extension as it can be
+ // implemented with rori by negating the immediate.
+-let Predicates = [HasStdExtZbbOrZbp] in {
++let Predicates = [HasStdExtZbb] in {
+ def : PatGprImm<rotr, RORI, uimmlog2xlen>;
+ def : Pat<(rotl GPR:$rs1, uimmlog2xlen:$shamt),
+           (RORI GPR:$rs1, (ImmSubFromXLen uimmlog2xlen:$shamt))>;
+@@ -881,80 +625,6 @@ def : Pat<(rotl GPR:$rs1, uimmlog2xlen:$shamt),
+ def : Pat<(riscv_gorc GPR:$rs1, 7), (ORCB GPR:$rs1)>;
+ }
+ 
+-let Predicates = [HasStdExtZbp] in {
+-def : PatGprGpr<riscv_grev, GREV>;
+-def : PatGprGpr<riscv_gorc, GORC>;
+-def : PatGprGpr<riscv_shfl, SHFL>;
+-def : PatGprGpr<riscv_unshfl, UNSHFL>;
+-def : PatGprGpr<int_riscv_xperm_n, XPERMN>;
+-def : PatGprGpr<int_riscv_xperm_b, XPERMB>;
+-def : PatGprGpr<int_riscv_xperm_h, XPERMH>;
+-def : PatGprGpr<int_riscv_xperm_w, XPERMW>;
+-def : PatGprImm<riscv_shfl, SHFLI, shfl_uimm>;
+-def : PatGprImm<riscv_unshfl, UNSHFLI, shfl_uimm>;
+-def : PatGprImm<riscv_grev, GREVI, uimmlog2xlen>;
+-def : PatGprImm<riscv_gorc, GORCI, uimmlog2xlen>;
+-} // Predicates = [HasStdExtZbp]
+-
+-let Predicates = [HasStdExtZbp, IsRV32] in {
+-def : Pat<(i32 (rotr (riscv_grev GPR:$rs1, 24), (i32 16))), (GREVI GPR:$rs1, 8)>;
+-def : Pat<(i32 (rotl (riscv_grev GPR:$rs1, 24), (i32 16))), (GREVI GPR:$rs1, 8)>;
+-
+-// We treat rev8 as a separate instruction, so match it directly.
+-def : Pat<(i32 (riscv_grev GPR:$rs1, 24)), (REV8_RV32 GPR:$rs1)>;
+-} // Predicates = [HasStdExtZbp, IsRV32]
+-
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-// We treat rev8 as a separate instruction, so match it directly.
+-def : Pat<(i64 (riscv_grev GPR:$rs1, 56)), (REV8_RV64 GPR:$rs1)>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbt] in {
+-def : Pat<(or (and (not GPR:$rs2), GPR:$rs3), (and GPR:$rs2, GPR:$rs1)),
+-          (CMIX GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-
+-def : Pat<(select (XLenVT (setne GPR:$rs2, 0)), GPR:$rs1, GPR:$rs3),
+-          (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-def : Pat<(select (XLenVT (seteq GPR:$rs2, 0)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-def : Pat<(select (XLenVT (setne GPR:$x, simm12_plus1:$y)), GPR:$rs1, GPR:$rs3),
+-          (CMOV GPR:$rs1, (ADDI GPR:$x, (NegImm simm12_plus1:$y)), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (seteq GPR:$x, simm12_plus1:$y)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, (ADDI GPR:$x, (NegImm simm12_plus1:$y)), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (setne GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
+-          (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (seteq GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (setuge GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (setule GPR:$y, GPR:$x)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (setge GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
+-def : Pat<(select (XLenVT (setle GPR:$y, GPR:$x)), GPR:$rs3, GPR:$rs1),
+-          (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
+-def : Pat<(select GPR:$rs2, GPR:$rs1, GPR:$rs3),
+-          (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-} // Predicates = [HasStdExtZbt]
+-
+-// fshl and fshr concatenate their operands in the same order. fsr and fsl
+-// instruction use different orders. fshl will return its first operand for
+-// shift of zero, fshr will return its second operand. fsl and fsr both return
+-// $rs1 so the patterns need to have different operand orders.
+-let Predicates = [HasStdExtZbt] in {
+-def : Pat<(riscv_fsl GPR:$rs1, GPR:$rs3, GPR:$rs2),
+-          (FSL GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-def : Pat<(riscv_fsr GPR:$rs3, GPR:$rs1, GPR:$rs2),
+-          (FSR GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-
+-def : Pat<(fshr GPR:$rs3, GPR:$rs1, uimmlog2xlen:$shamt),
+-          (FSRI GPR:$rs1, GPR:$rs3, uimmlog2xlen:$shamt)>;
+-// We can use FSRI for fshl by immediate if we subtract the immediate from
+-// XLen and swap the operands.
+-def : Pat<(fshl GPR:$rs3, GPR:$rs1, uimmlog2xlen:$shamt),
+-          (FSRI GPR:$rs1, GPR:$rs3, (ImmSubFromXLen uimmlog2xlen:$shamt))>;
+-} // Predicates = [HasStdExtZbt]
+-
+ let Predicates = [HasStdExtZbb] in {
+ def : PatGpr<ctlz, CLZ>;
+ def : PatGpr<cttz, CTZ>;
+@@ -981,27 +651,9 @@ let Predicates = [HasStdExtZbb, IsRV64] in {
+ def : Pat<(i64 (bswap GPR:$rs1)), (REV8_RV64 GPR:$rs1)>;
+ } // Predicates = [HasStdExtZbb, IsRV64]
+ 
+-let Predicates = [HasStdExtZbp, IsRV32] in {
+-def : Pat<(i32 (or (and GPR:$rs1, 0x0000FFFF), (shl GPR:$rs2, (i32 16)))),
+-          (PACK GPR:$rs1, GPR:$rs2)>;
+-def : Pat<(i32 (or (and GPR:$rs2, 0xFFFF0000), (srl GPR:$rs1, (i32 16)))),
+-          (PACKU GPR:$rs1, GPR:$rs2)>;
+-
+-}
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def : Pat<(i64 (or (and GPR:$rs1, 0x00000000FFFFFFFF), (shl GPR:$rs2, (i64 32)))),
+-          (PACK GPR:$rs1, GPR:$rs2)>;
+-def : Pat<(i64 (or (and GPR:$rs2, 0xFFFFFFFF00000000), (srl GPR:$rs1, (i64 32)))),
+-          (PACKU GPR:$rs1, GPR:$rs2)>;
+-}
+-let Predicates = [HasStdExtZbp] in
+-def : Pat<(or (and (shl GPR:$rs2, (XLenVT 8)), 0xFFFF),
+-              (and GPR:$rs1, 0x00FF)),
+-          (PACKH GPR:$rs1, GPR:$rs2)>;
+-
+-let Predicates = [HasStdExtZbbOrZbp, IsRV32] in
++let Predicates = [HasStdExtZbb, IsRV32] in
+ def : Pat<(i32 (and GPR:$rs, 0xFFFF)), (ZEXTH_RV32 GPR:$rs)>;
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in
++let Predicates = [HasStdExtZbb, IsRV64] in
+ def : Pat<(i64 (and GPR:$rs, 0xFFFF)), (ZEXTH_RV64 GPR:$rs)>;
+ 
+ // Pattern to exclude simm12 immediates from matching.
+@@ -1100,35 +752,13 @@ def : Pat<(i64 (add (and (shl GPR:$rs1, (i64 3)), 0x7FFFFFFFF), non_imm12:$rs2))
+           (SH3ADDUW GPR:$rs1, GPR:$rs2)>;
+ } // Predicates = [HasStdExtZba, IsRV64]
+ 
+-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
++let Predicates = [HasStdExtZbb, IsRV64] in {
+ def : PatGprGpr<riscv_rolw, ROLW>;
+ def : PatGprGpr<riscv_rorw, RORW>;
+ def : PatGprImm<riscv_rorw, RORIW, uimm5>;
+ def : Pat<(riscv_rolw GPR:$rs1, uimm5:$rs2),
+           (RORIW GPR:$rs1, (ImmSubFrom32 uimm5:$rs2))>;
+-} // Predicates = [HasStdExtZbbOrZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def : Pat<(riscv_rorw (riscv_grevw GPR:$rs1, 24), 16), (GREVIW GPR:$rs1, 8)>;
+-def : Pat<(riscv_rolw (riscv_grevw GPR:$rs1, 24), 16), (GREVIW GPR:$rs1, 8)>;
+-def : PatGprGpr<riscv_grevw, GREVW>;
+-def : PatGprGpr<riscv_gorcw, GORCW>;
+-def : PatGprGpr<riscv_shflw, SHFLW>;
+-def : PatGprGpr<riscv_unshflw, UNSHFLW>;
+-def : PatGprImm<riscv_grevw, GREVIW, uimm5>;
+-def : PatGprImm<riscv_gorcw, GORCIW, uimm5>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+-let Predicates = [HasStdExtZbt, IsRV64] in {
+-def : Pat<(riscv_fslw GPR:$rs1, GPR:$rs3, GPR:$rs2),
+-          (FSLW GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-def : Pat<(riscv_fsrw GPR:$rs3, GPR:$rs1, GPR:$rs2),
+-          (FSRW GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+-def : Pat<(riscv_fsrw GPR:$rs3, GPR:$rs1, uimm5:$shamt),
+-          (FSRIW GPR:$rs1, GPR:$rs3, uimm5:$shamt)>;
+-def : Pat<(riscv_fslw GPR:$rs3, GPR:$rs1, uimm5:$shamt),
+-          (FSRIW GPR:$rs1, GPR:$rs3, (ImmSubFrom32 uimm5:$shamt))>;
+-} // Predicates = [HasStdExtZbt, IsRV64]
++} // Predicates = [HasStdExtZbb, IsRV64]
+ 
+ let Predicates = [HasStdExtZbb, IsRV64] in {
+ def : PatGpr<riscv_clzw, CLZW>;
+@@ -1136,45 +766,8 @@ def : PatGpr<riscv_ctzw, CTZW>;
+ def : Pat<(i64 (ctpop (i64 (zexti32 (i64 GPR:$rs1))))), (CPOPW GPR:$rs1)>;
+ } // Predicates = [HasStdExtZbb, IsRV64]
+ 
+-let Predicates = [HasStdExtZbp, IsRV64] in {
+-def : Pat<(i64 (sext_inreg (or (shl GPR:$rs2, (i64 16)),
+-                               (and GPR:$rs1, 0x000000000000FFFF)),
+-                           i32)),
+-          (PACKW GPR:$rs1, GPR:$rs2)>;
+-def : Pat<(i64 (or (sext_inreg (shl GPR:$rs2, (i64 16)), i32),
+-                   (and GPR:$rs1, 0x000000000000FFFF))),
+-          (PACKW GPR:$rs1, GPR:$rs2)>;
+-def : Pat<(i64 (or (and (assertsexti32 GPR:$rs2), 0xFFFFFFFFFFFF0000),
+-                   (srl (and GPR:$rs1, 0xFFFFFFFF), (i64 16)))),
+-          (PACKUW GPR:$rs1, GPR:$rs2)>;
+-} // Predicates = [HasStdExtZbp, IsRV64]
+-
+ let Predicates = [HasStdExtZbc] in {
+ def : PatGprGpr<int_riscv_clmul, CLMUL>;
+ def : PatGprGpr<int_riscv_clmulh, CLMULH>;
+ def : PatGprGpr<int_riscv_clmulr, CLMULR>;
+-} // Predicates = [HasStdExtZbc]
+-
+-let Predicates = [HasStdExtZbe] in {
+-def : PatGprGpr<riscv_bcompress, BCOMPRESS>;
+-def : PatGprGpr<riscv_bdecompress, BDECOMPRESS>;
+-} // Predicates = [HasStdExtZbe]
+-
+-let Predicates = [HasStdExtZbe, IsRV64] in {
+-def : PatGprGpr<riscv_bcompressw, BCOMPRESSW>;
+-def : PatGprGpr<riscv_bdecompressw, BDECOMPRESSW>;
+-} // Predicates = [HasStdExtZbe, IsRV64]
+-
+-let Predicates = [HasStdExtZbr] in {
+-def : PatGpr<int_riscv_crc32_b, CRC32B>;
+-def : PatGpr<int_riscv_crc32_h, CRC32H>;
+-def : PatGpr<int_riscv_crc32_w, CRC32W>;
+-def : PatGpr<int_riscv_crc32c_b, CRC32CB>;
+-def : PatGpr<int_riscv_crc32c_h, CRC32CH>;
+-def : PatGpr<int_riscv_crc32c_w, CRC32CW>;
+-} // Predicates = [HasStdExtZbr]
+-
+-let Predicates = [HasStdExtZbr, IsRV64] in {
+-def : PatGpr<int_riscv_crc32_d, CRC32D>;
+-def : PatGpr<int_riscv_crc32c_d, CRC32CD>;
+-} // Predicates = [HasStdExtZbr, IsRV64]
++} // Predicates = [HasStdExtZbc]
+\ No newline at end of file
+-- 
+2.33.1
+

+ 154 - 0
recipes-devtools/clang/clang/0003-add-pref-instruction.patch

@@ -0,0 +1,154 @@
+From 3339a8b15327d7d7bafdf08aad66056fa9ab36b3 Mon Sep 17 00:00:00 2001
+From: "max.ma" <max.ma@starfivetech.com>
+Date: Sun, 7 Nov 2021 23:01:41 -0800
+Subject: [PATCH 3/3] add pref instruction
+
+---
+ .../Target/RISCV/AsmParser/RISCVAsmParser.cpp | 18 ++++++++++++
+ .../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |  2 ++
+ llvm/lib/Target/RISCV/RISCVInstrFormats.td    | 16 +++++++++++
+ llvm/lib/Target/RISCV/RISCVInstrInfo.td       | 28 +++++++++++++++++++
+ 4 files changed, 64 insertions(+)
+
+diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+index 14e67bb8c6c9..a9861d7913cb 100644
+--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
++++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+@@ -523,6 +523,15 @@ public:
+     return IsConstantImm && isUInt<3>(Imm) && VK == RISCVMCExpr::VK_RISCV_None;
+   }
+ 
++  bool isUImm4() const {
++    int64_t Imm;
++    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
++    if (!isImm())
++      return false;
++    bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
++    return IsConstantImm && isUInt<4>(Imm) && VK == RISCVMCExpr::VK_RISCV_None;
++  }
++
+   bool isUImm5() const {
+     int64_t Imm;
+     RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
+@@ -569,6 +578,15 @@ public:
+            VK == RISCVMCExpr::VK_RISCV_None;
+   }
+ 
++  bool isSImm8() const {
++    if (!isImm())
++      return false;
++    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
++    int64_t Imm;
++    bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
++    return IsConstantImm && isInt<8>(Imm) && VK == RISCVMCExpr::VK_RISCV_None;
++  }
++
+   bool isCLUIImm() const {
+     if (!isImm())
+       return false;
+diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+index ed85e6fa3f24..b4cb7634b7af 100644
+--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
++++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+@@ -171,9 +171,11 @@ enum OperandType : unsigned {
+   OPERAND_UIMM2 = OPERAND_FIRST_RISCV_IMM,
+   OPERAND_UIMM3,
+   OPERAND_UIMM4,
++  OPERAND_UIMM4_PREF,
+   OPERAND_UIMM5,
+   OPERAND_UIMM7,
+   OPERAND_UIMM12,
++  OPERAND_SIMM8,
+   OPERAND_SIMM12,
+   OPERAND_UIMM20,
+   OPERAND_UIMMLOG2XLEN,
+diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormats.td b/llvm/lib/Target/RISCV/RISCVInstrFormats.td
+index d82e414a3f98..7e8e04c50d7a 100644
+--- a/llvm/lib/Target/RISCV/RISCVInstrFormats.td
++++ b/llvm/lib/Target/RISCV/RISCVInstrFormats.td
+@@ -334,6 +334,22 @@ class RVInstCache<bits<12> cache, RISCVOpcode opcode, dag outs, dag ins,
+   let Opcode = opcode.Value;
+ }
+ 
++class RVInstPref<RISCVOpcode opcode, dag outs, dag ins,
++                   string opcodestr, string argstr>
++    : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
++
++  bits<8> imm8;
++  bits<4> imm4;
++  bits<5> rs1;
++
++  let Inst{31-24} = imm8;
++  let Inst{23-20} = imm4;
++  let Inst{19-15} = rs1;
++  let Inst{14-12} = 2;
++  let Inst{11-7} = 0;
++  let Opcode = opcode.Value;
++}
++
+ class RVInstIShift<bits<5> imm11_7, bits<3> funct3, RISCVOpcode opcode,
+                    dag outs, dag ins, string opcodestr, string argstr>
+     : RVInst<outs, ins, opcodestr, argstr, [], InstFormatI> {
+diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+index ea009dc98101..9850f10913f4 100644
+--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td
++++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+@@ -167,6 +167,18 @@ def uimm3 : Operand<XLenVT> {
+   let OperandNamespace = "RISCVOp";
+ }
+ 
++def uimm4_pref : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<4>(Imm);}]> {
++  let ParserMatchClass = UImmAsmOperand<4>;
++  let DecoderMethod = "decodeUImmOperand<4>";
++  let MCOperandPredicate = [{
++    int64_t Imm;
++    if (MCOp.evaluateAsConstantImm(Imm))
++      return isUInt<4>(Imm) && (imm == 0 || imm == 1 || imm == 2 || imm == 4 || imm == 8);
++  }];
++  let OperandType = "OPERAND_UIMM4_PREF";
++  let OperandNamespace = "RISCVOp";
++}
++
+ def uimm5 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<5>(Imm);}]> {
+   let ParserMatchClass = UImmAsmOperand<5>;
+   let DecoderMethod = "decodeUImmOperand<5>";
+@@ -181,6 +193,14 @@ def uimm7 : Operand<XLenVT> {
+   let OperandNamespace = "RISCVOp";
+ }
+ 
++def simm8 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<8>(Imm);}]> {
++  let ParserMatchClass = SImmAsmOperand<8>;
++  let EncoderMethod = "getImmOpValue";
++  let DecoderMethod = "decodeSImmOperand<8>";
++  let OperandType = "OPERAND_SIMM8";
++  let OperandNamespace = "RISCVOp";
++}
++
+ def simm12 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<12>(Imm);}]> {
+   let ParserMatchClass = SImmAsmOperand<12>;
+   let EncoderMethod = "getImmOpValue";
+@@ -452,6 +472,12 @@ class CSR_cache<bits<12> cache, string opcodestr>
+     : RVInstCache<cache, OPC_SYSTEM, (outs), (ins GPR:$rs1),
+               opcodestr, "$rs1">, Sched<[WriteCSR, ReadCSR]>;
+ 
++let hasNoSchedulingInfo = 1,
++    hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
++class PREF_iir<string opcodestr>
++    : RVInstPref<OPC_OP_IMM, (outs), (ins uimm4_pref:$imm4, simm8:$imm8, GPR:$rs1),
++              opcodestr, "$imm4, ${imm8}(${rs1})">;
++
+ let hasNoSchedulingInfo = 1,
+     hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
+ class CSR_ii<bits<3> funct3, string opcodestr>
+@@ -599,6 +625,8 @@ def CFLUSH_D_L1   : CSR_cache<0b111111000000, "cflush.d.l1">;
+ def CDISCARD_D_L1 : CSR_cache<0b111111000010, "cdiscard.d.l1">;
+ def CFLUSH_D_L2   : CSR_cache<0b111111000100, "cflush.d.l2">;
+ def CDISCARD_D_L2 : CSR_cache<0b111111000110, "cdiscard.d.l2">;
++def PREF          : PREF_iir<"pref">;
++
+ /* End */
+ 
+ def CSRRW : CSR_ir<0b001, "csrrw">;
+-- 
+2.33.1
+

+ 48 - 0
recipes-devtools/clang/clang/0003-compiler-rt-Simplify-cross-compilation.-Don-t-use-na.patch

@@ -0,0 +1,48 @@
+From 1752b43655f7ff5319e3b6c7abfbca965b3ff48c Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:00:32 +0800
+Subject: [PATCH 03/34] compiler-rt: Simplify cross-compilation. Don't use
+ native-compiled llvm-config.
+
+    Note: AddLLVM.cmake does not expose the LLVM source directory.
+    So if you want to run the test suite, you need to either:
+
+    1) set LLVM_MAIN_SRC_DIR explicitly (to find lit.py)
+    2) change AddLLVM.cmake to point to an installed 'lit'.
+    3) add_subdirectory(compiler-rt/test) from clang instead of compiler-rt.
+
+https://us.codeaurora.org/patches/quic/llvm/50683/compiler-rt-cross-compilation.patch
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Greg Fitzgerald <gregf@codeaurora.org>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/CMakeLists.txt | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/compiler-rt/CMakeLists.txt b/compiler-rt/CMakeLists.txt
+index 4bbcf9aca4e8..bef42018877a 100644
+--- a/compiler-rt/CMakeLists.txt
++++ b/compiler-rt/CMakeLists.txt
+@@ -81,6 +81,16 @@ set(COMPILER_RT_BAREMETAL_BUILD OFF CACHE BOOL
+ 
+ if (COMPILER_RT_STANDALONE_BUILD)
+   load_llvm_config()
++  find_package(LLVM REQUIRED)
++  list(APPEND CMAKE_MODULE_PATH "${LLVM_CMAKE_DIR}")
++
++  # Variables that AddLLVM.cmake depends on (included by AddCompilerRT)
++  set(LLVM_TOOLS_BINARY_DIR "${LLVM_INSTALL_PREFIX}/bin")
++  set(LLVM_LIBRARY_DIR "${LLVM_INSTALL_PREFIX}/lib")
++
++  set(LLVM_LIBRARY_OUTPUT_INTDIR
++    ${CMAKE_BINARY_DIR}/${CMAKE_CFG_INTDIR}/lib${LLVM_LIBDIR_SUFFIX})
++
+   if (TARGET intrinsics_gen)
+     # Loading the llvm config causes this target to be imported so place it
+     # under the appropriate folder in an IDE.
+-- 
+2.33.1
+

+ 94 - 0
recipes-devtools/clang/clang/0004-llvm-TargetLibraryInfo-Undefine-libc-functions-if-th.patch

@@ -0,0 +1,94 @@
+From e33c9d90d2e9f0abec84fbd009150a4d19cec01c Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:03:40 +0800
+Subject: [PATCH 04/34] llvm: TargetLibraryInfo: Undefine libc functions if
+ they are macros
+
+musl defines some functions as macros and not inline functions
+if this is the case then make sure to undefine them
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ .../llvm/Analysis/TargetLibraryInfo.def       | 21 +++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/llvm/include/llvm/Analysis/TargetLibraryInfo.def b/llvm/include/llvm/Analysis/TargetLibraryInfo.def
+index ded53617b304..da612e9b4352 100644
+--- a/llvm/include/llvm/Analysis/TargetLibraryInfo.def
++++ b/llvm/include/llvm/Analysis/TargetLibraryInfo.def
+@@ -815,6 +815,9 @@ TLI_DEFINE_STRING_INTERNAL("fmodl")
+ TLI_DEFINE_ENUM_INTERNAL(fopen)
+ TLI_DEFINE_STRING_INTERNAL("fopen")
+ /// FILE *fopen64(const char *filename, const char *opentype)
++#ifdef fopen64
++#undef fopen64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(fopen64)
+ TLI_DEFINE_STRING_INTERNAL("fopen64")
+ /// int fork();
+@@ -862,6 +865,9 @@ TLI_DEFINE_STRING_INTERNAL("fseek")
+ /// int fseeko(FILE *stream, off_t offset, int whence);
+ TLI_DEFINE_ENUM_INTERNAL(fseeko)
+ TLI_DEFINE_STRING_INTERNAL("fseeko")
++#ifdef fseeko64
++#undef fseeko64
++#endif
+ /// int fseeko64(FILE *stream, off64_t offset, int whence)
+ TLI_DEFINE_ENUM_INTERNAL(fseeko64)
+ TLI_DEFINE_STRING_INTERNAL("fseeko64")
+@@ -872,6 +878,9 @@ TLI_DEFINE_STRING_INTERNAL("fsetpos")
+ TLI_DEFINE_ENUM_INTERNAL(fstat)
+ TLI_DEFINE_STRING_INTERNAL("fstat")
+ /// int fstat64(int filedes, struct stat64 *buf)
++#ifdef fstat64
++#undef fstat64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(fstat64)
+ TLI_DEFINE_STRING_INTERNAL("fstat64")
+ /// int fstatvfs(int fildes, struct statvfs *buf);
+@@ -887,6 +896,9 @@ TLI_DEFINE_STRING_INTERNAL("ftell")
+ TLI_DEFINE_ENUM_INTERNAL(ftello)
+ TLI_DEFINE_STRING_INTERNAL("ftello")
+ /// off64_t ftello64(FILE *stream)
++#ifdef ftello64
++#undef ftello64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(ftello64)
+ TLI_DEFINE_STRING_INTERNAL("ftello64")
+ /// int ftrylockfile(FILE *file);
+@@ -1013,6 +1025,9 @@ TLI_DEFINE_STRING_INTERNAL("logl")
+ TLI_DEFINE_ENUM_INTERNAL(lstat)
+ TLI_DEFINE_STRING_INTERNAL("lstat")
+ /// int lstat64(const char *path, struct stat64 *buf);
++#ifdef lstat64
++#undef lstat64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(lstat64)
+ TLI_DEFINE_STRING_INTERNAL("lstat64")
+ /// void *malloc(size_t size);
+@@ -1256,6 +1271,9 @@ TLI_DEFINE_STRING_INTERNAL("sscanf")
+ TLI_DEFINE_ENUM_INTERNAL(stat)
+ TLI_DEFINE_STRING_INTERNAL("stat")
+ /// int stat64(const char *path, struct stat64 *buf);
++#ifdef stat64
++#undef stat64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(stat64)
+ TLI_DEFINE_STRING_INTERNAL("stat64")
+ /// int statvfs(const char *path, struct statvfs *buf);
+@@ -1391,6 +1409,9 @@ TLI_DEFINE_STRING_INTERNAL("times")
+ TLI_DEFINE_ENUM_INTERNAL(tmpfile)
+ TLI_DEFINE_STRING_INTERNAL("tmpfile")
+ /// FILE *tmpfile64(void)
++#ifdef tmpfile64
++#undef tmpfile64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(tmpfile64)
+ TLI_DEFINE_STRING_INTERNAL("tmpfile64")
+ /// int toascii(int c);
+-- 
+2.33.1
+

+ 40 - 0
recipes-devtools/clang/clang/0005-llvm-allow-env-override-of-exe-path.patch

@@ -0,0 +1,40 @@
+From fbfaab8d1dfa23aff4e4adb0e92dd4ff6467e453 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:05:00 +0800
+Subject: [PATCH 05/34] llvm: allow env override of exe path
+
+When using a native llvm-config from inside a sysroot, we need llvm-config to
+return the libraries, include directories, etc. from inside the sysroot rather
+than from the native sysroot. Thus provide an env override for calling
+llvm-config from a target sysroot.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Martin Kelly <mkelly@xevo.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ llvm/tools/llvm-config/llvm-config.cpp | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/llvm/tools/llvm-config/llvm-config.cpp b/llvm/tools/llvm-config/llvm-config.cpp
+index 1a2f04552d13..019d8f2b5c5e 100644
+--- a/llvm/tools/llvm-config/llvm-config.cpp
++++ b/llvm/tools/llvm-config/llvm-config.cpp
+@@ -247,6 +247,13 @@ Typical components:\n\
+ 
+ /// Compute the path to the main executable.
+ std::string GetExecutablePath(const char *Argv0) {
++  // Hack for Yocto: we need to override the root path when we are using
++  // llvm-config from within a target sysroot.
++  const char *Sysroot = std::getenv("YOCTO_ALTERNATE_EXE_PATH");
++  if (Sysroot != nullptr) {
++    return Sysroot;
++  }
++
+   // This just needs to be some symbol in the binary; C++ doesn't
+   // allow taking the address of ::main however.
+   void *P = (void *)(intptr_t)GetExecutablePath;
+-- 
+2.33.1
+

+ 67 - 0
recipes-devtools/clang/clang/0006-clang-driver-Check-sysroot-for-ldso-path.patch

@@ -0,0 +1,67 @@
+From b1d28891098dc4dc5066aede6e20d4e5bd58bed5 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:07:13 +0800
+Subject: [PATCH 06/34] clang: driver: Check sysroot for ldso path
+
+OE does not necessarily follow the default path for the dynamic linker,
+therefore adjust it for OE. Check for the default path, and if it isn't
+there, check /lib.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Dan McGregor <dan.mcgregor@usask.ca>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Linux.cpp | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/clang/lib/Driver/ToolChains/Linux.cpp b/clang/lib/Driver/ToolChains/Linux.cpp
+index a80b8ad4e7ed..b7165be9a7a6 100644
+--- a/clang/lib/Driver/ToolChains/Linux.cpp
++++ b/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -480,11 +480,19 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+     LibDir = "lib64";
+     Loader =
+         (tools::ppc::hasPPCAbiArg(Args, "elfv2")) ? "ld64.so.2" : "ld64.so.1";
++    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++        LibDir = "lib";
++    }
+     break;
+   case llvm::Triple::ppc64le:
+     LibDir = "lib64";
+     Loader =
+         (tools::ppc::hasPPCAbiArg(Args, "elfv1")) ? "ld64.so.1" : "ld64.so.2";
++    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++        LibDir = "lib";
++    }
+     break;
+   case llvm::Triple::riscv32: {
+     StringRef ABIName = tools::riscv::getRISCVABI(Args, Triple);
+@@ -506,6 +514,10 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+   case llvm::Triple::sparcv9:
+     LibDir = "lib64";
+     Loader = "ld-linux.so.2";
++    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++        LibDir = "lib";
++    }
+     break;
+   case llvm::Triple::systemz:
+     LibDir = "lib";
+@@ -520,6 +532,10 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+ 
+     LibDir = X32 ? "libx32" : "lib64";
+     Loader = X32 ? "ld-linux-x32.so.2" : "ld-linux-x86-64.so.2";
++    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++        LibDir = "lib";
++    }
+     break;
+   }
+   case llvm::Triple::ve:
+-- 
+2.33.1
+

+ 37 - 0
recipes-devtools/clang/clang/0007-clang-Driver-tools.cpp-Add-lssp_nonshared-on-musl.patch

@@ -0,0 +1,37 @@
+From 82d171efa2dd426e5ff91c81075bf10aa81d881d Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:08:10 +0800
+Subject: [PATCH 07/34] clang: Driver/tools.cpp: Add -lssp_nonshared on musl
+
+musl driver will need to add ssp_nonshared for stack_check_local
+on the linker cmdline when using stack protector commands on
+compiler cmdline
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Gnu.cpp | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp
+index 9aca45312bb0..278064d9edca 100644
+--- a/clang/lib/Driver/ToolChains/Gnu.cpp
++++ b/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -630,6 +630,12 @@ void tools::gnutools::Linker::ConstructJob(Compilation &C, const JobAction &JA,
+       if (IsIAMCU)
+         CmdArgs.push_back("-lgloss");
+ 
++      if (ToolChain.getTriple().isMusl() &&
++          (Args.hasArg(options::OPT_fstack_protector) ||
++          Args.hasArg(options::OPT_fstack_protector_strong) ||
++          Args.hasArg(options::OPT_fstack_protector_all))) {
++        CmdArgs.push_back("-lssp_nonshared");
++      }
+       if (IsStatic || IsStaticPIE)
+         CmdArgs.push_back("--end-group");
+       else
+-- 
+2.33.1
+

+ 31 - 0
recipes-devtools/clang/clang/0008-clang-musl-ppc-does-not-support-128-bit-long-double.patch

@@ -0,0 +1,31 @@
+From 45ada900078b1a0b8d428766f5f429912e8eb521 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:09:14 +0800
+Subject: [PATCH 08/34] clang: musl/ppc does not support 128-bit long double
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Basic/Targets/PPC.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
+index 89034682a90e..43d8828dc0ff 100644
+--- a/clang/lib/Basic/Targets/PPC.h
++++ b/clang/lib/Basic/Targets/PPC.h
+@@ -394,6 +394,10 @@ public:
+       LongDoubleFormat = &llvm::APFloat::IEEEdouble();
+     }
+ 
++    if (getTriple().isMusl()) {
++      LongDoubleWidth = LongDoubleAlign = 64;
++      LongDoubleFormat = &llvm::APFloat::IEEEdouble();
++    }
+     // PPC32 supports atomics up to 4 bytes.
+     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+   }
+-- 
+2.33.1
+

+ 44 - 0
recipes-devtools/clang/clang/0009-clang-Prepend-trailing-to-sysroot.patch

@@ -0,0 +1,44 @@
+From ef6d2733699177e973abced7e6045b95b39caf76 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:10:37 +0800
+Subject: [PATCH 09/34] clang: Prepend trailing '/' to sysroot
+
+This is needed to handle a case where clang
+isntall and target sysroot are perilously same
+
+e.g.
+
+sysroot = /mnt/clang/recipe-sysroot
+clang install = /mnt/clang/recipe-sysroot-native
+
+in this case it will mistakenly assume that
+clang is installed under the same sysroot dir
+and it will try to add relative ../lib paths
+to linker steps which would then be wrong
+since they will become relative to clang
+installation and not sysroot
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Linux.cpp | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/clang/lib/Driver/ToolChains/Linux.cpp b/clang/lib/Driver/ToolChains/Linux.cpp
+index b7165be9a7a6..9fe4e5230045 100644
+--- a/clang/lib/Driver/ToolChains/Linux.cpp
++++ b/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -181,7 +181,7 @@ Linux::Linux(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
+   Multilibs = GCCInstallation.getMultilibs();
+   SelectedMultilib = GCCInstallation.getMultilib();
+   llvm::Triple::ArchType Arch = Triple.getArch();
+-  std::string SysRoot = computeSysRoot();
++  std::string SysRoot = computeSysRoot() + "/";
+   ToolChain::path_list &PPaths = getProgramPaths();
+ 
+   Generic_GCC::PushPPaths(PPaths);
+-- 
+2.33.1
+

+ 47 - 0
recipes-devtools/clang/clang/0010-clang-Look-inside-the-target-sysroot-for-compiler-ru.patch

@@ -0,0 +1,47 @@
+From d7480a67f7ee5ed3fdb8c5c847ffb5ed33efea80 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:13:08 +0800
+Subject: [PATCH 10/34] clang: Look inside the target sysroot for compiler
+ runtime
+
+In OE compiler-rt and libc++ are built and staged into target
+sysroot and not into resourcedir which is relative to clang
+driver installation where the libraries are not instlled
+
+Specific to cross compiling the way yocto/OE works
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChain.cpp | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/clang/lib/Driver/ToolChain.cpp b/clang/lib/Driver/ToolChain.cpp
+index 7272cc29cc7c..bbc50233e01b 100644
+--- a/clang/lib/Driver/ToolChain.cpp
++++ b/clang/lib/Driver/ToolChain.cpp
+@@ -13,6 +13,7 @@
+ #include "ToolChains/Flang.h"
+ #include "clang/Basic/ObjCRuntime.h"
+ #include "clang/Basic/Sanitizers.h"
++#include "clang/Basic/Version.h"
+ #include "clang/Config/config.h"
+ #include "clang/Driver/Action.h"
+ #include "clang/Driver/Driver.h"
+@@ -410,7 +411,10 @@ StringRef ToolChain::getOSLibName() const {
+ }
+ 
+ std::string ToolChain::getCompilerRTPath() const {
+-  SmallString<128> Path(getDriver().ResourceDir);
++  SmallString<128> Path(getDriver().SysRoot);
++  StringRef ClangLibdirSuffix(CLANG_LIBDIR_SUFFIX);
++  llvm::sys::path::append(Path, "/usr/", Twine("lib") + ClangLibdirSuffix, "clang",
++                            CLANG_VERSION_STRING);
+   if (Triple.isOSUnknown()) {
+     llvm::sys::path::append(Path, "lib");
+   } else {
+-- 
+2.33.1
+

+ 52 - 0
recipes-devtools/clang/clang/0011-clang-Define-releative-gcc-installation-dir.patch

@@ -0,0 +1,52 @@
+From 1545fd910e641757705cb580a15ba6cd511be72e Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:15:04 +0800
+Subject: [PATCH 11/34] clang: Define / releative gcc installation dir
+
+This is required for OE gcc installation to work.
+Without this its not able to find the paths for libgcc
+and other standard headers and libraries from gcc
+installation in OE
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Gnu.cpp | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp
+index 278064d9edca..31d1c5c756fd 100644
+--- a/clang/lib/Driver/ToolChains/Gnu.cpp
++++ b/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -2534,19 +2534,19 @@ void Generic_GCC::GCCInstallationDetector::ScanLibDirForGCCTriple(
+     // Whether this library suffix is relevant for the triple.
+     bool Active;
+   } Suffixes[] = {
+-      // This is the normal place.
+-      {"gcc/" + CandidateTriple.str(), "../..", GCCDirExists},
+-
+-      // Debian puts cross-compilers in gcc-cross.
+-      {"gcc-cross/" + CandidateTriple.str(), "../..", GCCCrossDirExists},
+-
+       // The Freescale PPC SDK has the gcc libraries in
+       // <sysroot>/usr/lib/<triple>/x.y.z so have a look there as well. Only do
+       // this on Freescale triples, though, since some systems put a *lot* of
+       // files in that location, not just GCC installation data.
+       {CandidateTriple.str(), "..",
+        TargetTriple.getVendor() == llvm::Triple::Freescale ||
+-           TargetTriple.getVendor() == llvm::Triple::OpenEmbedded}};
++           TargetTriple.getVendor() == llvm::Triple::OpenEmbedded},
++
++      // This is the normal place.
++      {"gcc/" + CandidateTriple.str(), "../..", GCCDirExists},
++
++      // Debian puts cross-compilers in gcc-cross.
++      {"gcc-cross/" + CandidateTriple.str(), "../..", GCCCrossDirExists}};
+ 
+   for (auto &Suffix : Suffixes) {
+     if (!Suffix.Active)
+-- 
+2.33.1
+

+ 40 - 0
recipes-devtools/clang/clang/0012-clang-Add-lpthread-and-ldl-along-with-lunwind-for-st.patch

@@ -0,0 +1,40 @@
+From d687ffafecd9eab2e78cd8cce4b35b303e9fe482 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:16:16 +0800
+Subject: [PATCH 12/34] clang: Add -lpthread and -ldl along with -lunwind for
+ static linking
+
+When doing static liking with --unwindlib=libunwind -static we encounter
+undefined symbols
+libunwind/src/RWMutex.hpp:68: undefined reference to `pthread_rwlock_wrlock'
+
+and
+
+libunwind/src/AddressSpace.hpp:597: undefined reference to `dladdr'
+
+therefore we need to link in libpthread and libdl to fill these symbols
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/CommonArgs.cpp | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp
+index 9f1895466c98..2682a9df9e1c 100644
+--- a/clang/lib/Driver/ToolChains/CommonArgs.cpp
++++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp
+@@ -1449,6 +1449,8 @@ static void AddUnwindLibrary(const ToolChain &TC, const Driver &D,
+         CmdArgs.push_back("-lunwind");
+     } else if (LGT == LibGccType::StaticLibGcc) {
+       CmdArgs.push_back("-l:libunwind.a");
++      CmdArgs.push_back("-lpthread");
++      CmdArgs.push_back("-ldl");
+     } else if (TC.getTriple().isOSCygMing()) {
+       if (LGT == LibGccType::SharedLibGcc)
+         CmdArgs.push_back("-l:libunwind.dll.a");
+-- 
+2.33.1
+

+ 30 - 0
recipes-devtools/clang/clang/0013-Pass-PYTHON_EXECUTABLE-when-cross-compiling-for-nati.patch

@@ -0,0 +1,30 @@
+From 4c0ed5f1917b15054b2d21eef2ded0f251f9bf64 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:17:27 +0800
+Subject: [PATCH 13/34] Pass PYTHON_EXECUTABLE when cross compiling for native
+ build
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ llvm/cmake/modules/CrossCompile.cmake | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/llvm/cmake/modules/CrossCompile.cmake b/llvm/cmake/modules/CrossCompile.cmake
+index 8e82d64a70d9..00e30390eb51 100644
+--- a/llvm/cmake/modules/CrossCompile.cmake
++++ b/llvm/cmake/modules/CrossCompile.cmake
+@@ -80,6 +80,7 @@ function(llvm_create_cross_target project_name target_name toolchain buildtype)
+         -DLLVM_EXTERNAL_PROJECTS="${llvm_external_projects_arg}"
+         ${external_project_source_dirs}
+         -DLLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN="${LLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN}"
++        -DPYTHON_EXECUTABLE="${PYTHON_EXECUTABLE}"
+         ${build_type_flags} ${linker_flag} ${external_clang_dir}
+         ${ARGN}
+     WORKING_DIRECTORY ${${project_name}_${target_name}_BUILD}
+-- 
+2.33.1
+

+ 39 - 0
recipes-devtools/clang/clang/0014-Check-for-atomic-double-intrinsics.patch

@@ -0,0 +1,39 @@
+From 35335e2b2490ff476ba5ece2a0f4287a469deb2e Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:18:59 +0800
+Subject: [PATCH 14/34] Check for atomic<double> intrinsics
+
+On some architectures e.g. x86/32bit gcc decides to inline calls to
+double atomic variables but clang does not and defers it to libatomic
+therefore detect if clang can use built-ins for atomic<double> if not
+then link libatomic, this helps building clangd for x86 on linux systems
+with gcc runtime
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ llvm/cmake/modules/CheckAtomic.cmake | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/llvm/cmake/modules/CheckAtomic.cmake b/llvm/cmake/modules/CheckAtomic.cmake
+index 04eed1448482..e890cfecd139 100644
+--- a/llvm/cmake/modules/CheckAtomic.cmake
++++ b/llvm/cmake/modules/CheckAtomic.cmake
+@@ -30,10 +30,11 @@ function(check_working_cxx_atomics64 varname)
+ #include <atomic>
+ #include <cstdint>
+ std::atomic<uint64_t> x (0);
++std::atomic<double> y (0);
+ int main() {
+   uint64_t i = x.load(std::memory_order_relaxed);
+   (void)i;
+-  return 0;
++  return int(y);
+ }
+ " ${varname})
+   set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS})
+-- 
+2.33.1
+

+ 44 - 0
recipes-devtools/clang/clang/0015-libcxx-Add-compiler-runtime-library-to-link-step-for.patch

@@ -0,0 +1,44 @@
+From a096db3cc09b352c027799ae05feeca468a0e6e2 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:24:03 +0800
+Subject: [PATCH 15/34] libcxx: Add compiler runtime library to link step for
+ libcxx
+
+This corrects "undefined reference to __divti3"
+
+Upstream-Status: Inappropriate [configuration]
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Jeremy Puhlman <jpuhlman@mvista.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ libcxx/src/CMakeLists.txt | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/libcxx/src/CMakeLists.txt b/libcxx/src/CMakeLists.txt
+index 0bcfb1776271..488206d8324d 100644
+--- a/libcxx/src/CMakeLists.txt
++++ b/libcxx/src/CMakeLists.txt
+@@ -196,7 +196,7 @@ split_list(LIBCXX_LINK_FLAGS)
+ if (LIBCXX_ENABLE_SHARED)
+   add_library(cxx_shared SHARED ${exclude_from_all} ${LIBCXX_SOURCES} ${LIBCXX_HEADERS})
+   target_link_libraries(cxx_shared PUBLIC cxx-headers
+-                                   PRIVATE ${LIBCXX_LIBRARIES})
++                                   PRIVATE ${LIBCXX_LIBRARIES} "$$($$CC --print-libgcc-file-name)")
+   set_target_properties(cxx_shared
+     PROPERTIES
+       COMPILE_FLAGS "${LIBCXX_COMPILE_FLAGS}"
+@@ -274,7 +274,7 @@ set(CMAKE_STATIC_LIBRARY_PREFIX "lib")
+ if (LIBCXX_ENABLE_STATIC)
+   add_library(cxx_static STATIC ${exclude_from_all} ${LIBCXX_SOURCES} ${LIBCXX_HEADERS})
+   target_link_libraries(cxx_static PUBLIC cxx-headers
+-                                   PRIVATE ${LIBCXX_LIBRARIES})
++                                   PRIVATE ${LIBCXX_LIBRARIES} "$$($$CC --print-libgcc-file-name)")
+   set_target_properties(cxx_static
+     PROPERTIES
+       COMPILE_FLAGS "${LIBCXX_COMPILE_FLAGS}"
+-- 
+2.33.1
+

+ 122 - 0
recipes-devtools/clang/clang/0016-clang-llvm-cmake-Fix-configure-for-packages-using.patch

@@ -0,0 +1,122 @@
+From 39f88370fb0d09b3ff544265076c70e8476014ee Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:31:46 +0800
+Subject: [PATCH 16/34] clang,llvm: cmake: Fix configure for packages using 
+ find_package()
+
+Currently, when a package (i.e. bcc [https://github.com/iovisor/bcc.git])
+that depends on LLVM/Clang tries to run cmake find_package() during
+do_configure, it will fail with a similar error:
+
+|   The imported target "llvm-tblgen" references the file
+|      ".../recipe-sysroot/usr/bin/llvm-tblgen"
+|
+|   but this file does not exist.  Possible reasons include:
+|   * The file was deleted, renamed, or moved to another location.
+|   * An install or uninstall procedure did not complete successfully.
+|   * The installation package was faulty and contained
+|      ".../recipe-sysroot/usr/lib/cmake/LLVMExports.cmake"
+|   but not all the files it references.
+
+This is due to the fact that currently the cmake scripts look for target
+binaries in sysroot. Work around this by not exporting the target binaries in
+Exports-* cmake files.
+
+Upstream-Status: Innapropriate [oe-specific]
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/cmake/modules/AddClang.cmake | 2 --
+ llvm/cmake/modules/AddLLVM.cmake   | 6 ------
+ llvm/cmake/modules/TableGen.cmake  | 7 -------
+ 3 files changed, 15 deletions(-)
+
+diff --git a/clang/cmake/modules/AddClang.cmake b/clang/cmake/modules/AddClang.cmake
+index 5752f4277444..f40ea35faf46 100644
+--- a/clang/cmake/modules/AddClang.cmake
++++ b/clang/cmake/modules/AddClang.cmake
+@@ -158,7 +158,6 @@ macro(add_clang_tool name)
+   if (CLANG_BUILD_TOOLS)
+     get_target_export_arg(${name} Clang export_to_clangtargets)
+     install(TARGETS ${name}
+-      ${export_to_clangtargets}
+       RUNTIME DESTINATION bin
+       COMPONENT ${name})
+ 
+@@ -167,7 +166,6 @@ macro(add_clang_tool name)
+                                DEPENDS ${name}
+                                COMPONENT ${name})
+     endif()
+-    set_property(GLOBAL APPEND PROPERTY CLANG_EXPORTS ${name})
+   endif()
+ endmacro()
+ 
+diff --git a/llvm/cmake/modules/AddLLVM.cmake b/llvm/cmake/modules/AddLLVM.cmake
+index c5a9e0209f13..c824e69ba066 100644
+--- a/llvm/cmake/modules/AddLLVM.cmake
++++ b/llvm/cmake/modules/AddLLVM.cmake
+@@ -1241,7 +1241,6 @@ macro(add_llvm_tool name)
+     if( LLVM_BUILD_TOOLS )
+       get_target_export_arg(${name} LLVM export_to_llvmexports)
+       install(TARGETS ${name}
+-              ${export_to_llvmexports}
+               RUNTIME DESTINATION ${LLVM_TOOLS_INSTALL_DIR}
+               COMPONENT ${name})
+ 
+@@ -1252,9 +1251,6 @@ macro(add_llvm_tool name)
+       endif()
+     endif()
+   endif()
+-  if( LLVM_BUILD_TOOLS )
+-    set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${name})
+-  endif()
+   set_target_properties(${name} PROPERTIES FOLDER "Tools")
+ endmacro(add_llvm_tool name)
+ 
+@@ -1294,7 +1290,6 @@ macro(add_llvm_utility name)
+     if (LLVM_INSTALL_UTILS AND LLVM_BUILD_UTILS)
+       get_target_export_arg(${name} LLVM export_to_llvmexports)
+       install(TARGETS ${name}
+-              ${export_to_llvmexports}
+               RUNTIME DESTINATION ${LLVM_UTILS_INSTALL_DIR}
+               COMPONENT ${name})
+ 
+@@ -1303,7 +1298,6 @@ macro(add_llvm_utility name)
+                                  DEPENDS ${name}
+                                  COMPONENT ${name})
+       endif()
+-      set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${name})
+     elseif(LLVM_BUILD_UTILS)
+       set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS_BUILDTREE_ONLY ${name})
+     endif()
+diff --git a/llvm/cmake/modules/TableGen.cmake b/llvm/cmake/modules/TableGen.cmake
+index 5e9e2674405e..3c72df35b308 100644
+--- a/llvm/cmake/modules/TableGen.cmake
++++ b/llvm/cmake/modules/TableGen.cmake
+@@ -179,14 +179,8 @@ macro(add_tablegen target project)
+   endif()
+ 
+   if ((${project} STREQUAL LLVM OR ${project} STREQUAL MLIR) AND NOT LLVM_INSTALL_TOOLCHAIN_ONLY AND LLVM_BUILD_UTILS)
+-    set(export_to_llvmexports)
+-    if(${target} IN_LIST LLVM_DISTRIBUTION_COMPONENTS OR
+-        NOT LLVM_DISTRIBUTION_COMPONENTS)
+-      set(export_to_llvmexports EXPORT LLVMExports)
+-    endif()
+ 
+     install(TARGETS ${target}
+-            ${export_to_llvmexports}
+             COMPONENT ${target}
+             RUNTIME DESTINATION ${LLVM_TOOLS_INSTALL_DIR})
+     if(NOT LLVM_ENABLE_IDE)
+@@ -195,5 +189,4 @@ macro(add_tablegen target project)
+                                COMPONENT ${target})
+     endif()
+   endif()
+-  set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${target})
+ endmacro()
+-- 
+2.33.1
+

+ 45 - 0
recipes-devtools/clang/clang/0017-clang-Fix-resource-dir-location-for-cross-toolchains.patch

@@ -0,0 +1,45 @@
+From 0427b4e815f6cdcc0ba24691807c211305c8f3c5 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:33:07 +0800
+Subject: [PATCH 17/34] clang: Fix resource dir location for cross toolchains
+
+When clang looks for the resources directory, it does so based on the binary
+location and assumes that the containing directory is a sibling to lib. The
+Yocto cross.bbclass defines the default bindir as
+${exec_prefix}/bin/${CROSS_TARGET_SYS_DIR}. ex: /usr/bin/aarch64-poky-linux/.
+This causes clang to form a path that looks like /usr/bin/lib/clang/...
+
+As a fix for this, check the parent directory name. If that is "bin", then
+use that directory's parent.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Jim Broadus <jbroadus@xevo.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/Driver.cpp | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
+index b2fb21b7052a..7e8c64a62f7e 100644
+--- a/clang/lib/Driver/Driver.cpp
++++ b/clang/lib/Driver/Driver.cpp
+@@ -122,7 +122,13 @@ std::string Driver::GetResourcesPath(StringRef BinaryPath,
+     // With a static-library build of libclang, LibClangPath will contain the
+     // path of the embedding binary, which for LLVM binaries will be in bin/.
+     // ../lib gets us to lib/ in both cases.
+-    P = llvm::sys::path::parent_path(Dir);
++    Dir = std::string(llvm::sys::path::parent_path(Dir));
++
++    // OE cross toolchains are installed, by default, in a subdir of bin.
++    if (llvm::sys::path::filename(Dir) == "bin") {
++      Dir = std::string(llvm::sys::path::parent_path(Dir));
++    }
++    P = Dir;
+     llvm::sys::path::append(P, Twine("lib") + CLANG_LIBDIR_SUFFIX, "clang",
+                             CLANG_VERSION_STRING);
+   }
+-- 
+2.33.1
+

+ 32 - 0
recipes-devtools/clang/clang/0018-fix-path-to-libffi.patch

@@ -0,0 +1,32 @@
+From 94cf62bdf4a9e74ec4613f3df8ae1e7e925e95ba Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:34:47 +0800
+Subject: [PATCH 18/34] fix path to libffi
+
+FFI_LIBRARY_PATH is the full path to libffi so when building something that links to
+libLLVMInterpreter, we were looking for libffi in clang's recipe-sysroot instead of
+the recipe's sysroot.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ llvm/lib/ExecutionEngine/Interpreter/CMakeLists.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/llvm/lib/ExecutionEngine/Interpreter/CMakeLists.txt b/llvm/lib/ExecutionEngine/Interpreter/CMakeLists.txt
+index 976219830d5e..9930e01559e9 100644
+--- a/llvm/lib/ExecutionEngine/Interpreter/CMakeLists.txt
++++ b/llvm/lib/ExecutionEngine/Interpreter/CMakeLists.txt
+@@ -22,5 +22,5 @@ add_llvm_component_library(LLVMInterpreter
+   )
+ 
+ if( LLVM_ENABLE_FFI )
+-  target_link_libraries( LLVMInterpreter PRIVATE ${FFI_LIBRARY_PATH} )
++  target_link_libraries( LLVMInterpreter PRIVATE ffi )
+ endif()
+-- 
+2.33.1
+

+ 73 - 0
recipes-devtools/clang/clang/0019-clang-driver-Add-dyld-prefix-when-checking-sysroot-f.patch

@@ -0,0 +1,73 @@
+From b9349e316a179b7a37a119dbfeddbd4d382941b4 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:38:17 +0800
+Subject: [PATCH 19/34] clang: driver: Add dyld-prefix when checking sysroot
+ for ldso path
+
+ * the dyld-prefix shall be taken into account when the default
+   path for the dynamic linker has to be checked.
+
+ * this patch shall be used as annex to the next patch:
+   'clang: driver: Check sysroot for ldso path' which includes
+   the usrmerge scenario.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Oleksandr Ocheretnyi <oocheret@cisco.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Linux.cpp | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/clang/lib/Driver/ToolChains/Linux.cpp b/clang/lib/Driver/ToolChains/Linux.cpp
+index 9fe4e5230045..abaab04c8266 100644
+--- a/clang/lib/Driver/ToolChains/Linux.cpp
++++ b/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -480,8 +480,8 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+     LibDir = "lib64";
+     Loader =
+         (tools::ppc::hasPPCAbiArg(Args, "elfv2")) ? "ld64.so.2" : "ld64.so.1";
+-    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
+-         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++    if (!getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/lib/" + Loader)) {
+         LibDir = "lib";
+     }
+     break;
+@@ -489,8 +489,8 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+     LibDir = "lib64";
+     Loader =
+         (tools::ppc::hasPPCAbiArg(Args, "elfv1")) ? "ld64.so.1" : "ld64.so.2";
+-    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
+-         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++    if (!getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/lib/" + Loader)) {
+         LibDir = "lib";
+     }
+     break;
+@@ -514,8 +514,8 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+   case llvm::Triple::sparcv9:
+     LibDir = "lib64";
+     Loader = "ld-linux.so.2";
+-    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
+-         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++    if (!getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/lib/" + Loader)) {
+         LibDir = "lib";
+     }
+     break;
+@@ -532,8 +532,8 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const {
+ 
+     LibDir = X32 ? "libx32" : "lib64";
+     Loader = X32 ? "ld-linux-x32.so.2" : "ld-linux-x86-64.so.2";
+-    if (!getVFS().exists(getDriver().SysRoot + "/" + LibDir + "/" + Loader) &&
+-         getVFS().exists(getDriver().SysRoot + "/lib/" + Loader)) {
++    if (!getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/" + LibDir + "/" + Loader) &&
++         getVFS().exists(getDriver().SysRoot + getDriver().DyldPrefix + "/lib/" + Loader)) {
+         LibDir = "lib";
+     }
+     break;
+-- 
+2.33.1
+

+ 108 - 0
recipes-devtools/clang/clang/0020-clang-Use-python3-in-python-scripts.patch

@@ -0,0 +1,108 @@
+From 873aa64ba616b471c81db436dfb4d267d036895b Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:42:04 +0800
+Subject: [PATCH 20/34] clang: Use python3 in python scripts
+
+Some scripts ask for python, but they work fine with python3
+and in OE python symlink is not exposed to build, only python3 is
+
+Upstream-Status: Pending
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ .../find-all-symbols/tool/run-find-all-symbols.py               | 2 +-
+ clang-tools-extra/clang-tidy/add_new_check.py                   | 2 +-
+ clang-tools-extra/clang-tidy/rename_check.py                    | 2 +-
+ clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py            | 2 +-
+ clang-tools-extra/clang-tidy/tool/run-clang-tidy.py             | 2 +-
+ clang/tools/clang-format/git-clang-format                       | 2 +-
+ clang/tools/scan-view/bin/scan-view                             | 2 +-
+ clang/utils/hmaptool/hmaptool                                   | 2 +-
+ 8 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/clang-tools-extra/clang-include-fixer/find-all-symbols/tool/run-find-all-symbols.py b/clang-tools-extra/clang-include-fixer/find-all-symbols/tool/run-find-all-symbols.py
+index 8655af137bb2..e95ba59a421c 100755
+--- a/clang-tools-extra/clang-include-fixer/find-all-symbols/tool/run-find-all-symbols.py
++++ b/clang-tools-extra/clang-include-fixer/find-all-symbols/tool/run-find-all-symbols.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ #
+ #=- run-find-all-symbols.py - Parallel find-all-symbols runner -*- python  -*-=#
+ #
+diff --git a/clang-tools-extra/clang-tidy/add_new_check.py b/clang-tools-extra/clang-tidy/add_new_check.py
+index 0312c04e047c..29db06683bee 100755
+--- a/clang-tools-extra/clang-tidy/add_new_check.py
++++ b/clang-tools-extra/clang-tidy/add_new_check.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ #
+ #===- add_new_check.py - clang-tidy check generator ---------*- python -*--===#
+ #
+diff --git a/clang-tools-extra/clang-tidy/rename_check.py b/clang-tools-extra/clang-tidy/rename_check.py
+index 9c2021751e0e..4bb9af8cbe0a 100755
+--- a/clang-tools-extra/clang-tidy/rename_check.py
++++ b/clang-tools-extra/clang-tidy/rename_check.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ #
+ #===- rename_check.py - clang-tidy check renamer ------------*- python -*--===#
+ #
+diff --git a/clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py b/clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
+index 6bd05531333b..9e134123ef44 100755
+--- a/clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
++++ b/clang-tools-extra/clang-tidy/tool/clang-tidy-diff.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ #
+ #===- clang-tidy-diff.py - ClangTidy Diff Checker -----------*- python -*--===#
+ #
+diff --git a/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py b/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
+index acd1ed6979c0..12bd7f9c7dc3 100755
+--- a/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
++++ b/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ #
+ #===- run-clang-tidy.py - Parallel clang-tidy runner --------*- python -*--===#
+ #
+diff --git a/clang/tools/clang-format/git-clang-format b/clang/tools/clang-format/git-clang-format
+index 0233ceb3a868..16bc55f98762 100755
+--- a/clang/tools/clang-format/git-clang-format
++++ b/clang/tools/clang-format/git-clang-format
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ #
+ #===- git-clang-format - ClangFormat Git Integration ---------*- python -*--===#
+ #
+diff --git a/clang/tools/scan-view/bin/scan-view b/clang/tools/scan-view/bin/scan-view
+index 6165432e7af8..07effbca5969 100755
+--- a/clang/tools/scan-view/bin/scan-view
++++ b/clang/tools/scan-view/bin/scan-view
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ 
+ from __future__ import print_function
+ 
+diff --git a/clang/utils/hmaptool/hmaptool b/clang/utils/hmaptool/hmaptool
+index e647cde6bc46..7ed2fdf674b1 100755
+--- a/clang/utils/hmaptool/hmaptool
++++ b/clang/utils/hmaptool/hmaptool
+@@ -1,4 +1,4 @@
+-#!/usr/bin/env python
++#!/usr/bin/env python3
+ from __future__ import absolute_import, division, print_function
+ 
+ import json
+-- 
+2.33.1
+

+ 76 - 0
recipes-devtools/clang/clang/0021-For-x86_64-set-Yocto-based-GCC-install-search-path.patch

@@ -0,0 +1,76 @@
+From 59b5274dccd5bab65df246e812ee22b747916d7d Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:43:27 +0800
+Subject: [PATCH 21/34] For x86_64, set Yocto based GCC install search path
+
+Under Yocto host, while using clang-native to build, it searches
+install host gcc failed which causing the include file not found
+[snip]
+|clang++ -target x86_64-linux  -MMD -MF src/base/files/file_path_constants.o.d -I../../../tools/gn/src -I. \
+-isystem/tmp-glibc/work/x86_64-linux/gn-native/87.0.4280.141-r0/recipe-sysroot-native/usr/include -O2 -pipe \
+-std=c++17 -c ../../../tools/gn/src/base/files/file_path_constants.cc -o src/base/files/file_path_constants.o
+|../../../tools/gn/src/base/files/file_path_constants.cc:7:10: fatal error: 'iterator' file not found
+|#include <iterator>
+|         ^~~~~~~~
+[snip]
+
+Set three Yocto based GCC triple: poky, oe-core and wind river
+
+Before aplly the patch
+[snip]
+$ ../recipe-sysroot-native/usr/bin/clang++ -v
+clang version 11.0.1 (https://github.com/llvm/llvm-project 43ff75f2c3feef64f9d73328230d34dac8832a91)
+Target: x86_64-unknown-linux-gnu
+Thread model: posix
+InstalledDir:tmp-glibc/work/x86_64-linux/gn-native/87.0.4280.141-r0/chromium-87.0.4280.141/../recipe-sysroot-native/usr/bin
+[snip]
+
+After aplly the patch:
+[snip]
+$ ../recipe-sysroot-native/usr/bin/clang++ -v
+clang version 11.0.1 (https://github.com/llvm/llvm-project 22c3241ff9a6224261df48d0258957fd8acc3d64)
+Target: x86_64-unknown-linux-gnu
+Thread model: posix
+InstalledDir:tmp-glibc/work/x86_64-linux/gn-native/87.0.4280.141-r0/chromium-87.0.4280.141/../recipe-sysroot-native/usr/bin
+Found candidate GCC installation: /usr/lib//x86_64-wrs-linux/10.1.0
+Found candidate GCC installation: /usr/lib/gcc/x86_64-wrs-linux/10.1.0
+Selected GCC installation: /usr/lib//x86_64-wrs-linux/10.1.0
+Candidate multilib: .;@m64
+Selected multilib: .;@m64
+[snip]
+
+BTW, it is hardly to insert a triple by the replacement of TARGET_SYS
+(=${TARGET_ARCH}${TARGET_VENDOR}-${TARGET_OS}), since TARGET_VENDOR
+is different between clang and clang-native
+
+The //CLANG_EXTRA_OE_VENDORS_TRIPLES string is replaced with list of
+additional triples based on CLANG_EXTRA_OE_VENDORS variable in
+recipes-devtools/clang/llvm-project-source.inc:add_more_target_vendors()
+
+Upstream-Status: Inappropriate [oe specific]
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Martin Jansa <martin.jansa@gmail.com>
+Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Gnu.cpp | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp
+index 31d1c5c756fd..e6f440902e97 100644
+--- a/clang/lib/Driver/ToolChains/Gnu.cpp
++++ b/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -2118,6 +2118,7 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes(
+       "x86_64-redhat-linux",    "x86_64-suse-linux",
+       "x86_64-manbo-linux-gnu", "x86_64-linux-gnu",
+       "x86_64-slackware-linux", "x86_64-unknown-linux",
++      "x86_64-oe-linux",//CLANG_EXTRA_OE_VENDORS_TRIPLES
+       "x86_64-amazon-linux",    "x86_64-linux-android"};
+   static const char *const X32Triples[] = {"x86_64-linux-gnux32",
+                                            "x86_64-pc-linux-gnux32"};
+-- 
+2.33.1
+

+ 50 - 0
recipes-devtools/clang/clang/0022-llvm-Do-not-use-find_library-for-ncurses.patch

@@ -0,0 +1,50 @@
+From 1c5c90696fc4edb612157536bad3447370172584 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:44:53 +0800
+Subject: [PATCH 22/34] llvm: Do not use find_library for ncurses
+
+This ensures that it lets OE to decide which lib to link
+otherwise it adds absolute paths to linker cmdline and confuses it
+horribly with native and target libs when build clang for target
+
+TOPDIR/build/tmp/work/cortexa57-yoe-linux-musl/clang/12.0.0-r0/recipe-sysroot-native/usr/lib/libtinfo.so: error adding symbols: file in wrong format
+clang-12: error: linker command failed with exit code 1 (use -v to see invocation)
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/cmake/config-ix.cmake | 2 +-
+ llvm/cmake/config-ix.cmake        | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/compiler-rt/cmake/config-ix.cmake b/compiler-rt/cmake/config-ix.cmake
+index 62685f5d6c33..6461735c9dcb 100644
+--- a/compiler-rt/cmake/config-ix.cmake
++++ b/compiler-rt/cmake/config-ix.cmake
+@@ -149,7 +149,7 @@ else()
+   set(MAYBE_REQUIRED)
+ endif()
+ if(LLVM_ENABLE_TERMINFO)
+-  find_library(COMPILER_RT_TERMINFO_LIB NAMES terminfo tinfo curses ncurses ncursesw ${MAYBE_REQUIRED})
++  set(TERMINFO_LIB tinfo curses ncurses ncursesw)
+ endif()
+ if(COMPILER_RT_TERMINFO_LIB)
+   set(LLVM_ENABLE_TERMINFO 1)
+diff --git a/llvm/cmake/config-ix.cmake b/llvm/cmake/config-ix.cmake
+index 3569c2d1389a..8a725d13343f 100644
+--- a/llvm/cmake/config-ix.cmake
++++ b/llvm/cmake/config-ix.cmake
+@@ -176,7 +176,7 @@ if(NOT LLVM_USE_SANITIZER MATCHES "Memory.*")
+       set(MAYBE_REQUIRED)
+     endif()
+     if(LLVM_ENABLE_TERMINFO)
+-      find_library(TERMINFO_LIB NAMES terminfo tinfo curses ncurses ncursesw ${MAYBE_REQUIRED})
++      set(TERMINFO_LIB tinfo curses ncurses ncursesw)
+     endif()
+     if(TERMINFO_LIB)
+       set(LLVM_ENABLE_TERMINFO 1)
+-- 
+2.33.1
+

+ 38 - 0
recipes-devtools/clang/clang/0023-llvm-Insert-anchor-for-adding-OE-distro-vendor-names.patch

@@ -0,0 +1,38 @@
+From 2cfdb7d3c7f932be6befc9a47f128806cc5c4847 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:47:18 +0800
+Subject: [PATCH 23/34] llvm: Insert anchor for adding OE distro vendor names
+
+This helps in making right detection for OE built gcc toolchains
+
+The //CLANG_EXTRA_OE_VENDORS_CASES string is replaced with list of
+additional Ceses based on CLANG_EXTRA_OE_VENDORS variable in
+recipes-devtools/clang/llvm-project-source.inc:add_more_target_vendors()
+
+Upstream-Status: Inappropriate [OE-specific]
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Martin Jansa <martin.jansa@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ llvm/lib/Support/Triple.cpp | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp
+index 88311546354b..8b2745deae88 100644
+--- a/llvm/lib/Support/Triple.cpp
++++ b/llvm/lib/Support/Triple.cpp
+@@ -496,7 +496,7 @@ static Triple::VendorType parseVendor(StringRef VendorName) {
+     .Case("amd", Triple::AMD)
+     .Case("mesa", Triple::Mesa)
+     .Case("suse", Triple::SUSE)
+-    .Case("oe", Triple::OpenEmbedded)
++    .Case("oe", Triple::OpenEmbedded)//CLANG_EXTRA_OE_VENDORS_CASES
+     .Default(Triple::UnknownVendor);
+ }
+ 
+-- 
+2.33.1
+

+ 78 - 0
recipes-devtools/clang/clang/0024-compiler-rt-Use-mcr-based-barrier-on-armv6.patch

@@ -0,0 +1,78 @@
+From 15b98f6759a7f27367c2450c4aebd894468dd8b8 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:49:26 +0800
+Subject: [PATCH 24/34] compiler-rt: Use mcr based barrier on armv6
+
+dsb is an armv7 instruction and wont work when we are building for armv6.
+
+Upstream-Status: Pending
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/lib/builtins/arm/sync-ops.h | 8 ++++----
+ compiler-rt/lib/builtins/assembly.h     | 8 ++++++++
+ 2 files changed, 12 insertions(+), 4 deletions(-)
+
+diff --git a/compiler-rt/lib/builtins/arm/sync-ops.h b/compiler-rt/lib/builtins/arm/sync-ops.h
+index c9623249e5d2..7a26170741ad 100644
+--- a/compiler-rt/lib/builtins/arm/sync-ops.h
++++ b/compiler-rt/lib/builtins/arm/sync-ops.h
+@@ -19,14 +19,14 @@
+   .thumb;                                                                      \
+   .syntax unified;                                                             \
+   DEFINE_COMPILERRT_THUMB_FUNCTION(__sync_fetch_and_##op)                      \
+-  dmb;                                                                         \
++  DMB;                                                                         \
+   mov r12, r0;                                                                 \
+   LOCAL_LABEL(tryatomic_##op) : ldrex r0, [r12];                               \
+   op(r2, r0, r1);                                                              \
+   strex r3, r2, [r12];                                                         \
+   cmp r3, #0;                                                                  \
+   bne LOCAL_LABEL(tryatomic_##op);                                             \
+-  dmb;                                                                         \
++  DMB;                                                                         \
+   bx lr
+ 
+ #define SYNC_OP_8(op)                                                          \
+@@ -35,14 +35,14 @@
+   .syntax unified;                                                             \
+   DEFINE_COMPILERRT_THUMB_FUNCTION(__sync_fetch_and_##op)                      \
+   push {r4, r5, r6, lr};                                                       \
+-  dmb;                                                                         \
++  DMB;                                                                         \
+   mov r12, r0;                                                                 \
+   LOCAL_LABEL(tryatomic_##op) : ldrexd r0, r1, [r12];                          \
+   op(r4, r5, r0, r1, r2, r3);                                                  \
+   strexd r6, r4, r5, [r12];                                                    \
+   cmp r6, #0;                                                                  \
+   bne LOCAL_LABEL(tryatomic_##op);                                             \
+-  dmb;                                                                         \
++  DMB;                                                                         \
+   pop { r4, r5, r6, pc }
+ 
+ #define MINMAX_4(rD, rN, rM, cmp_kind)                                         \
+diff --git a/compiler-rt/lib/builtins/assembly.h b/compiler-rt/lib/builtins/assembly.h
+index 9c015059af5a..aec4ff59beb7 100644
+--- a/compiler-rt/lib/builtins/assembly.h
++++ b/compiler-rt/lib/builtins/assembly.h
+@@ -183,6 +183,14 @@
+   JMP(ip)
+ #endif
+ 
++#if __ARM_ARCH >= 7
++#define DMB dmb
++#elif __ARM_ARCH >= 6
++#define DMB mcr p15, #0, r0, c7, c10, #5
++#else
++#error Only use this with ARMv6+
++#endif
++
+ #if defined(USE_THUMB_2)
+ #define WIDE(op) op.w
+ #else
+-- 
+2.33.1
+

+ 33 - 0
recipes-devtools/clang/clang/0025-clang-Switch-defaults-to-dwarf-5-debug-info-on-Linux.patch

@@ -0,0 +1,33 @@
+From 03f372d251a382df4d063d2f21b49b40ee42c7ff Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:50:47 +0800
+Subject: [PATCH 25/34] clang: Switch defaults to dwarf-5 debug info on Linux
+
+GCC 11 has defaulted to DWARF-5 as well, this matches
+debug info formats,  so mix and match of components with GCC 11
+works.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Linux.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/clang/lib/Driver/ToolChains/Linux.h b/clang/lib/Driver/ToolChains/Linux.h
+index 169a37c44072..f432d36c0d17 100644
+--- a/clang/lib/Driver/ToolChains/Linux.h
++++ b/clang/lib/Driver/ToolChains/Linux.h
+@@ -61,6 +61,8 @@ public:
+       const llvm::opt::ArgList &DriverArgs, const JobAction &JA,
+       const llvm::fltSemantics *FPType = nullptr) const override;
+ 
++  unsigned GetDefaultDwarfVersion() const override { return 5; }
++
+ protected:
+   Tool *buildAssembler() const override;
+   Tool *buildLinker() const override;
+-- 
+2.33.1
+

+ 74 - 0
recipes-devtools/clang/clang/0026-compiler-rt-Do-not-use-backtrace-APIs-on-non-glibc-l.patch

@@ -0,0 +1,74 @@
+From 3c6139afa9d15fac7ace71763c2d557e52e39510 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:53:27 +0800
+Subject: [PATCH 26/34] compiler-rt: Do not use backtrace APIs on non-glibc
+ linux
+
+musl e.g. does not provide backtrace APIs
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ .../lib/gwp_asan/optional/backtrace_linux_libc.cpp  | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp b/compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp
+index ea8e72be287d..0344074dd254 100644
+--- a/compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp
++++ b/compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp
+@@ -7,7 +7,9 @@
+ //===----------------------------------------------------------------------===//
+ 
+ #include <assert.h>
++#ifdef __GLIBC__
+ #include <execinfo.h>
++#endif
+ #include <stddef.h>
+ #include <stdint.h>
+ #include <stdlib.h>
+@@ -21,8 +23,11 @@
+ namespace {
+ size_t Backtrace(uintptr_t *TraceBuffer, size_t Size) {
+   static_assert(sizeof(uintptr_t) == sizeof(void *), "uintptr_t is not void*");
+-
++#ifdef __GLIBC__
+   return backtrace(reinterpret_cast<void **>(TraceBuffer), Size);
++#else
++  return -1;
++#endif
+ }
+ 
+ // We don't need any custom handling for the Segv backtrace - the libc unwinder
+@@ -30,7 +35,11 @@ size_t Backtrace(uintptr_t *TraceBuffer, size_t Size) {
+ // to avoid the additional frame.
+ GWP_ASAN_ALWAYS_INLINE size_t SegvBacktrace(uintptr_t *TraceBuffer, size_t Size,
+                                             void * /*Context*/) {
++#ifdef __GLIBC__
+   return Backtrace(TraceBuffer, Size);
++#else
++  return -1;
++#endif
+ }
+ 
+ static void PrintBacktrace(uintptr_t *Trace, size_t TraceLength,
+@@ -40,6 +49,7 @@ static void PrintBacktrace(uintptr_t *Trace, size_t TraceLength,
+     return;
+   }
+ 
++#ifdef __GLIBC__
+   char **BacktraceSymbols =
+       backtrace_symbols(reinterpret_cast<void **>(Trace), TraceLength);
+ 
+@@ -53,6 +63,7 @@ static void PrintBacktrace(uintptr_t *Trace, size_t TraceLength,
+   Printf("\n");
+   if (BacktraceSymbols)
+     free(BacktraceSymbols);
++#endif
+ }
+ } // anonymous namespace
+ 
+-- 
+2.33.1
+

+ 34 - 0
recipes-devtools/clang/clang/0027-clang-Fix-x86-triple-for-non-debian-multiarch-linux-.patch

@@ -0,0 +1,34 @@
+From 4d5267f96021615db4af1b8df4840d613df263ff Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:54:42 +0800
+Subject: [PATCH 27/34] clang: Fix x86 triple for non-debian multiarch linux
+ distros
+
+OpenEmbedded does not hardcode mutli-arch like debian therefore ensure
+that it still uses the proper tuple
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Linux.cpp | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/clang/lib/Driver/ToolChains/Linux.cpp b/clang/lib/Driver/ToolChains/Linux.cpp
+index abaab04c8266..aa2be27d8062 100644
+--- a/clang/lib/Driver/ToolChains/Linux.cpp
++++ b/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -623,6 +623,9 @@ void Linux::addLibStdCxxIncludePaths(const llvm::opt::ArgList &DriverArgs,
+       GCCInstallation.getTriple().getArch() == llvm::Triple::x86
+           ? "i386-linux-gnu"
+           : TripleStr;
++  // OpenEmbedded does not hardcode the triple to i386-linux-gnu like debian
++  if (GCCInstallation.getTriple().getVendor() == llvm::Triple::OpenEmbedded)
++	  DebianMultiarch = TripleStr;
+ 
+   // Try generic GCC detection first.
+   if (Generic_GCC::addGCCLibStdCxxIncludePaths(DriverArgs, CC1Args,
+-- 
+2.33.1
+

+ 35 - 0
recipes-devtools/clang/clang/0028-compiler-rt-Link-scudo-with-SANITIZER_CXX_ABI_LIBRAR.patch

@@ -0,0 +1,35 @@
+From fe6bb5b096ac5855495fceefb534808dc0295a4b Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:55:41 +0800
+Subject: [PATCH 28/34] compiler-rt: Link scudo with
+ SANITIZER_CXX_ABI_LIBRARIES
+
+If SANITIZER_CXX_ABI_LIBRARIES is set then link scudo with it, this
+fixes build time errors like
+
+projects/compiler-rt/lib/sanitizer_common/CMakeFiles/RTSanitizerCommonLibc.armhf.dir/sanitizer_posix_libcdep.cpp.o: in function `__sanitizer::UnsetAlternateSignalStack()':
+| sanitizer_posix_libcdep.cpp:(.text+0x3d2): undefined reference to `__cxa_guard_acquire'
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/lib/scudo/CMakeLists.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/compiler-rt/lib/scudo/CMakeLists.txt b/compiler-rt/lib/scudo/CMakeLists.txt
+index 995e853e2a4d..25b79a8d17e8 100644
+--- a/compiler-rt/lib/scudo/CMakeLists.txt
++++ b/compiler-rt/lib/scudo/CMakeLists.txt
+@@ -15,6 +15,7 @@ append_list_if(COMPILER_RT_HAS_LIBDL dl SCUDO_MINIMAL_DYNAMIC_LIBS)
+ append_list_if(COMPILER_RT_HAS_LIBRT rt SCUDO_MINIMAL_DYNAMIC_LIBS)
+ append_list_if(COMPILER_RT_HAS_LIBPTHREAD pthread SCUDO_MINIMAL_DYNAMIC_LIBS)
+ append_list_if(COMPILER_RT_HAS_LIBLOG log SCUDO_MINIMAL_DYNAMIC_LIBS)
++append_list_if(SANITIZER_CXX_ABI_LIBRARIES ${SANITIZER_CXX_ABI_LIBRARIES} SCUDO_MINIMAL_DYNAMIC_LIBS)
+ append_list_if(COMPILER_RT_HAS_OMIT_FRAME_POINTER_FLAG -fno-omit-frame-pointer
+                SCUDO_CFLAGS)
+ 
+-- 
+2.33.1
+

+ 35 - 0
recipes-devtools/clang/clang/0029-compiler-rt-Link-scudo-standalone-with-libatomic-on-.patch

@@ -0,0 +1,35 @@
+From 8a90723b07823ee86223da375f0e31740d6747eb Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:56:37 +0800
+Subject: [PATCH 29/34] compiler-rt: Link scudo standalone with libatomic on
+ mips
+
+clang on mips generate atomic built-ins which should be provided by
+libatomic
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/lib/scudo/standalone/CMakeLists.txt | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/compiler-rt/lib/scudo/standalone/CMakeLists.txt b/compiler-rt/lib/scudo/standalone/CMakeLists.txt
+index 739f131bdefd..5862545b842b 100644
+--- a/compiler-rt/lib/scudo/standalone/CMakeLists.txt
++++ b/compiler-rt/lib/scudo/standalone/CMakeLists.txt
+@@ -137,6 +137,10 @@ append_list_if(COMPILER_RT_HAS_LIBPTHREAD -pthread SCUDO_LINK_FLAGS)
+ 
+ append_list_if(FUCHSIA zircon SCUDO_LINK_LIBS)
+ 
++if (CMAKE_SYSTEM_PROCESSOR MATCHES "mips" AND CMAKE_SYSTEM_NAME MATCHES "Linux")
++    list(APPEND SCUDO_LINK_LIBS atomic)
++endif()
++
+ if(COMPILER_RT_HAS_SCUDO_STANDALONE)
+   add_compiler_rt_object_libraries(RTScudoStandalone
+     ARCHS ${SCUDO_STANDALONE_SUPPORTED_ARCH}
+-- 
+2.33.1
+

+ 61 - 0
recipes-devtools/clang/clang/0030-libunwind-Added-unw_backtrace-method.patch

@@ -0,0 +1,61 @@
+From 9a405fbda01e40e18677207c7bbf32a549b0b32d Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:58:30 +0800
+Subject: [PATCH 30/34] libunwind: Added unw_backtrace method
+
+Source: https://github.com/ClickHouse-Extras/libunwind/commit/52f0f7861926cbfaef7e6c97d8a6d7ba2a1f6747#diff-a82fc885e2e4facf4b92d26171c13aa4aa5db296f77e1158ba2f8664e3bd1f5c
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ libunwind/include/libunwind.h |  1 +
+ libunwind/src/libunwind.cpp   | 18 ++++++++++++++++++
+ 2 files changed, 19 insertions(+)
+
+diff --git a/libunwind/include/libunwind.h b/libunwind/include/libunwind.h
+index 5ba63e5b7e5b..c49172f87362 100644
+--- a/libunwind/include/libunwind.h
++++ b/libunwind/include/libunwind.h
+@@ -127,6 +127,7 @@ extern int unw_is_fpreg(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
+ extern int unw_is_signal_frame(unw_cursor_t *) LIBUNWIND_AVAIL;
+ extern int unw_get_proc_name(unw_cursor_t *, char *, size_t, unw_word_t *) LIBUNWIND_AVAIL;
+ //extern int       unw_get_save_loc(unw_cursor_t*, int, unw_save_loc_t*);
++extern int unw_backtrace(void **, int) LIBUNWIND_AVAIL;
+ 
+ extern unw_addr_space_t unw_local_addr_space;
+ 
+diff --git a/libunwind/src/libunwind.cpp b/libunwind/src/libunwind.cpp
+index 93e1bc131f0c..7ae1a10092ab 100644
+--- a/libunwind/src/libunwind.cpp
++++ b/libunwind/src/libunwind.cpp
+@@ -295,7 +295,25 @@ void __unw_remove_dynamic_fde(unw_word_t fde) {
+ #endif // defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
+ #endif // !defined(__USING_SJLJ_EXCEPTIONS__)
+ 
++int unw_backtrace(void **buffer, int size) {
++  unw_context_t context;
++  unw_cursor_t cursor;
++  if (unw_getcontext(&context) || unw_init_local(&cursor, &context)) {
++    return 0;
++  }
++
++  unw_word_t ip;
++  int current = 0;
++  while (unw_step(&cursor) > 0) {
++    if (current >= size || unw_get_reg(&cursor, UNW_REG_IP, &ip)) {
++      break;
++    }
+ 
++    buffer[current++] = reinterpret_cast<void *>(static_cast<uintptr_t>(ip));
++  }
++
++  return current;
++}
+ 
+ // Add logging hooks in Debug builds only
+ #ifndef NDEBUG
+-- 
+2.33.1
+

+ 41 - 0
recipes-devtools/clang/clang/0031-compiler-rt-Use-uintptr_t-instead-of-_Unwind_Word.patch

@@ -0,0 +1,41 @@
+From 978029dc7aabc1bda62f4c9c9c4633c2d147a491 Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 10:59:58 +0800
+Subject: [PATCH 31/34] compiler-rt: Use uintptr_t instead of _Unwind_Word
+
+_Unwind_Word is defined in compiler specific unwind.h but not in
+libunwind provided unwind.h header, it works in most cases because
+compilers search compiler headers ahead of system headers but for some
+systems e.g. musl bases systems the compiler provided versions are not
+preferred over system headers and therefore relying on _Unwind_Word
+means its expecting this define in all unwind.h headers which is not the
+case, using uintptr_t means we don't need this from unwind.h
+
+See https://reviews.llvm.org/D65699
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/lib/hwasan/hwasan_exceptions.cpp | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/compiler-rt/lib/hwasan/hwasan_exceptions.cpp b/compiler-rt/lib/hwasan/hwasan_exceptions.cpp
+index 169e7876cb58..6ed1da335428 100644
+--- a/compiler-rt/lib/hwasan/hwasan_exceptions.cpp
++++ b/compiler-rt/lib/hwasan/hwasan_exceptions.cpp
+@@ -29,8 +29,8 @@ typedef _Unwind_Reason_Code PersonalityFn(int version, _Unwind_Action actions,
+ // is statically linked and the sanitizer runtime and the program are linked
+ // against different unwinders. The _Unwind_Context data structure is opaque so
+ // it may be incompatible between unwinders.
+-typedef _Unwind_Word GetGRFn(_Unwind_Context* context, int index);
+-typedef _Unwind_Word GetCFAFn(_Unwind_Context* context);
++typedef uintptr_t GetGRFn(_Unwind_Context* context, int index);
++typedef uintptr_t GetCFAFn(_Unwind_Context* context);
+ 
+ extern "C" SANITIZER_INTERFACE_ATTRIBUTE _Unwind_Reason_Code
+ __hwasan_personality_wrapper(int version, _Unwind_Action actions,
+-- 
+2.33.1
+

+ 52 - 0
recipes-devtools/clang/clang/0032-compiler-rt-Do-not-force-thumb-mode-directive.patch

@@ -0,0 +1,52 @@
+From d42554b552128fad6ffe80ee72b0f1b6dc2cbccd Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 11:01:27 +0800
+Subject: [PATCH 32/34] compiler-rt: Do not force thumb mode directive
+
+.thumb_func was not switching mode until [1]
+so it did not show up but now that .thumb_func (without argument) is
+switching mode, its causing build failures on armv6 ( rpi0 ) even when
+build is explicitly asking for this file to be built with -marm (ARM
+mode), therefore use DEFINE_COMPILERRT_FUNCTION macro to add function
+header which considers arch and mode from compiler cmdline to decide if
+the function is built using thumb mode or arm mode.
+
+[1] https://reviews.llvm.org/D101975
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ compiler-rt/lib/builtins/arm/sync-ops.h | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/compiler-rt/lib/builtins/arm/sync-ops.h b/compiler-rt/lib/builtins/arm/sync-ops.h
+index 7a26170741ad..d914f9d3a109 100644
+--- a/compiler-rt/lib/builtins/arm/sync-ops.h
++++ b/compiler-rt/lib/builtins/arm/sync-ops.h
+@@ -16,9 +16,8 @@
+ 
+ #define SYNC_OP_4(op)                                                          \
+   .p2align 2;                                                                  \
+-  .thumb;                                                                      \
+   .syntax unified;                                                             \
+-  DEFINE_COMPILERRT_THUMB_FUNCTION(__sync_fetch_and_##op)                      \
++  DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_##op)                            \
+   DMB;                                                                         \
+   mov r12, r0;                                                                 \
+   LOCAL_LABEL(tryatomic_##op) : ldrex r0, [r12];                               \
+@@ -31,9 +30,8 @@
+ 
+ #define SYNC_OP_8(op)                                                          \
+   .p2align 2;                                                                  \
+-  .thumb;                                                                      \
+   .syntax unified;                                                             \
+-  DEFINE_COMPILERRT_THUMB_FUNCTION(__sync_fetch_and_##op)                      \
++  DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_##op)                            \
+   push {r4, r5, r6, lr};                                                       \
+   DMB;                                                                         \
+   mov r12, r0;                                                                 \
+-- 
+2.33.1
+

+ 37 - 0
recipes-devtools/clang/clang/0033-clang-Do-not-use-install-relative-libc-headers.patch

@@ -0,0 +1,37 @@
+From 21cdaa9e3e8ec001d3f2de9a6e1e142c1b67066a Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 11:07:52 +0800
+Subject: [PATCH 33/34] clang: Do not use install relative libc++ headers
+
+In OE we use same clang for native and cross builds, therefore we need
+to ensure that native sysroot install of libc++ is not searched for
+headers when doing cross compile instead it searches the target sysroot
+this is especially troublesome when libcxx-native is staged along with
+libcxx e.g. chromium
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Gnu.cpp | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp
+index e6f440902e97..fc65d92e8ea0 100644
+--- a/clang/lib/Driver/ToolChains/Gnu.cpp
++++ b/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -2934,7 +2934,9 @@ Generic_GCC::addLibCxxIncludePaths(const llvm::opt::ArgList &DriverArgs,
+ 
+   // Android never uses the libc++ headers installed alongside the toolchain,
+   // which are generally incompatible with the NDK libraries anyway.
+-  if (!getTriple().isAndroid())
++  // And also do not add it when --sysroot is specified, since it would expect
++  // libc++ headers from sysroot
++  if (!getTriple().isAndroid() && SysRoot.empty())
+     if (AddIncludePath(getDriver().Dir + "/../include"))
+       return;
+   // If this is a development, non-installed, clang, libcxx will
+-- 
+2.33.1
+

+ 90 - 0
recipes-devtools/clang/clang/0034-clang-Fix-how-driver-finds-GCC-installation-path-on.patch

@@ -0,0 +1,90 @@
+From 515de929ba778d5d3b47448647ce5d33f873ea6d Mon Sep 17 00:00:00 2001
+From: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+Date: Tue, 9 Nov 2021 11:10:42 +0800
+Subject: [PATCH 34/34] clang: Fix how driver finds GCC installation path on 
+ OpenEmbedded
+
+Fix how Clang Driver finds GCC installation path on OpenEmbedded
+
+- For RISCV (riscv{32,64}) we define new two multi-lib options without any
+  subdirectories (e.g., lib32/ilp32d or lib64/lp64d). OpenEmbedded GCC
+  builds don't use them.
+- Modify how Clang Driver finds GCC installation path. This is important
+  because GCC files on OpenEmbedded are in two different directories:
+   (1) /usr/bin/../lib/gcc/riscv64-oe-linux/9.2.0
+   (2) /usr/lib/riscv64-oe-linux/9.2.0
+
+Clang Driver will check (1) first. The directory exist, but will produce
+no valid multi-libs and there will be no multi-lib selected. (2) contains
+actual GCC run-time objects/libraries, but because the path has exact
+same GCC version (9.2.0) it will be skipped.
+
+We modify the approach by allowing to check other directories with the same
+GCC version. We also avoid picking GCC installation path if it results in
+an empty multi-lib list.
+
+Rebased to LLVM 14.0.0 by Jun Yuan Tan
+
+Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
+---
+ clang/lib/Driver/ToolChains/Gnu.cpp | 33 +++++++++++++++++++----------
+ 1 file changed, 22 insertions(+), 11 deletions(-)
+
+diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp b/clang/lib/Driver/ToolChains/Gnu.cpp
+index fc65d92e8ea0..fc99318e757d 100644
+--- a/clang/lib/Driver/ToolChains/Gnu.cpp
++++ b/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -1652,18 +1652,29 @@ static void findRISCVMultilibs(const Driver &D,
+     return findRISCVBareMetalMultilibs(D, TargetTriple, Path, Args, Result);
+ 
+   FilterNonExistent NonExistent(Path, "/crtbegin.o", D.getVFS());
+-  Multilib Ilp32 = makeMultilib("lib32/ilp32").flag("+m32").flag("+mabi=ilp32");
+-  Multilib Ilp32f =
++  MultilibSet RISCVMultilibs;
++
++  if (TargetTriple.getVendor() == llvm::Triple::OpenEmbedded) {
++    Multilib OpenEmbeddedIlp32d = makeMultilib("").flag("+m32").flag("+mabi=ilp32d");
++    Multilib OpenEmbeddedLp64d = makeMultilib("").flag("+m64").flag("+mabi=lp64d");
++    RISCVMultilibs =
++        MultilibSet()
++            .Either({OpenEmbeddedIlp32d, OpenEmbeddedLp64d})
++            .FilterOut(NonExistent);
++  } else {
++    Multilib Ilp32 = makeMultilib("lib32/ilp32").flag("+m32").flag("+mabi=ilp32");
++    Multilib Ilp32f =
+       makeMultilib("lib32/ilp32f").flag("+m32").flag("+mabi=ilp32f");
+-  Multilib Ilp32d =
++    Multilib Ilp32d =
+       makeMultilib("lib32/ilp32d").flag("+m32").flag("+mabi=ilp32d");
+-  Multilib Lp64 = makeMultilib("lib64/lp64").flag("+m64").flag("+mabi=lp64");
+-  Multilib Lp64f = makeMultilib("lib64/lp64f").flag("+m64").flag("+mabi=lp64f");
+-  Multilib Lp64d = makeMultilib("lib64/lp64d").flag("+m64").flag("+mabi=lp64d");
+-  MultilibSet RISCVMultilibs =
+-      MultilibSet()
+-          .Either({Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d})
+-          .FilterOut(NonExistent);
++    Multilib Lp64 = makeMultilib("lib64/lp64").flag("+m64").flag("+mabi=lp64");
++    Multilib Lp64f = makeMultilib("lib64/lp64f").flag("+m64").flag("+mabi=lp64f");
++    Multilib Lp64d = makeMultilib("lib64/lp64d").flag("+m64").flag("+mabi=lp64d");
++    RISCVMultilibs =
++        MultilibSet()
++            .Either({Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d})
++            .FilterOut(NonExistent);
++  }
+ 
+   Multilib::flags_list Flags;
+   bool IsRV64 = TargetTriple.getArch() == llvm::Triple::riscv64;
+@@ -2566,7 +2577,7 @@ void Generic_GCC::GCCInstallationDetector::ScanLibDirForGCCTriple(
+           continue; // Saw this path before; no need to look at it again.
+       if (CandidateVersion.isOlderThan(4, 1, 1))
+         continue;
+-      if (CandidateVersion <= Version)
++      if (CandidateVersion < Version)
+         continue;
+ 
+       if (!ScanGCCForMultilibs(TargetTriple, Args, LI->path(),
+-- 
+2.33.1
+

+ 9 - 0
recipes-devtools/clang/clang/libunwind.pc.in

@@ -0,0 +1,9 @@
+prefix=/usr
+exec_prefix=/usr
+libdir=@LIBDIR@
+includedir=/usr/include
+
+Name: libunwind
+Description: libunwind base library
+Version: @VERSION@
+Libs: -lunwind

+ 44 - 0
recipes-devtools/clang/clang/llvm-config

@@ -0,0 +1,44 @@
+#!/bin/bash
+#
+# Wrapper script for llvm-config. Supplies the right environment variables
+# for the target and delegates to the native llvm-config for anything else. This
+# is needed because arguments like --ldflags, --cxxflags, etc. are set by the
+# native compile rather than the target compile.
+#
+
+SCRIPT_DIR="$(dirname "$(readlink -f "$0")")"
+NEXT_LLVM_CONFIG="$(which -a llvm-config | sed -n 2p)"
+export YOCTO_ALTERNATE_EXE_PATH="$(readlink -f "$SCRIPT_DIR/../llvm-config")"
+
+if [[ $# == 0 ]]; then
+  exec "$NEXT_LLVM_CONFIG"
+fi
+
+if [[ $1 == "--libs" ]]; then
+  exec "$NEXT_LLVM_CONFIG" $@
+fi
+
+if [[ $1 == "--bindir" ]]; then
+  unset YOCTO_ALTERNATE_EXE_PATH
+  exec "$NEXT_LLVM_CONFIG" $@
+fi
+
+for arg in "$@"; do
+  case "$arg" in
+    --cppflags)
+      echo $TARGET_CPPFLAGS
+      ;;
+    --cflags)
+      echo $TARGET_CFLAGS
+      ;;
+    --cxxflags)
+      echo $TARGET_CXXFLAGS
+      ;;
+    --ldflags)
+      echo $TARGET_LDFLAGS
+      ;;
+    *)
+      echo "$("$NEXT_LLVM_CONFIG" "$arg")"
+      ;;
+  esac
+done

+ 7 - 0
recipes-devtools/clang/clang_git.bbappend

@@ -0,0 +1,7 @@
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"
+
+LDFLAGS:remove:class-nativesdk = "-fuse-ld=lld"
+
+FILES:${PN} += "${libdir}/*"

+ 11 - 0
recipes-devtools/clang/compiler-rt_git.bbappend

@@ -0,0 +1,11 @@
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"
+
+FILES:${PN} += "${libdir}/*"
+
+do_install:append(){
+	mkdir -p ${D}${nonarch_libdir}/clang/14.0.0/lib/linux
+        mv ${D}${nonarch_libdir}/clang/14.0.0/lib/riscv64-oe-linux/libclang_rt.builtins.a ${D}${nonarch_libdir}/clang/14.0.0/lib/linux/libclang_rt.builtins-riscv64.a
+        rm -rf ${D}${nonarch_libdir}/clang/14.0.0/lib/riscv64-oe-linux
+}

+ 8 - 0
recipes-devtools/clang/libcxx_git.bbappend

@@ -0,0 +1,8 @@
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"
+
+FILES:${PN} += "${libdir}/*"
+
+FILES:${PN}-staticdev += "${nonarch_libdir}/*/*.a"
+FILES:${PN}-dev += "${nonarch_libdir}/*/*.so \"

+ 50 - 0
recipes-devtools/clang/llvm-project-source.bbappend

@@ -0,0 +1,50 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/clang:"
+
+MAJOR_VER = "14"
+MINOR_VER = "0"
+PATCH_VER = "0"
+
+SRCREV = "afab3c488f0c86af87e262cc7454e04de18e3e6a"
+BRANCH = "main"
+
+SRC_URI = "\
+    ${BASEURI} \
+    file://llvm-config \
+    file://libunwind.pc.in \
+    file://0001-Merge-B-instruction-from-0p94-to-1.0.patch \
+    file://0002-update-B-instruction-to-1.0-and-Merge-four-Custom-CS.patch \
+    file://0003-add-pref-instruction.patch \
+    file://0001-lldb-Add-lxml2-to-linker-cmdline-of-xml-is-found.patch \
+    file://0002-libcxxabi-Find-libunwind-headers-when.patch \
+    file://0004-llvm-TargetLibraryInfo-Undefine-libc-functions-if-th.patch \
+    file://0005-llvm-allow-env-override-of-exe-path.patch \
+    file://0006-clang-driver-Check-sysroot-for-ldso-path.patch \
+    file://0007-clang-Driver-tools.cpp-Add-lssp_nonshared-on-musl.patch \
+    file://0008-clang-musl-ppc-does-not-support-128-bit-long-double.patch \
+    file://0009-clang-Prepend-trailing-to-sysroot.patch \
+    file://0010-clang-Look-inside-the-target-sysroot-for-compiler-ru.patch \
+    file://0011-clang-Define-releative-gcc-installation-dir.patch \
+    file://0012-clang-Add-lpthread-and-ldl-along-with-lunwind-for-st.patch \
+    file://0013-Pass-PYTHON_EXECUTABLE-when-cross-compiling-for-nati.patch \
+    file://0014-Check-for-atomic-double-intrinsics.patch \
+    file://0015-libcxx-Add-compiler-runtime-library-to-link-step-for.patch \
+    file://0016-clang-llvm-cmake-Fix-configure-for-packages-using.patch \
+    file://0017-clang-Fix-resource-dir-location-for-cross-toolchains.patch \
+    file://0018-fix-path-to-libffi.patch \
+    file://0019-clang-driver-Add-dyld-prefix-when-checking-sysroot-f.patch \
+    file://0020-clang-Use-python3-in-python-scripts.patch \
+    file://0021-For-x86_64-set-Yocto-based-GCC-install-search-path.patch \
+    file://0022-llvm-Do-not-use-find_library-for-ncurses.patch \
+    file://0023-llvm-Insert-anchor-for-adding-OE-distro-vendor-names.patch \
+    file://0024-compiler-rt-Use-mcr-based-barrier-on-armv6.patch \
+    file://0025-clang-Switch-defaults-to-dwarf-5-debug-info-on-Linux.patch \
+    file://0026-compiler-rt-Do-not-use-backtrace-APIs-on-non-glibc-l.patch \
+    file://0027-clang-Fix-x86-triple-for-non-debian-multiarch-linux-.patch \
+    file://0028-compiler-rt-Link-scudo-with-SANITIZER_CXX_ABI_LIBRAR.patch \
+    file://0029-compiler-rt-Link-scudo-standalone-with-libatomic-on-.patch \
+    file://0030-libunwind-Added-unw_backtrace-method.patch \
+    file://0031-compiler-rt-Use-uintptr_t-instead-of-_Unwind_Word.patch \
+    file://0032-compiler-rt-Do-not-force-thumb-mode-directive.patch \
+    file://0033-clang-Do-not-use-install-relative-libc-headers.patch \
+    file://0034-clang-Fix-how-driver-finds-GCC-installation-path-on.patch \
+    "

+ 31 - 0
recipes-devtools/llvm/llvm/0001-AsmMatcherEmitter-sort-ClassInfo-lists-by-name-as-we.patch

@@ -0,0 +1,31 @@
+From 86940d87026432683fb6741cd8a34d3b9b18e40d Mon Sep 17 00:00:00 2001
+From: Alexander Kanavin <alex.kanavin@gmail.com>
+Date: Fri, 27 Nov 2020 10:11:08 +0000
+Subject: [PATCH] AsmMatcherEmitter: sort ClassInfo lists by name as well
+
+Otherwise, there are instances which are identical in
+every other field and therefore sort non-reproducibly
+(which breaks binary and source reproducibiliy).
+
+Upstream-Status: Submitted [https://reviews.llvm.org/D97477]
+Signed-off-by: Alexander Kanavin <alex.kanavin@gmail.com>
+---
+ llvm/utils/TableGen/AsmMatcherEmitter.cpp | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+index ccf0959389b..1f801e83b7d 100644
+--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
++++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+@@ -359,7 +359,10 @@ public:
+     // name of a class shouldn't be significant. However, some of the backends
+     // accidentally rely on this behaviour, so it will have to stay like this
+     // until they are fixed.
+-    return ValueName < RHS.ValueName;
++    if (ValueName != RHS.ValueName)
++        return ValueName < RHS.ValueName;
++    // All else being equal, we should sort by name, for source and binary reproducibility
++    return Name < RHS.Name;
+   }
+ };
+ 

+ 90 - 0
recipes-devtools/llvm/llvm/0006-llvm-TargetLibraryInfo-Undefine-libc-functions-if-th.patch

@@ -0,0 +1,90 @@
+Upstream-Status: Pending
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+
+From dbeecdb307be8b783b42cbc89dcb9c5e7f528989 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sat, 21 May 2016 00:33:20 +0000
+Subject: [PATCH] llvm: TargetLibraryInfo: Undefine libc functions if they are macros
+
+musl defines some functions as macros and not inline functions
+if this is the case then make sure to undefine them
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ .../llvm/Analysis/TargetLibraryInfo.def       | 21 +++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/llvm/include/llvm/Analysis/TargetLibraryInfo.def b/llvm/include/llvm/Analysis/TargetLibraryInfo.def
+index afed404f04c..876888656f2 100644
+--- a/llvm/include/llvm/Analysis/TargetLibraryInfo.def
++++ b/llvm/include/llvm/Analysis/TargetLibraryInfo.def
+@@ -782,6 +782,9 @@ TLI_DEFINE_STRING_INTERNAL("fmodl")
+ TLI_DEFINE_ENUM_INTERNAL(fopen)
+ TLI_DEFINE_STRING_INTERNAL("fopen")
+ /// FILE *fopen64(const char *filename, const char *opentype)
++#ifdef fopen64
++#undef fopen64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(fopen64)
+ TLI_DEFINE_STRING_INTERNAL("fopen64")
+ /// int fork();
+@@ -829,6 +832,9 @@ TLI_DEFINE_STRING_INTERNAL("fseek")
+ /// int fseeko(FILE *stream, off_t offset, int whence);
+ TLI_DEFINE_ENUM_INTERNAL(fseeko)
+ TLI_DEFINE_STRING_INTERNAL("fseeko")
++#ifdef fseeko64
++#undef fseeko64
++#endif
+ /// int fseeko64(FILE *stream, off64_t offset, int whence)
+ TLI_DEFINE_ENUM_INTERNAL(fseeko64)
+ TLI_DEFINE_STRING_INTERNAL("fseeko64")
+@@ -839,6 +845,9 @@ TLI_DEFINE_STRING_INTERNAL("fsetpos")
+ TLI_DEFINE_ENUM_INTERNAL(fstat)
+ TLI_DEFINE_STRING_INTERNAL("fstat")
+ /// int fstat64(int filedes, struct stat64 *buf)
++#ifdef fstat64
++#undef fstat64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(fstat64)
+ TLI_DEFINE_STRING_INTERNAL("fstat64")
+ /// int fstatvfs(int fildes, struct statvfs *buf);
+@@ -854,6 +863,9 @@ TLI_DEFINE_STRING_INTERNAL("ftell")
+ TLI_DEFINE_ENUM_INTERNAL(ftello)
+ TLI_DEFINE_STRING_INTERNAL("ftello")
+ /// off64_t ftello64(FILE *stream)
++#ifdef ftello64
++#undef ftello64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(ftello64)
+ TLI_DEFINE_STRING_INTERNAL("ftello64")
+ /// int ftrylockfile(FILE *file);
+@@ -980,6 +992,9 @@ TLI_DEFINE_STRING_INTERNAL("logl")
+ TLI_DEFINE_ENUM_INTERNAL(lstat)
+ TLI_DEFINE_STRING_INTERNAL("lstat")
+ /// int lstat64(const char *path, struct stat64 *buf);
++#ifdef lstat64
++#undef lstat64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(lstat64)
+ TLI_DEFINE_STRING_INTERNAL("lstat64")
+ /// void *malloc(size_t size);
+@@ -1205,6 +1220,9 @@ TLI_DEFINE_STRING_INTERNAL("sscanf")
+ TLI_DEFINE_ENUM_INTERNAL(stat)
+ TLI_DEFINE_STRING_INTERNAL("stat")
+ /// int stat64(const char *path, struct stat64 *buf);
++#ifdef stat64
++#undef stat64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(stat64)
+ TLI_DEFINE_STRING_INTERNAL("stat64")
+ /// int statvfs(const char *path, struct statvfs *buf);
+@@ -1340,6 +1358,9 @@ TLI_DEFINE_STRING_INTERNAL("times")
+ TLI_DEFINE_ENUM_INTERNAL(tmpfile)
+ TLI_DEFINE_STRING_INTERNAL("tmpfile")
+ /// FILE *tmpfile64(void)
++#ifdef tmpfile64
++#undef tmpfile64
++#endif
+ TLI_DEFINE_ENUM_INTERNAL(tmpfile64)
+ TLI_DEFINE_STRING_INTERNAL("tmpfile64")
+ /// int toascii(int c);

+ 37 - 0
recipes-devtools/llvm/llvm/0007-llvm-allow-env-override-of-exe-path.patch

@@ -0,0 +1,37 @@
+Upstream-Status: Pending
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+
+From 61b00e1e051e367f5483d7b5253b6c85a9e8a90f Mon Sep 17 00:00:00 2001
+From: Martin Kelly <mkelly@xevo.com>
+Date: Fri, 19 May 2017 00:22:57 -0700
+Subject: [PATCH] llvm: allow env override of exe path
+
+When using a native llvm-config from inside a sysroot, we need llvm-config to
+return the libraries, include directories, etc. from inside the sysroot rather
+than from the native sysroot. Thus provide an env override for calling
+llvm-config from a target sysroot.
+
+Signed-off-by: Martin Kelly <mkelly@xevo.com>
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ llvm/tools/llvm-config/llvm-config.cpp | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/llvm/tools/llvm-config/llvm-config.cpp b/llvm/tools/llvm-config/llvm-config.cpp
+index 7ef7c46a262..a4f7ed82c7b 100644
+--- a/llvm/tools/llvm-config/llvm-config.cpp
++++ b/llvm/tools/llvm-config/llvm-config.cpp
+@@ -225,6 +225,13 @@ Typical components:\n\
+ 
+ /// Compute the path to the main executable.
+ std::string GetExecutablePath(const char *Argv0) {
++  // Hack for Yocto: we need to override the root path when we are using
++  // llvm-config from within a target sysroot.
++  const char *Sysroot = std::getenv("YOCTO_ALTERNATE_EXE_PATH");
++  if (Sysroot != nullptr) {
++    return Sysroot;
++  }
++
+   // This just needs to be some symbol in the binary; C++ doesn't
+   // allow taking the address of ::main however.
+   void *P = (void *)(intptr_t)GetExecutablePath;

+ 190 - 0
recipes-devtools/llvm/llvm_git.bb

@@ -0,0 +1,190 @@
+# Copyright (C) 2017 Khem Raj <raj.khem@gmail.com>
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+DESCRIPTION = "The LLVM Compiler Infrastructure"
+HOMEPAGE = "http://llvm.org"
+LICENSE = "Apache-2.0-with-LLVM-exception"
+SECTION = "devel"
+
+LIC_FILES_CHKSUM = "file://LICENSE.TXT;md5=8a15a0759ef07f2682d2ba4b893c9afe"
+
+DEPENDS = "libffi libxml2 zlib libedit ninja-native llvm-native"
+
+RDEPENDS:${PN}:append:class-target = " ncurses-terminfo"
+
+inherit cmake pkgconfig
+
+PROVIDES += "llvm${PV}"
+
+PV = "14.0.0"
+
+MAJOR_VERSION = "${@oe.utils.trim_version("${PV}", 1)}"
+
+LLVM_RELEASE = "${PV}"
+LLVM_DIR = "llvm${LLVM_RELEASE}"
+
+FILES:${PN}:class-nativesdk += "/usr/local/oe-sdk-hardcoded-buildpath/sysroots/x86_64-oesdk-linux/usr/lib/llvm14.0.0/libLLVM-14git.so \
+  /usr/local/oe-sdk-hardcoded-buildpath/sysroots/x86_64-oesdk-linux/usr/lib/llvm14.0.0/libLLVM-14.0.0git.so \
+  /usr/local/oe-sdk-hardcoded-buildpath/sysroots/x86_64-oesdk-linux/usr/bin/llvm14.0.0/* \
+  "
+
+BRANCH = "main"
+SRCREV = "afab3c488f0c86af87e262cc7454e04de18e3e6a"
+SRC_URI = "git://github.com/llvm/llvm-project.git;branch=${BRANCH};protocol=https \
+           file://0006-llvm-TargetLibraryInfo-Undefine-libc-functions-if-th.patch;striplevel=2 \
+           file://0007-llvm-allow-env-override-of-exe-path.patch;striplevel=2 \
+           file://0001-AsmMatcherEmitter-sort-ClassInfo-lists-by-name-as-we.patch;striplevel=2 \
+           "
+
+UPSTREAM_CHECK_GITTAGREGEX = "llvmorg-(?P<pver>\d+(\.\d+)+)"
+
+S = "${WORKDIR}/git/llvm"
+
+LLVM_INSTALL_DIR = "${WORKDIR}/llvm-install"
+
+def get_llvm_arch(bb, d, arch_var):
+    import re
+    a = d.getVar(arch_var)
+    if   re.match(r'(i.86|athlon|x86.64)$', a):         return 'X86'
+    elif re.match(r'arm$', a):                          return 'ARM'
+    elif re.match(r'armeb$', a):                        return 'ARM'
+    elif re.match(r'aarch64$', a):                      return 'AArch64'
+    elif re.match(r'aarch64_be$', a):                   return 'AArch64'
+    elif re.match(r'mips(isa|)(32|64|)(r6|)(el|)$', a): return 'Mips'
+    elif re.match(r'riscv(32|64)(eb|)$', a):            return 'RISCV'
+    elif re.match(r'p(pc|owerpc)(|64)', a):             return 'PowerPC'
+    else:
+        raise bb.parse.SkipRecipe("Cannot map '%s' to a supported LLVM architecture" % a)
+
+def get_llvm_host_arch(bb, d):
+    return get_llvm_arch(bb, d, 'HOST_ARCH')
+
+#
+# Default to build all OE-Core supported target arches (user overridable).
+#
+LLVM_TARGETS ?= "AMDGPU;${@get_llvm_host_arch(bb, d)}"
+
+ARM_INSTRUCTION_SET:armv5 = "arm"
+ARM_INSTRUCTION_SET:armv4t = "arm"
+
+EXTRA_OECMAKE += "-DLLVM_ENABLE_ASSERTIONS=OFF \
+                  -DLLVM_ENABLE_EXPENSIVE_CHECKS=OFF \
+                  -DLLVM_ENABLE_PIC=ON \
+                  -DLLVM_BINDINGS_LIST='' \
+                  -DLLVM_LINK_LLVM_DYLIB=ON \
+                  -DLLVM_ENABLE_FFI=ON \
+                  -DLLVM_ENABLE_RTTI=ON \
+                  -DFFI_INCLUDE_DIR=$(pkg-config --variable=includedir libffi) \
+                  -DLLVM_OPTIMIZED_TABLEGEN=ON \
+                  -DLLVM_TARGETS_TO_BUILD='${LLVM_TARGETS}' \
+                  -DLLVM_TEMPORARILY_ALLOW_OLD_TOOLCHAIN=ON \
+                  -DPYTHON_EXECUTABLE=${HOSTTOOLS_DIR}/python3 \
+                  -G Ninja"
+
+EXTRA_OECMAKE:append:class-target = "\
+                  -DCMAKE_CROSSCOMPILING:BOOL=ON \
+                  -DLLVM_TABLEGEN=${STAGING_BINDIR_NATIVE}/llvm-tblgen${PV} \
+                  -DLLVM_CONFIG_PATH=${STAGING_BINDIR_NATIVE}/llvm-config${PV} \
+                 "
+
+EXTRA_OECMAKE:append:class-nativesdk = "\
+                  -DCMAKE_CROSSCOMPILING:BOOL=ON \
+                  -DLLVM_TABLEGEN=${STAGING_BINDIR_NATIVE}/llvm-tblgen${PV} \
+                  -DLLVM_CONFIG_PATH=${STAGING_BINDIR_NATIVE}/llvm-config${PV} \
+                 "
+
+do_configure:prepend() {
+# Fix paths in llvm-config
+	sed -i "s|sys::path::parent_path(CurrentPath))\.str()|sys::path::parent_path(sys::path::parent_path(CurrentPath))).str()|g" ${S}/tools/llvm-config/llvm-config.cpp
+	sed -ri "s#/(bin|include|lib)(/?\")#/\1/${LLVM_DIR}\2#g" ${S}/tools/llvm-config/llvm-config.cpp
+	sed -ri "s#lib/${LLVM_DIR}#${baselib}/${LLVM_DIR}#g" ${S}/tools/llvm-config/llvm-config.cpp
+}
+
+# patch out build host paths for reproducibility
+do_compile:prepend:class-target() {
+        sed -i -e "s,${WORKDIR},,g" ${B}/tools/llvm-config/BuildVariables.inc
+}
+
+do_compile() {
+	ninja -v ${PARALLEL_MAKE}
+}
+
+do_compile:class-native() {
+	ninja -v ${PARALLEL_MAKE} llvm-config llvm-tblgen
+}
+
+do_install() {
+	DESTDIR=${LLVM_INSTALL_DIR} ninja -v install
+	install -D -m 0755 ${B}/bin/llvm-config ${D}${libdir}/${LLVM_DIR}/llvm-config
+
+	install -d ${D}${bindir}/${LLVM_DIR}
+	cp -r ${LLVM_INSTALL_DIR}${bindir}/* ${D}${bindir}/${LLVM_DIR}/
+
+	install -d ${D}${includedir}/${LLVM_DIR}
+	cp -r ${LLVM_INSTALL_DIR}${includedir}/* ${D}${includedir}/${LLVM_DIR}/
+
+	install -d ${D}${libdir}/${LLVM_DIR}
+
+	# The LLVM sources have "/lib" embedded and so we cannot completely rely on the ${libdir} variable
+	if [ -d ${LLVM_INSTALL_DIR}${libdir}/ ]; then
+		cp -r ${LLVM_INSTALL_DIR}${libdir}/* ${D}${libdir}/${LLVM_DIR}/
+	elif [ -d ${LLVM_INSTALL_DIR}${prefix}/lib ]; then
+		cp -r ${LLVM_INSTALL_DIR}${prefix}/lib/* ${D}${libdir}/${LLVM_DIR}/
+	elif [ -d ${LLVM_INSTALL_DIR}${prefix}/lib64 ]; then
+		cp -r ${LLVM_INSTALL_DIR}${prefix}/lib64/* ${D}${libdir}/${LLVM_DIR}/
+	fi
+
+	# Remove unnecessary cmake files
+	rm -rf ${D}${libdir}/${LLVM_DIR}/cmake
+
+	ln -s ${LLVM_DIR}/libLLVM-${MAJOR_VERSION}${SOLIBSDEV} ${D}${libdir}/libLLVM-${MAJOR_VERSION}${SOLIBSDEV}
+
+	# We'll have to delete the libLLVM.so due to multiple reasons...
+	rm -rf ${D}${libdir}/${LLVM_DIR}/libLLVM.so
+	rm -rf ${D}${libdir}/${LLVM_DIR}/libLTO.so
+}
+
+do_install:class-native() {
+	install -D -m 0755 ${B}/bin/llvm-tblgen ${D}${bindir}/llvm-tblgen${PV}
+	install -D -m 0755 ${B}/bin/llvm-config ${D}${bindir}/llvm-config${PV}
+	install -D -m 0755 ${B}/lib/libLLVM-${MAJOR_VERSION}.so ${D}${libdir}/libLLVM-${MAJOR_VERSION}.so
+}
+
+PACKAGES =+ "${PN}-bugpointpasses ${PN}-llvmhello ${PN}-libllvm ${PN}-liboptremarks ${PN}-liblto"
+
+RRECOMMENDS:${PN}-dev += "${PN}-bugpointpasses ${PN}-llvmhello ${PN}-liboptremarks"
+
+FILES:${PN}-bugpointpasses = "\
+    ${libdir}/${LLVM_DIR}/BugpointPasses.so \
+"
+
+FILES:${PN}-libllvm = "\
+    ${libdir}/${LLVM_DIR}/libLLVM-${MAJOR_VERSION}.so \
+    ${libdir}/libLLVM-${MAJOR_VERSION}.so \
+"
+
+FILES:${PN}-liblto += "\
+    ${libdir}/${LLVM_DIR}/libLTO.so.* \
+"
+
+FILES:${PN}-liboptremarks += "\
+    ${libdir}/${LLVM_DIR}/libRemarks.so.* \
+"
+
+FILES:${PN}-llvmhello = "\
+    ${libdir}/${LLVM_DIR}/LLVMHello.so \
+"
+
+FILES:${PN}-dev += " \
+    ${libdir}/${LLVM_DIR}/llvm-config \
+    ${libdir}/${LLVM_DIR}/libRemarks.so \
+    ${libdir}/${LLVM_DIR}/libLLVM-${PV}.so \
+"
+
+FILES:${PN}-staticdev += "\
+    ${libdir}/${LLVM_DIR}/*.a \
+"
+
+INSANE_SKIP:${PN}-libllvm += "dev-so"
+
+BBCLASSEXTEND = "native nativesdk"