jtag newtap CHIP jrc -irlen 4 -expected-id 0x08100cfd -enable

## E24 enable handler
jtag configure RV32ACFIMUX.cpu -event tap-enable {
    irscan CHIP.jrc 0x2 -endstate RUN/IDLE 
    drscan CHIP.jrc 16 0x4102 -endstate RUN/IDLE 
    runtest 10
    ## Place jrc in bypass
    irscan CHIP.jrc 0xF -endstate RUN/IDLE 
    runtest 10
}

## E24 disable handler 
jtag configure RV32ACFIMUX.cpu -event tap-disable {
    irscan CHIP.jrc 0x2 -endstate RUN/IDLE
    drscan CHIP.jrc 16 0x4100 -endstate RUN/IDLE
    runtest 10
    ## Place jrc in bypass
    irscan CHIP.jrc 0xF -endstate RUN/IDLE 
}

## BC enable handler 
jtag configure RV64ABCDFHIMSU.cpu -event tap-enable {
    irscan CHIP.jrc 0x2 -endstate RUN/IDLE 
    drscan CHIP.jrc 16 0x4402 -endstate RUN/IDLE 
    runtest 10
    ## Place jrc in bypass
    irscan CHIP.jrc 0xF -endstate RUN/IDLE
}

## BC disable handler 
jtag configure RV64ABCDFHIMSU.cpu -event tap-disable {
    irscan CHIP.jrc 0x2 -endstate RUN/IDLE 
    drscan CHIP.jrc 16 0x4400 -endstate RUN/IDLE 
    runtest 10
    ## Place jrc in bypass
    irscan CHIP.jrc 0xF -endstate RUN/IDLE 
}

jtag configure CHIP.jrc -event post-reset "runtest 20"
jtag configure CHIP.jrc -event setup "jtag tapenable RV64ABCDFHIMSU.cpu"
#"jtag tapenable RV64ABCDFHIMSU.cpu; jtag tapenable RV32ACFIMUX.cpu"
