From e4acc8143a553e7dbd039e76d42ee74e568546ae Mon Sep 17 00:00:00 2001
From: "max.ma" <max.ma@starfivetech.com>
Date: Sun, 20 Mar 2022 22:12:45 -0700
Subject: [PATCH 4/5] add pref instruction

---
 gas/config/tc-riscv.c | 24 ++++++++++++------------
 opcodes/riscv-opc.c   |  1 +
 2 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index cae279b647..672de3e33a 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1380,7 +1380,7 @@ check_absolute_expr (struct riscv_cl_insn *ip, expressionS *ex,
 
 static bfd_boolean check_pref_type(unsigned long type)
 {
-  if (type != 0 && type != 1 && type != 3 && type != 8)
+  if (type != 0 && type != 1 && type != 2 && type != 3 && type != 8)
     as_bad (_("Improper pref type (%lu)"), type);
 }
 
@@ -2471,20 +2471,20 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
 	      s = expr_end;
 	      continue;
 
-            case '#':
-              my_getExpression (imm_expr, s);
-              check_pref_type((unsigned long)imm_expr->X_add_number);
-              INSERT_OPERAND (PREF_TYPE, *ip, imm_expr->X_add_number);
-              imm_expr->X_op = O_absent;
-              s = expr_end;
-              continue;      
+      case '#':
+        my_getExpression (imm_expr, s);
+        check_pref_type((unsigned long)imm_expr->X_add_number);
+        INSERT_OPERAND (PREF_TYPE, *ip, imm_expr->X_add_number);
+        imm_expr->X_op = O_absent;
+        s = expr_end;
+        continue;      
 
-            case '+':
+      case '+':
 	      my_getExpression (imm_expr, s);
 	      check_absolute_expr (ip, imm_expr, FALSE);
-	      if ((unsigned long) imm_expr->X_add_number > 0xff)
-		as_bad (_("Improper pref offset value (%lu)"),
-			(unsigned long) imm_expr->X_add_number);
+	      if (imm_expr->X_add_number > 127 || imm_expr->X_add_number < -128)
+		as_bad (_("Improper pref offset value (%d)"),
+			(long) imm_expr->X_add_number);
 	      INSERT_OPERAND (PREF_OFFSET, *ip, imm_expr->X_add_number);
 	      imm_expr->X_op = O_absent;
 	      s = expr_end;
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index a7c697a938..1fd2fc4a9f 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -758,6 +758,7 @@ const struct riscv_opcode riscv_opcodes[] =
 {"snez",        0, INSN_CLASS_I,   "d,t",  MATCH_SLTU, MASK_SLTU | MASK_RS1, match_opcode, INSN_ALIAS },
 {"sltz",        0, INSN_CLASS_I,   "d,s",  MATCH_SLT, MASK_SLT | MASK_RS2, match_opcode, INSN_ALIAS },
 {"sgtz",        0, INSN_CLASS_I,   "d,t",  MATCH_SLT, MASK_SLT | MASK_RS1, match_opcode, INSN_ALIAS },
+{"pref",        0, INSN_CLASS_I,   "#,+(s)",    MATCH_SLTI, MASK_PREF, match_opcode, INSN_ALIAS },
 {"slti",        0, INSN_CLASS_I,   "d,s,j",  MATCH_SLTI, MASK_SLTI, match_opcode, 0 },
 {"slt",         0, INSN_CLASS_I,   "d,s,t",  MATCH_SLT, MASK_SLT, match_opcode, 0 },
 {"slt",         0, INSN_CLASS_I,   "d,s,j",  MATCH_SLTI, MASK_SLTI, match_opcode, INSN_ALIAS },
-- 
2.25.1

