vpuapi.c 114 KB

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  1. /*
  2. * Copyright (c) 2019, Chips&Media
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice, this
  9. * list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright notice,
  11. * this list of conditions and the following disclaimer in the documentation
  12. * and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  16. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
  18. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  19. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  20. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  21. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  23. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. */
  25. #include "vpuapifunc.h"
  26. #include "product.h"
  27. #include "wave/wave5_regdefine.h"
  28. #include "wave/wave5.h"
  29. #include "misc/debug.h"
  30. #define W5_RET_DEC_DISPLAY_SIZE (W5_REG_BASE + 0x01D8) // [FIX ME] delete ? or not?
  31. #define INVALID_CORE_INDEX_RETURN_ERROR(_coreIdx) \
  32. if (_coreIdx >= MAX_NUM_VPU_CORE) \
  33. return -1;
  34. static const Uint16* s_pusBitCode[MAX_NUM_VPU_CORE] = {NULL,};
  35. static int s_bitCodeSize[MAX_NUM_VPU_CORE] = {0,};
  36. Uint32 __VPU_BUSY_TIMEOUT = VPU_BUSY_CHECK_TIMEOUT;
  37. static RetCode CheckDecInstanceValidity(CodecInst* pCodecInst)
  38. {
  39. RetCode ret;
  40. if (pCodecInst == NULL)
  41. return RETCODE_INVALID_HANDLE;
  42. ret = CheckInstanceValidity(pCodecInst);
  43. if (ret != RETCODE_SUCCESS) {
  44. return RETCODE_INVALID_HANDLE;
  45. }
  46. if (!pCodecInst->inUse) {
  47. return RETCODE_INVALID_HANDLE;
  48. }
  49. return ProductVpuDecCheckCapability(pCodecInst);
  50. }
  51. Int32 VPU_IsInit(Uint32 coreIdx)
  52. {
  53. Int32 pc;
  54. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  55. pc = ProductVpuIsInit(coreIdx);
  56. return pc;
  57. }
  58. Int32 VPU_WaitInterrupt(Uint32 coreIdx, int timeout)
  59. {
  60. Int32 ret;
  61. CodecInst* instance;
  62. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  63. if ((instance=GetPendingInst(coreIdx)) != NULL) {
  64. ret = ProductVpuWaitInterrupt(instance, timeout);
  65. }
  66. else {
  67. ret = -1;
  68. }
  69. return ret;
  70. }
  71. Int32 VPU_WaitInterruptEx(VpuHandle handle, int timeout)
  72. {
  73. Int32 ret;
  74. CodecInst *pCodecInst;
  75. pCodecInst = handle;
  76. INVALID_CORE_INDEX_RETURN_ERROR(pCodecInst->coreIdx);
  77. ret = ProductVpuWaitInterrupt(pCodecInst, timeout);
  78. return ret;
  79. }
  80. void VPU_ClearInterrupt(Uint32 coreIdx)
  81. {
  82. /* clear all interrupt flags */
  83. ProductVpuClearInterrupt(coreIdx, 0xffff);
  84. }
  85. void VPU_ClearInterruptEx(VpuHandle handle, Int32 intrFlag)
  86. {
  87. CodecInst *pCodecInst;
  88. pCodecInst = handle;
  89. ProductVpuClearInterrupt(pCodecInst->coreIdx, intrFlag);
  90. }
  91. int VPU_GetFrameBufSize(VpuHandle handle, int coreIdx, int stride, int height, int mapType, int format, int interleave, DRAMConfig *pDramCfg)
  92. {
  93. int productId;
  94. CodecInst *pCodecInst;
  95. pCodecInst = handle;
  96. UNREFERENCED_PARAMETER(interleave); /*!<< for backward compatiblity */
  97. if (coreIdx < 0 || coreIdx >= MAX_NUM_VPU_CORE)
  98. return -1;
  99. productId = ProductVpuGetId(coreIdx);
  100. return ProductCalculateFrameBufSize(pCodecInst, productId, stride, height, (TiledMapType)mapType, (FrameBufferFormat)format, (BOOL)interleave, pDramCfg);
  101. }
  102. int VPU_GetProductId(int coreIdx)
  103. {
  104. Int32 productId;
  105. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  106. if ((productId=ProductVpuGetId(coreIdx)) != PRODUCT_ID_NONE) {
  107. return productId;
  108. }
  109. if (vdi_init(coreIdx) < 0)
  110. return -1;
  111. EnterLock(coreIdx);
  112. if (ProductVpuScan(coreIdx) == FALSE)
  113. productId = -1;
  114. else
  115. productId = ProductVpuGetId(coreIdx);
  116. LeaveLock((coreIdx));
  117. vdi_release(coreIdx);
  118. return productId;
  119. }
  120. int VPU_GetOpenInstanceNum(Uint32 coreIdx)
  121. {
  122. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  123. return vdi_get_instance_num(coreIdx);
  124. }
  125. static RetCode InitializeVPU(Uint32 coreIdx, const Uint16* code, Uint32 size)
  126. {
  127. RetCode ret;
  128. if (vdi_init(coreIdx) < 0)
  129. return RETCODE_FAILURE;
  130. EnterLock(coreIdx);
  131. if (vdi_get_instance_num(coreIdx) > 0) {
  132. if (ProductVpuScan(coreIdx) == 0) {
  133. LeaveLock(coreIdx);
  134. return RETCODE_NOT_FOUND_VPU_DEVICE;
  135. }
  136. }
  137. /* force to reset vpu, so that the vpu in a clean state */
  138. #if 0
  139. if (VPU_IsInit(coreIdx) != 0) {
  140. ProductVpuReInit(coreIdx, (void *)code, size);
  141. LeaveLock(coreIdx);
  142. return RETCODE_CALLED_BEFORE;
  143. }
  144. #endif
  145. InitCodecInstancePool(coreIdx);
  146. ret = ProductVpuReset(coreIdx, SW_RESET_ON_BOOT);
  147. if (ret != RETCODE_SUCCESS) {
  148. LeaveLock(coreIdx);
  149. return ret;
  150. }
  151. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  152. create_sw_uart_thread(coreIdx);
  153. usleep(500*1000);
  154. #endif
  155. ret = ProductVpuInit(coreIdx, (void*)code, size);
  156. if (ret != RETCODE_SUCCESS) {
  157. LeaveLock(coreIdx);
  158. return ret;
  159. }
  160. LeaveLock(coreIdx);
  161. return RETCODE_SUCCESS;
  162. }
  163. RetCode VPU_Init(Uint32 coreIdx)
  164. {
  165. if (coreIdx >= MAX_NUM_VPU_CORE)
  166. return RETCODE_INVALID_PARAM;
  167. if (s_bitCodeSize[coreIdx] == 0)
  168. return RETCODE_NOT_FOUND_BITCODE_PATH;
  169. return InitializeVPU(coreIdx, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  170. }
  171. RetCode VPU_InitWithBitcode(Uint32 coreIdx, const Uint16* code, Uint32 size)
  172. {
  173. if (coreIdx >= MAX_NUM_VPU_CORE)
  174. return RETCODE_INVALID_PARAM;
  175. if (code == NULL || size == 0)
  176. return RETCODE_INVALID_PARAM;
  177. s_pusBitCode[coreIdx] = NULL;
  178. s_pusBitCode[coreIdx] = (Uint16 *)osal_malloc(size*sizeof(Uint16));
  179. if (!s_pusBitCode[coreIdx])
  180. return RETCODE_INSUFFICIENT_RESOURCE;
  181. osal_memcpy((void *)s_pusBitCode[coreIdx], (const void *)code, size*sizeof(Uint16));
  182. s_bitCodeSize[coreIdx] = size;
  183. return InitializeVPU(coreIdx, code, size);
  184. }
  185. RetCode VPU_DeInit(Uint32 coreIdx)
  186. {
  187. int ret;
  188. if (coreIdx >= MAX_NUM_VPU_CORE)
  189. return RETCODE_INVALID_PARAM;
  190. EnterLock(coreIdx);
  191. if (s_pusBitCode[coreIdx]) {
  192. osal_free((void *)s_pusBitCode[coreIdx]);
  193. }
  194. s_pusBitCode[coreIdx] = NULL;
  195. s_bitCodeSize[coreIdx] = 0;
  196. LeaveLock(coreIdx);
  197. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  198. destory_sw_uart_thread();
  199. #endif
  200. ret = vdi_release(coreIdx);
  201. if (ret != 0)
  202. return RETCODE_FAILURE;
  203. return RETCODE_SUCCESS;
  204. }
  205. RetCode VPU_GetVersionInfo(Uint32 coreIdx, Uint32 *versionInfo, Uint32 *revision, Uint32 *productId)
  206. {
  207. RetCode ret;
  208. if (coreIdx >= MAX_NUM_VPU_CORE)
  209. return RETCODE_INVALID_PARAM;
  210. EnterLock(coreIdx);
  211. if (ProductVpuIsInit(coreIdx) == 0) {
  212. LeaveLock(coreIdx);
  213. return RETCODE_NOT_INITIALIZED;
  214. }
  215. if (GetPendingInst(coreIdx)) {
  216. LeaveLock(coreIdx);
  217. return RETCODE_FRAME_NOT_COMPLETE;
  218. }
  219. if (productId != NULL) {
  220. *productId = ProductVpuGetId(coreIdx);
  221. }
  222. ret = ProductVpuGetVersion(coreIdx, versionInfo, revision);
  223. LeaveLock(coreIdx);
  224. return ret;
  225. }
  226. RetCode VPU_GetProductInfo(Uint32 coreIdx, VpuAttr *productInfo)
  227. {
  228. RetCode ret;
  229. if (coreIdx >= MAX_NUM_VPU_CORE)
  230. return RETCODE_INVALID_PARAM;
  231. EnterLock(coreIdx);
  232. if (ProductVpuIsInit(coreIdx) == 0) {
  233. LeaveLock(coreIdx);
  234. return RETCODE_NOT_INITIALIZED;
  235. }
  236. if (GetPendingInst(coreIdx)) {
  237. LeaveLock(coreIdx);
  238. return RETCODE_FRAME_NOT_COMPLETE;
  239. }
  240. productInfo->productId = ProductVpuGetId(coreIdx);
  241. ret = ProductVpuGetProductInfo(coreIdx, productInfo);
  242. LeaveLock(coreIdx);
  243. return ret;
  244. }
  245. RetCode VPU_DecOpen(DecHandle* pHandle, DecOpenParam* pop)
  246. {
  247. CodecInst * pCodecInst;
  248. DecInfo* pDecInfo;
  249. RetCode ret;
  250. ret = ProductCheckDecOpenParam(pop);
  251. if (ret != RETCODE_SUCCESS)
  252. return ret;
  253. EnterLock(pop->coreIdx);
  254. if (VPU_IsInit(pop->coreIdx) == 0) {
  255. LeaveLock(pop->coreIdx);
  256. return RETCODE_NOT_INITIALIZED;
  257. }
  258. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  259. if (ret != RETCODE_SUCCESS)
  260. {
  261. *pHandle = 0;
  262. LeaveLock(pop->coreIdx);
  263. return ret;
  264. }
  265. pCodecInst->isDecoder = TRUE;
  266. *pHandle = pCodecInst;
  267. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  268. osal_memset(pDecInfo, 0x00, sizeof(DecInfo));
  269. osal_memcpy((void*)&pDecInfo->openParam, pop, sizeof(DecOpenParam));
  270. if (pop->bitstreamFormat == STD_MPEG4) {
  271. pCodecInst->codecMode = MP4_DEC;
  272. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  273. }
  274. else if (pop->bitstreamFormat == STD_AVC) {
  275. if (pCodecInst->productId == PRODUCT_ID_521 || pCodecInst->productId == PRODUCT_ID_511 || pCodecInst->productId == PRODUCT_ID_517) {
  276. pCodecInst->codecMode = W_AVC_DEC;
  277. }
  278. else {
  279. pCodecInst->codecMode = AVC_DEC;
  280. pCodecInst->codecModeAux = pop->avcExtension;
  281. }
  282. }
  283. else if (pop->bitstreamFormat == STD_VC1) {
  284. pCodecInst->codecMode = VC1_DEC;
  285. }
  286. else if (pop->bitstreamFormat == STD_MPEG2) {
  287. pCodecInst->codecMode = MP2_DEC;
  288. }
  289. else if (pop->bitstreamFormat == STD_H263) {
  290. pCodecInst->codecMode = MP4_DEC;
  291. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  292. }
  293. else if (pop->bitstreamFormat == STD_DIV3) {
  294. pCodecInst->codecMode = DV3_DEC;
  295. pCodecInst->codecModeAux = MP4_AUX_DIVX3;
  296. }
  297. else if (pop->bitstreamFormat == STD_RV) {
  298. pCodecInst->codecMode = RV_DEC;
  299. }
  300. else if (pop->bitstreamFormat == STD_AVS) {
  301. pCodecInst->codecMode = AVS_DEC;
  302. }
  303. else if (pop->bitstreamFormat == STD_THO) {
  304. pCodecInst->codecMode = VPX_DEC;
  305. pCodecInst->codecModeAux = VPX_AUX_THO;
  306. }
  307. else if (pop->bitstreamFormat == STD_VP3) {
  308. pCodecInst->codecMode = VPX_DEC;
  309. pCodecInst->codecModeAux = VPX_AUX_THO;
  310. }
  311. else if (pop->bitstreamFormat == STD_VP8) {
  312. pCodecInst->codecMode = VPX_DEC;
  313. pCodecInst->codecModeAux = VPX_AUX_VP8;
  314. }
  315. else if (pop->bitstreamFormat == STD_HEVC) {
  316. pCodecInst->codecMode = W_HEVC_DEC;
  317. }
  318. else if (pop->bitstreamFormat == STD_VP9) {
  319. pCodecInst->codecMode = W_VP9_DEC;
  320. }
  321. else if (pop->bitstreamFormat == STD_AVS2) {
  322. pCodecInst->codecMode = W_AVS2_DEC;
  323. }
  324. else if (pop->bitstreamFormat == STD_SVAC) {
  325. pCodecInst->codecMode = W_SVAC_DEC;
  326. }
  327. else if (pop->bitstreamFormat == STD_AV1) {
  328. pCodecInst->codecMode = W_AV1_DEC;
  329. }
  330. else {
  331. LeaveLock(pop->coreIdx);
  332. return RETCODE_INVALID_PARAM;
  333. }
  334. pDecInfo->wtlEnable = pop->wtlEnable;
  335. pDecInfo->wtlMode = pop->wtlMode;
  336. if (!pDecInfo->wtlEnable)
  337. pDecInfo->wtlMode = 0;
  338. pDecInfo->streamWrPtr = pop->bitstreamBuffer;
  339. pDecInfo->streamRdPtr = pop->bitstreamBuffer;
  340. pDecInfo->frameDelay = -1;
  341. pDecInfo->streamBufStartAddr = pop->bitstreamBuffer;
  342. pDecInfo->streamBufSize = pop->bitstreamBufferSize;
  343. pDecInfo->streamBufEndAddr = pop->bitstreamBuffer + pop->bitstreamBufferSize;
  344. pDecInfo->reorderEnable = VPU_REORDER_ENABLE;
  345. pDecInfo->mirrorDirection = MIRDIR_NONE;
  346. pDecInfo->prevFrameEndPos = pop->bitstreamBuffer;
  347. pDecInfo->tempIdSelectMode = pop->tempIdSelectMode;
  348. pDecInfo->targetSubLayerId = DECODE_ALL_TEMPORAL_LAYERS;
  349. pDecInfo->relTargetLayerId = 0;
  350. if ((ret=ProductVpuDecBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  351. *pHandle = 0;
  352. LeaveLock(pCodecInst->coreIdx);
  353. return ret;
  354. }
  355. pDecInfo->tiled2LinearEnable = pop->tiled2LinearEnable;
  356. pDecInfo->tiled2LinearMode = pop->tiled2LinearMode;
  357. if (!pDecInfo->tiled2LinearEnable)
  358. pDecInfo->tiled2LinearMode = 0; //coda980 only
  359. if (!pDecInfo->wtlEnable) //coda980, wave320, wave410 only
  360. pDecInfo->wtlMode = 0;
  361. osal_memset((void*)&pDecInfo->cacheConfig, 0x00, sizeof(MaverickCacheConfig));
  362. LeaveLock(pCodecInst->coreIdx);
  363. return RETCODE_SUCCESS;
  364. }
  365. RetCode VPU_DecClose(DecHandle handle)
  366. {
  367. CodecInst * pCodecInst;
  368. DecInfo * pDecInfo;
  369. RetCode ret;
  370. int i;
  371. ret = CheckDecInstanceValidity(handle);
  372. if (ret != RETCODE_SUCCESS) {
  373. return ret;
  374. }
  375. pCodecInst = handle;
  376. if (!pCodecInst) {
  377. return RETCODE_INVALID_HANDLE;
  378. }
  379. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  380. EnterLock(pCodecInst->coreIdx);
  381. if ((ret=ProductVpuDecFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  382. if (pCodecInst->loggingEnable)
  383. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 2);
  384. if (ret == RETCODE_VPU_STILL_RUNNING) {
  385. LeaveLock(pCodecInst->coreIdx);
  386. return ret;
  387. }
  388. }
  389. if (pCodecInst->loggingEnable)
  390. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 0);
  391. if (pDecInfo->vbSlice.size)
  392. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  393. if (pDecInfo->vbWork.size) {
  394. if (pDecInfo->workBufferAllocExt == 0) {
  395. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork, DEC_WORK, pCodecInst->instIndex);
  396. }
  397. else {
  398. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork);
  399. }
  400. }
  401. if (pDecInfo->vbFrame.size) {
  402. if (pDecInfo->frameAllocExt == 0) {
  403. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  404. }
  405. }
  406. for ( i=0 ; i<MAX_REG_FRAME; i++) {
  407. if (pDecInfo->vbMV[i].size)
  408. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  409. if (pDecInfo->vbFbcYTbl[i].size)
  410. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  411. if (pDecInfo->vbFbcCTbl[i].size)
  412. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  413. }
  414. if (pDecInfo->vbTemp.size)
  415. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTemp);
  416. if (pDecInfo->vbPPU.size) {
  417. if (pDecInfo->ppuAllocExt == 0)
  418. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  419. }
  420. if (pDecInfo->vbWTL.size)
  421. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  422. if (pDecInfo->vbUserData.size)
  423. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData);
  424. if (pDecInfo->vbReport.size)
  425. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbReport, DEC_ETC, pCodecInst->instIndex);
  426. if (pDecInfo->vbTask.size)
  427. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTask, DEC_TASK, pCodecInst->instIndex);
  428. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  429. ClearPendingInst(pCodecInst->coreIdx);
  430. LeaveLock(pCodecInst->coreIdx);
  431. FreeCodecInstance(pCodecInst);
  432. return ret;
  433. }
  434. RetCode VPU_DecSetEscSeqInit(DecHandle handle, int escape)
  435. {
  436. CodecInst * pCodecInst;
  437. DecInfo * pDecInfo;
  438. RetCode ret;
  439. ret = CheckDecInstanceValidity(handle);
  440. if (ret != RETCODE_SUCCESS)
  441. return ret;
  442. pCodecInst = handle;
  443. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  444. if (pDecInfo->openParam.bitstreamMode != BS_MODE_INTERRUPT)
  445. return RETCODE_INVALID_PARAM;
  446. pDecInfo->seqInitEscape = escape;
  447. return RETCODE_SUCCESS;
  448. }
  449. RetCode VPU_DecGetInitialInfo(DecHandle handle, DecInitialInfo* info)
  450. {
  451. CodecInst* pCodecInst;
  452. DecInfo* pDecInfo;
  453. RetCode ret;
  454. Int32 flags;
  455. Uint32 interruptBit;
  456. VpuAttr* pAttr;
  457. if (PRODUCT_ID_W_SERIES(handle->productId)) {
  458. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 || handle->productId == PRODUCT_ID_517 || handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511) {
  459. interruptBit = INT_WAVE5_INIT_SEQ;
  460. }
  461. else
  462. return RETCODE_INVALID_PARAM;
  463. }
  464. else {
  465. /* CODA9xx */
  466. interruptBit = INT_BIT_SEQ_INIT;
  467. }
  468. ret = CheckDecInstanceValidity(handle);
  469. if (ret != RETCODE_SUCCESS)
  470. return ret;
  471. if (info == NULL)
  472. return RETCODE_INVALID_PARAM;
  473. pCodecInst = handle;
  474. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  475. ret = ProductVpuDecCheckCapability(pCodecInst);
  476. if (ret != RETCODE_SUCCESS)
  477. return ret;
  478. EnterLock(pCodecInst->coreIdx);
  479. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  480. if (GetPendingInst(pCodecInst->coreIdx)) {
  481. /* The other instance is running */
  482. LeaveLock(pCodecInst->coreIdx);
  483. return RETCODE_FRAME_NOT_COMPLETE;
  484. }
  485. if (DecBitstreamBufEmpty(pDecInfo)) {
  486. LeaveLock(pCodecInst->coreIdx);
  487. return RETCODE_WRONG_CALL_SEQUENCE;
  488. }
  489. ret = ProductVpuDecInitSeq(handle);
  490. if (ret != RETCODE_SUCCESS) {
  491. LeaveLock(pCodecInst->coreIdx);
  492. return ret;
  493. }
  494. if (pAttr->supportCommandQueue == TRUE) {
  495. LeaveLock(pCodecInst->coreIdx);
  496. }
  497. flags = ProductVpuWaitInterrupt(pCodecInst, __VPU_BUSY_TIMEOUT);
  498. if (pAttr->supportCommandQueue == TRUE) {
  499. EnterLock(pCodecInst->coreIdx);
  500. }
  501. if (flags == -1) {
  502. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  503. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  504. ret = RETCODE_VPU_RESPONSE_TIMEOUT;
  505. }
  506. else {
  507. if (flags&(1<<interruptBit))
  508. ProductVpuClearInterrupt(pCodecInst->coreIdx, (1<<interruptBit));
  509. if (flags != (1<<interruptBit))
  510. ret = RETCODE_FAILURE;
  511. else
  512. ret = ProductVpuDecGetSeqInfo(handle, info);
  513. }
  514. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  515. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  516. pDecInfo->initialInfo = *info;
  517. if (ret == RETCODE_SUCCESS) {
  518. pDecInfo->initialInfoObtained = 1;
  519. }
  520. SetPendingInst(pCodecInst->coreIdx, 0);
  521. LeaveLock(pCodecInst->coreIdx);
  522. return ret;
  523. }
  524. RetCode VPU_DecIssueSeqInit(DecHandle handle)
  525. {
  526. CodecInst* pCodecInst;
  527. RetCode ret;
  528. VpuAttr* pAttr;
  529. ret = CheckDecInstanceValidity(handle);
  530. if (ret != RETCODE_SUCCESS)
  531. return ret;
  532. pCodecInst = handle;
  533. EnterLock(pCodecInst->coreIdx);
  534. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  535. if (GetPendingInst(pCodecInst->coreIdx)) {
  536. LeaveLock(pCodecInst->coreIdx);
  537. return RETCODE_FRAME_NOT_COMPLETE;
  538. }
  539. ret = ProductVpuDecInitSeq(handle);
  540. if (ret == RETCODE_SUCCESS) {
  541. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  542. }
  543. if (pAttr->supportCommandQueue == TRUE) {
  544. SetPendingInst(pCodecInst->coreIdx, NULL);
  545. LeaveLock(pCodecInst->coreIdx);
  546. }
  547. return ret;
  548. }
  549. RetCode VPU_DecCompleteSeqInit(DecHandle handle, DecInitialInfo * info)
  550. {
  551. CodecInst* pCodecInst;
  552. DecInfo* pDecInfo;
  553. RetCode ret;
  554. VpuAttr* pAttr;
  555. ret = CheckDecInstanceValidity(handle);
  556. if (ret != RETCODE_SUCCESS) {
  557. return ret;
  558. }
  559. if (info == 0) {
  560. return RETCODE_INVALID_PARAM;
  561. }
  562. pCodecInst = handle;
  563. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  564. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  565. if (pAttr->supportCommandQueue == TRUE) {
  566. EnterLock(pCodecInst->coreIdx);
  567. }
  568. else {
  569. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  570. SetPendingInst(pCodecInst->coreIdx, 0);
  571. LeaveLock(pCodecInst->coreIdx);
  572. return RETCODE_WRONG_CALL_SEQUENCE;
  573. }
  574. }
  575. ret = ProductVpuDecGetSeqInfo(handle, info);
  576. if (ret == RETCODE_SUCCESS) {
  577. pDecInfo->initialInfoObtained = 1;
  578. }
  579. info->rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  580. info->wrPtr = pDecInfo->streamWrPtr;
  581. pDecInfo->prevFrameEndPos = info->rdPtr;
  582. pDecInfo->initialInfo = *info;
  583. SetPendingInst(pCodecInst->coreIdx, NULL);
  584. LeaveLock(pCodecInst->coreIdx);
  585. return ret;
  586. }
  587. static RetCode DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int numFbsForDecoding, int numFbsForWTL, int stride, int height, int mapType)
  588. {
  589. CodecInst* pCodecInst;
  590. DecInfo* pDecInfo;
  591. Int32 i;
  592. RetCode ret;
  593. FrameBuffer* fb, nullFb;
  594. vpu_buffer_t* vb;
  595. FrameBufferFormat format = FORMAT_420;
  596. Int32 totalNumOfFbs;
  597. ret = CheckDecInstanceValidity(handle);
  598. if (ret != RETCODE_SUCCESS)
  599. return ret;
  600. if (numFbsForDecoding > MAX_FRAMEBUFFER_COUNT || numFbsForWTL > MAX_FRAMEBUFFER_COUNT) {
  601. return RETCODE_INVALID_PARAM;
  602. }
  603. osal_memset(&nullFb, 0x00, sizeof(FrameBuffer));
  604. pCodecInst = handle;
  605. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  606. pDecInfo->numFbsForDecoding = numFbsForDecoding;
  607. pDecInfo->numFbsForWTL = numFbsForWTL;
  608. pDecInfo->numFrameBuffers = numFbsForDecoding + numFbsForWTL;
  609. pDecInfo->stride = stride;
  610. if (pCodecInst->codecMode == VPX_DEC)
  611. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  612. else if (pCodecInst->codecMode == W_VP9_DEC)
  613. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  614. else
  615. pDecInfo->frameBufferHeight = height;
  616. pDecInfo->mapType = mapType;
  617. pDecInfo->mapCfg.productId = pCodecInst->productId;
  618. ret = ProductVpuDecCheckCapability(pCodecInst);
  619. if (ret != RETCODE_SUCCESS)
  620. return ret;
  621. if (!pDecInfo->initialInfoObtained)
  622. return RETCODE_WRONG_CALL_SEQUENCE;
  623. if ( (stride < pDecInfo->initialInfo.picWidth) || (stride % 8 != 0) || (height<pDecInfo->initialInfo.picHeight) ) {
  624. return RETCODE_INVALID_STRIDE;
  625. }
  626. EnterLock(pCodecInst->coreIdx);
  627. if (GetPendingInst(pCodecInst->coreIdx)) {
  628. LeaveLock(pCodecInst->coreIdx);
  629. return RETCODE_FRAME_NOT_COMPLETE;
  630. }
  631. /* clear frameBufPool */
  632. for (i=0; i<(int)(sizeof(pDecInfo->frameBufPool)/sizeof(FrameBuffer)); i++) {
  633. pDecInfo->frameBufPool[i] = nullFb;
  634. }
  635. /* LinearMap or TiledMap, compressed framebuffer inclusive. */
  636. if (pDecInfo->initialInfo.lumaBitdepth > 8 || pDecInfo->initialInfo.chromaBitdepth > 8)
  637. format = FORMAT_420_P10_16BIT_LSB;
  638. totalNumOfFbs = numFbsForDecoding + numFbsForWTL;
  639. if (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE)
  640. totalNumOfFbs = numFbsForDecoding + numFbsForDecoding + numFbsForWTL; // (EL + BL + linear)
  641. if (bufArray) {
  642. for(i=0; i<totalNumOfFbs; i++)
  643. pDecInfo->frameBufPool[i] = bufArray[i];
  644. }
  645. else {
  646. vb = &pDecInfo->vbFrame;
  647. fb = &pDecInfo->frameBufPool[0];
  648. ret = ProductVpuAllocateFramebuffer(
  649. (CodecInst*)handle, fb, (TiledMapType)mapType, numFbsForDecoding, stride, height, format,
  650. pDecInfo->openParam.cbcrInterleave,
  651. pDecInfo->openParam.nv21,
  652. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_CODEC);
  653. if (ret != RETCODE_SUCCESS) {
  654. LeaveLock(pCodecInst->coreIdx);
  655. return ret;
  656. }
  657. }
  658. if (pCodecInst->productId != PRODUCT_ID_960) {
  659. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->frameBufPool[0].bufY;
  660. }
  661. /* LinearMap */
  662. if (pDecInfo->wtlEnable == TRUE || numFbsForWTL != 0) {
  663. pDecInfo->stride = stride;
  664. if (!bufArray) {
  665. TiledMapType map;
  666. map = pDecInfo->wtlMode==FF_FRAME ? LINEAR_FRAME_MAP : LINEAR_FIELD_MAP;
  667. vb = &pDecInfo->vbWTL;
  668. fb = &pDecInfo->frameBufPool[numFbsForDecoding];
  669. ret = ProductVpuAllocateFramebuffer(
  670. (CodecInst*)handle, fb, map, numFbsForWTL, stride, height,
  671. pDecInfo->wtlFormat,
  672. pDecInfo->openParam.cbcrInterleave,
  673. pDecInfo->openParam.nv21,
  674. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_PPU);
  675. if (ret != RETCODE_SUCCESS) {
  676. LeaveLock(pCodecInst->coreIdx);
  677. return ret;
  678. }
  679. }
  680. }
  681. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  682. LeaveLock(pCodecInst->coreIdx);
  683. return ret;
  684. }
  685. RetCode VPU_DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int num, int stride, int height, int mapType)
  686. {
  687. DecInfo* pDecInfo = &handle->CodecInfo->decInfo;
  688. Uint32 numWTL = 0;
  689. if (pDecInfo->wtlEnable == TRUE) numWTL = num;
  690. return DecRegisterFrameBuffer(handle, bufArray, num, numWTL, stride, height, mapType);
  691. }
  692. RetCode VPU_DecRegisterFrameBufferEx(DecHandle handle, FrameBuffer *bufArray, int numOfDecFbs, int numOfDisplayFbs, int stride, int height, int mapType)
  693. {
  694. return DecRegisterFrameBuffer(handle, bufArray, numOfDecFbs, numOfDisplayFbs, stride, height, mapType);
  695. }
  696. RetCode VPU_DecGetFrameBuffer(DecHandle handle, int frameIdx, FrameBuffer* frameBuf)
  697. {
  698. CodecInst * pCodecInst;
  699. DecInfo * pDecInfo;
  700. RetCode ret;
  701. ret = CheckDecInstanceValidity(handle);
  702. if (ret != RETCODE_SUCCESS)
  703. return ret;
  704. if (frameBuf == 0)
  705. return RETCODE_INVALID_PARAM;
  706. pCodecInst = handle;
  707. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  708. if (frameIdx < 0 || frameIdx >= pDecInfo->numFrameBuffers)
  709. return RETCODE_INVALID_PARAM;
  710. *frameBuf = pDecInfo->frameBufPool[frameIdx];
  711. return RETCODE_SUCCESS;
  712. }
  713. RetCode VPU_DecUpdateFrameBuffer(
  714. DecHandle handle,
  715. FrameBuffer* fbcFb,
  716. FrameBuffer* linearFb,
  717. Int32 mvColIndex,
  718. Int32 picWidth,
  719. Int32 picHeight
  720. )
  721. {
  722. if (handle == NULL) {
  723. return RETCODE_INVALID_HANDLE;
  724. }
  725. return ProductVpuDecUpdateFrameBuffer((CodecInst*)handle, fbcFb, linearFb, mvColIndex, picWidth, picHeight);
  726. }
  727. RetCode VPU_DecGetBitstreamBuffer(DecHandle handle, PhysicalAddress* prdPtr, PhysicalAddress* pwrPtr, Uint32* size)
  728. {
  729. CodecInst* pCodecInst;
  730. DecInfo* pDecInfo;
  731. PhysicalAddress rdPtr;
  732. PhysicalAddress wrPtr;
  733. PhysicalAddress tempPtr;
  734. int room;
  735. Int32 coreIdx;
  736. VpuAttr* pAttr;
  737. coreIdx = handle->coreIdx;
  738. pAttr = &g_VpuCoreAttributes[coreIdx];
  739. pCodecInst = handle;
  740. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  741. if (pAttr->supportCommandQueue == TRUE) {
  742. if (pDecInfo->rdPtrValidFlag == TRUE) { // when RdPtr has been updated by calling SetRdPtr.
  743. rdPtr = pDecInfo->streamRdPtr;
  744. }
  745. else {
  746. EnterLock(pCodecInst->coreIdx);
  747. rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  748. LeaveLock(pCodecInst->coreIdx);
  749. }
  750. }
  751. else {
  752. if (GetPendingInst(coreIdx) == pCodecInst) {
  753. if (pCodecInst->codecMode == AVC_DEC && pCodecInst->codecModeAux == AVC_AUX_MVC) {
  754. rdPtr = pDecInfo->streamRdPtr;
  755. }
  756. else {
  757. rdPtr = VpuReadReg(coreIdx, pDecInfo->streamRdPtrRegAddr);
  758. }
  759. }
  760. else {
  761. rdPtr = pDecInfo->streamRdPtr;
  762. }
  763. }
  764. wrPtr = pDecInfo->streamWrPtr;
  765. pAttr = &g_VpuCoreAttributes[coreIdx];
  766. tempPtr = rdPtr;
  767. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  768. if (wrPtr < tempPtr) {
  769. room = tempPtr - wrPtr - pAttr->bitstreamBufferMargin*2;
  770. }
  771. else {
  772. room = (pDecInfo->streamBufEndAddr - wrPtr) + (tempPtr - pDecInfo->streamBufStartAddr) - pAttr->bitstreamBufferMargin*2;
  773. }
  774. room--;
  775. }
  776. else {
  777. room = (pDecInfo->streamBufEndAddr - wrPtr);
  778. }
  779. if (prdPtr) *prdPtr = tempPtr;
  780. if (pwrPtr) *pwrPtr = wrPtr;
  781. if (size) *size = room;
  782. return RETCODE_SUCCESS;
  783. }
  784. RetCode VPU_DecUpdateBitstreamBuffer(DecHandle handle, int size)
  785. {
  786. CodecInst* pCodecInst;
  787. DecInfo* pDecInfo;
  788. PhysicalAddress wrPtr;
  789. PhysicalAddress rdPtr;
  790. RetCode ret;
  791. BOOL running;
  792. VpuAttr* pAttr;
  793. ret = CheckDecInstanceValidity(handle);
  794. if (ret != RETCODE_SUCCESS)
  795. return ret;
  796. pCodecInst = handle;
  797. if (!pCodecInst)
  798. return RETCODE_INVALID_HANDLE;
  799. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  800. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  801. wrPtr = pDecInfo->streamWrPtr;
  802. if (pAttr->supportCommandQueue == TRUE) {
  803. running = FALSE;
  804. }
  805. else {
  806. running = (BOOL)(GetPendingInst(pCodecInst->coreIdx) == pCodecInst);
  807. }
  808. if (size > 0) {
  809. Uint32 room = 0;
  810. if (running == TRUE)
  811. rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  812. else
  813. rdPtr = pDecInfo->streamRdPtr;
  814. if (wrPtr < rdPtr) {
  815. if (rdPtr <= wrPtr + size) {
  816. return RETCODE_INVALID_PARAM;
  817. }
  818. }
  819. wrPtr += size;
  820. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  821. if (wrPtr > pDecInfo->streamBufEndAddr) {
  822. room = wrPtr - pDecInfo->streamBufEndAddr;
  823. wrPtr = pDecInfo->streamBufStartAddr;
  824. wrPtr += room;
  825. }
  826. else if (wrPtr == pDecInfo->streamBufEndAddr) {
  827. wrPtr = pDecInfo->streamBufStartAddr;
  828. }
  829. }
  830. pDecInfo->streamWrPtr = wrPtr;
  831. pDecInfo->streamRdPtr = rdPtr;
  832. if (running == TRUE) {
  833. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr, wrPtr);
  834. }
  835. }
  836. if (running == FALSE) {
  837. EnterLock(pCodecInst->coreIdx);
  838. }
  839. ret = ProductVpuDecSetBitstreamFlag(pCodecInst, running, size);
  840. if (running == FALSE) {
  841. LeaveLock(pCodecInst->coreIdx);
  842. }
  843. return ret;
  844. }
  845. RetCode VPU_HWReset(Uint32 coreIdx)
  846. {
  847. if (vdi_hw_reset(coreIdx) < 0 )
  848. return RETCODE_FAILURE;
  849. if (GetPendingInst(coreIdx))
  850. {
  851. SetPendingInst(coreIdx, 0);
  852. LeaveLock(coreIdx); //if vpu is in a lock state. release the state;
  853. }
  854. return RETCODE_SUCCESS;
  855. }
  856. /**
  857. * VPU_SWReset
  858. * IN
  859. * forcedReset : 1 if there is no need to waiting for BUS transaction,
  860. * 0 for otherwise
  861. * OUT
  862. * RetCode : RETCODE_FAILURE if failed to reset,
  863. * RETCODE_SUCCESS for otherwise
  864. */
  865. RetCode VPU_SWReset(Uint32 coreIdx, SWResetMode resetMode, void *pendingInst)
  866. {
  867. CodecInst *pCodecInst = (CodecInst *)pendingInst;
  868. RetCode ret = RETCODE_SUCCESS;
  869. VpuAttr* attr = &g_VpuCoreAttributes[coreIdx];
  870. if (attr->supportCommandQueue == TRUE) {
  871. if (pCodecInst && pCodecInst->loggingEnable) {
  872. vdi_log(pCodecInst->coreIdx, 0x10000, 1);
  873. }
  874. EnterLock(coreIdx);
  875. ret = ProductVpuReset(coreIdx, resetMode);
  876. LeaveLock(coreIdx);
  877. if (pCodecInst && pCodecInst->loggingEnable) {
  878. vdi_log(pCodecInst->coreIdx, 0x10000, 0);
  879. }
  880. }
  881. else {
  882. if (pCodecInst) {
  883. if (pCodecInst->loggingEnable) {
  884. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 1);
  885. }
  886. }
  887. else {
  888. EnterLock(coreIdx);
  889. }
  890. ret = ProductVpuReset(coreIdx, resetMode);
  891. if (pCodecInst) {
  892. if (pCodecInst->loggingEnable) {
  893. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 0);
  894. }
  895. SetPendingInst(pCodecInst->coreIdx, 0);
  896. LeaveLock(coreIdx);
  897. }
  898. else {
  899. LeaveLock(coreIdx);
  900. }
  901. }
  902. return ret;
  903. }
  904. //---- VPU_SLEEP/WAKE
  905. RetCode VPU_SleepWake(Uint32 coreIdx, int iSleepWake)
  906. {
  907. RetCode ret;
  908. EnterLock(coreIdx);
  909. ret = ProductVpuSleepWake(coreIdx, iSleepWake, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  910. LeaveLock(coreIdx);
  911. return ret;
  912. }
  913. RetCode VPU_DecStartOneFrame(DecHandle handle, DecParam *param)
  914. {
  915. CodecInst* pCodecInst;
  916. DecInfo* pDecInfo;
  917. Uint32 val = 0;
  918. RetCode ret = RETCODE_SUCCESS;
  919. VpuAttr* pAttr = NULL;
  920. ret = CheckDecInstanceValidity(handle);
  921. if (ret != RETCODE_SUCCESS) {
  922. return ret;
  923. }
  924. pCodecInst = (CodecInst*)handle;
  925. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  926. if (pDecInfo->stride == 0) { // This means frame buffers have not been registered.
  927. return RETCODE_WRONG_CALL_SEQUENCE;
  928. }
  929. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  930. EnterLock(pCodecInst->coreIdx);
  931. if (GetPendingInst(pCodecInst->coreIdx)) {
  932. LeaveLock(pCodecInst->coreIdx);
  933. return RETCODE_FRAME_NOT_COMPLETE;
  934. }
  935. if (pAttr->supportCommandQueue == FALSE) {
  936. EnterDispFlagLock(pCodecInst->coreIdx);
  937. val = pDecInfo->frameDisplayFlag;
  938. val |= pDecInfo->setDisplayIndexes;
  939. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  940. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  941. pDecInfo->clearDisplayIndexes = 0;
  942. pDecInfo->setDisplayIndexes = 0;
  943. LeaveDispFlagLock(pCodecInst->coreIdx);
  944. }
  945. pDecInfo->frameStartPos = pDecInfo->streamRdPtr;
  946. ret = ProductVpuDecode(pCodecInst, param);
  947. if (pAttr->supportCommandQueue == TRUE) {
  948. SetPendingInst(pCodecInst->coreIdx, NULL);
  949. LeaveLock(pCodecInst->coreIdx);
  950. }
  951. else {
  952. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  953. }
  954. return ret;
  955. }
  956. RetCode VPU_DecGetOutputInfo(DecHandle handle, DecOutputInfo* info)
  957. {
  958. CodecInst* pCodecInst;
  959. DecInfo* pDecInfo;
  960. RetCode ret;
  961. VpuRect rectInfo;
  962. Uint32 val;
  963. Int32 decodedIndex;
  964. Int32 displayIndex;
  965. Uint32 maxDecIndex;
  966. VpuAttr* pAttr;
  967. ret = CheckDecInstanceValidity(handle);
  968. if (ret != RETCODE_SUCCESS) {
  969. return ret;
  970. }
  971. if (info == 0) {
  972. return RETCODE_INVALID_PARAM;
  973. }
  974. pCodecInst = handle;
  975. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  976. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  977. if (pAttr->supportCommandQueue == TRUE) {
  978. EnterLock(pCodecInst->coreIdx);
  979. }
  980. else {
  981. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  982. SetPendingInst(pCodecInst->coreIdx, 0);
  983. LeaveLock(pCodecInst->coreIdx);
  984. return RETCODE_WRONG_CALL_SEQUENCE;
  985. }
  986. }
  987. osal_memset((void*)info, 0x00, sizeof(DecOutputInfo));
  988. ret = ProductVpuDecGetResult(pCodecInst, info);
  989. if (ret != RETCODE_SUCCESS) {
  990. info->rdPtr = pDecInfo->streamRdPtr;
  991. info->wrPtr = pDecInfo->streamWrPtr;
  992. SetPendingInst(pCodecInst->coreIdx, 0);
  993. LeaveLock(pCodecInst->coreIdx);
  994. return ret;
  995. }
  996. decodedIndex = info->indexFrameDecoded;
  997. // Calculate display frame region
  998. val = 0;
  999. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1000. //default value
  1001. rectInfo.left = 0;
  1002. rectInfo.right = info->decPicWidth;
  1003. rectInfo.top = 0;
  1004. rectInfo.bottom = info->decPicHeight;
  1005. if (pCodecInst->codecMode == W_HEVC_DEC || pCodecInst->codecMode == AVC_DEC || pCodecInst->codecMode == AVS_DEC)
  1006. rectInfo = pDecInfo->initialInfo.picCropRect;
  1007. if (pCodecInst->codecMode == W_HEVC_DEC)
  1008. pDecInfo->decOutInfo[decodedIndex].decodedPOC = info->decodedPOC;
  1009. if (pCodecInst->codecMode == W_AVS2_DEC)
  1010. pDecInfo->decOutInfo[decodedIndex].avs2Info.decodedPOI = info->avs2Info.decodedPOI;
  1011. info->rcDecoded.left = pDecInfo->decOutInfo[decodedIndex].rcDecoded.left = rectInfo.left;
  1012. info->rcDecoded.right = pDecInfo->decOutInfo[decodedIndex].rcDecoded.right = rectInfo.right;
  1013. info->rcDecoded.top = pDecInfo->decOutInfo[decodedIndex].rcDecoded.top = rectInfo.top;
  1014. info->rcDecoded.bottom = pDecInfo->decOutInfo[decodedIndex].rcDecoded.bottom = rectInfo.bottom;
  1015. }
  1016. else
  1017. {
  1018. info->rcDecoded.left = 0;
  1019. info->rcDecoded.right = info->decPicWidth;
  1020. info->rcDecoded.top = 0;
  1021. info->rcDecoded.bottom = info->decPicHeight;
  1022. }
  1023. displayIndex = info->indexFrameDisplay;
  1024. if (info->indexFrameDisplay >= 0 && info->indexFrameDisplay < MAX_GDI_IDX)
  1025. {
  1026. if (pCodecInst->codecMode == VC1_DEC) // vc1 rotates decoded frame buffer region. the other std rotated whole frame buffer region.
  1027. {
  1028. if (pDecInfo->rotationEnable && (pDecInfo->rotationAngle==90 || pDecInfo->rotationAngle==270))
  1029. {
  1030. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1031. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1032. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1033. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1034. }
  1035. else
  1036. {
  1037. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1038. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1039. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1040. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1041. }
  1042. }
  1043. else
  1044. {
  1045. if (pDecInfo->rotationEnable)
  1046. {
  1047. switch(pDecInfo->rotationAngle)
  1048. {
  1049. case 90:
  1050. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1051. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1052. info->rcDisplay.top = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1053. info->rcDisplay.bottom = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1054. break;
  1055. case 270:
  1056. info->rcDisplay.left = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1057. info->rcDisplay.right = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1058. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1059. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1060. break;
  1061. case 180:
  1062. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1063. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1064. info->rcDisplay.top = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1065. info->rcDisplay.bottom = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1066. break;
  1067. default:
  1068. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1069. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1070. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1071. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1072. break;
  1073. }
  1074. }
  1075. else
  1076. {
  1077. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1078. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1079. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1080. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1081. }
  1082. if (pDecInfo->mirrorEnable) {
  1083. Uint32 temp;
  1084. Uint32 width = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicHeight: info->decPicWidth;
  1085. Uint32 height = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicWidth : info->decPicHeight;
  1086. if (pDecInfo->mirrorDirection & MIRDIR_VER) {
  1087. temp = info->rcDisplay.top;
  1088. info->rcDisplay.top = height - info->rcDisplay.bottom;
  1089. info->rcDisplay.bottom = height - temp;
  1090. }
  1091. if (pDecInfo->mirrorDirection & MIRDIR_HOR) {
  1092. temp = info->rcDisplay.left;
  1093. info->rcDisplay.left = width - info->rcDisplay.right;
  1094. info->rcDisplay.right = width - temp;
  1095. }
  1096. }
  1097. switch (pCodecInst->codecMode) {
  1098. case W_HEVC_DEC:
  1099. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1100. break;
  1101. case W_AVS2_DEC:
  1102. info->avs2Info.displayPOI = pDecInfo->decOutInfo[displayIndex].avs2Info.decodedPOI;
  1103. break;
  1104. case W_AVC_DEC:
  1105. if (TRUE == PRODUCT_ID_W_SERIES(pCodecInst->productId)) {
  1106. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1107. }
  1108. break;
  1109. default:
  1110. break;
  1111. }
  1112. }
  1113. if (info->indexFrameDisplay == info->indexFrameDecoded)
  1114. {
  1115. info->dispPicWidth = info->decPicWidth;
  1116. info->dispPicHeight = info->decPicHeight;
  1117. }
  1118. else
  1119. {
  1120. /*
  1121. When indexFrameDecoded < 0, and indexFrameDisplay >= 0
  1122. info->decPicWidth and info->decPicHeight are still valid
  1123. But those of pDecInfo->decOutInfo[displayIndex] are invalid in VP9
  1124. */
  1125. info->dispPicWidth = pDecInfo->decOutInfo[displayIndex].decPicWidth;
  1126. info->dispPicHeight = pDecInfo->decOutInfo[displayIndex].decPicHeight;
  1127. }
  1128. if (pDecInfo->scalerEnable == TRUE) {
  1129. if ((pDecInfo->scaleWidth != 0) && (pDecInfo->scaleHeight != 0)) {
  1130. info->dispPicWidth = pDecInfo->scaleWidth;
  1131. info->dispPicHeight = pDecInfo->scaleHeight;
  1132. info->rcDisplay.right = pDecInfo->scaleWidth;
  1133. info->rcDisplay.bottom = pDecInfo->scaleHeight;
  1134. }
  1135. }
  1136. }
  1137. else
  1138. {
  1139. info->rcDisplay.left = 0;
  1140. info->rcDisplay.right = 0;
  1141. info->rcDisplay.top = 0;
  1142. info->rcDisplay.bottom = 0;
  1143. if (pDecInfo->rotationEnable || pDecInfo->mirrorEnable || pDecInfo->tiled2LinearEnable || pDecInfo->deringEnable) {
  1144. info->dispPicWidth = info->decPicWidth;
  1145. info->dispPicHeight = info->decPicHeight;
  1146. }
  1147. else {
  1148. info->dispPicWidth = 0;
  1149. info->dispPicHeight = 0;
  1150. }
  1151. }
  1152. if ( (pCodecInst->codecMode == VC1_DEC ) && info->indexFrameDisplay != -3) {
  1153. if (pDecInfo->vc1BframeDisplayValid == 0) {
  1154. if (info->picType == 2)
  1155. info->indexFrameDisplay = -3;
  1156. else
  1157. pDecInfo->vc1BframeDisplayValid = 1;
  1158. }
  1159. }
  1160. pDecInfo->streamRdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  1161. pDecInfo->frameDisplayFlag = VpuReadReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr);
  1162. if (pCodecInst->codecMode == W_VP9_DEC) {
  1163. pDecInfo->frameDisplayFlag &= 0xFFFF;
  1164. }
  1165. pDecInfo->frameEndPos = pDecInfo->streamRdPtr;
  1166. if (pDecInfo->frameEndPos < pDecInfo->frameStartPos)
  1167. info->consumedByte = pDecInfo->frameEndPos + pDecInfo->streamBufSize - pDecInfo->frameStartPos;
  1168. else
  1169. info->consumedByte = pDecInfo->frameEndPos - pDecInfo->frameStartPos;
  1170. if (pDecInfo->deringEnable || pDecInfo->mirrorEnable || pDecInfo->rotationEnable || pDecInfo->tiled2LinearEnable) {
  1171. info->dispFrame = pDecInfo->rotatorOutput;
  1172. info->dispFrame.stride = pDecInfo->rotatorStride;
  1173. }
  1174. else {
  1175. Int32 SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1176. val = (pDecInfo->openParam.wtlEnable == TRUE ? pDecInfo->numFbsForDecoding: 0); //fbOffset
  1177. if (SvacSvcFlag && pDecInfo->openParam.wtlEnable == TRUE)
  1178. val = pDecInfo->numFbsForDecoding*2;
  1179. maxDecIndex = (pDecInfo->numFbsForDecoding > pDecInfo->numFbsForWTL) ? (SvacSvcFlag ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding) : pDecInfo->numFbsForWTL;
  1180. if (0 <= info->indexFrameDisplay && info->indexFrameDisplay < (int)maxDecIndex)
  1181. info->dispFrame = pDecInfo->frameBufPool[val+info->indexFrameDisplay];
  1182. }
  1183. info->rdPtr = pDecInfo->streamRdPtr;
  1184. info->wrPtr = pDecInfo->streamWrPtr;
  1185. info->frameDisplayFlag = pDecInfo->frameDisplayFlag;
  1186. info->sequenceNo = pDecInfo->initialInfo.sequenceNo;
  1187. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1188. pDecInfo->decOutInfo[decodedIndex] = *info;
  1189. }
  1190. if (displayIndex >= 0 && displayIndex < MAX_GDI_IDX) {
  1191. info->numOfTotMBs = info->numOfTotMBs;
  1192. info->numOfErrMBs = info->numOfErrMBs;
  1193. info->numOfTotMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfTotMBs;
  1194. info->numOfErrMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfErrMBs;
  1195. info->dispFrame.sequenceNo = info->sequenceNo;
  1196. }
  1197. else {
  1198. info->numOfTotMBsInDisplay = 0;
  1199. info->numOfErrMBsInDisplay = 0;
  1200. }
  1201. if (info->sequenceChanged != 0) {
  1202. if (!(pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)) {
  1203. /* Update new sequence information */
  1204. osal_memcpy((void*)&pDecInfo->initialInfo, (void*)&pDecInfo->newSeqInfo, sizeof(DecInitialInfo));
  1205. }
  1206. if ((info->sequenceChanged & SEQ_CHANGE_INTER_RES_CHANGE) != SEQ_CHANGE_INTER_RES_CHANGE) {
  1207. pDecInfo->initialInfo.sequenceNo++;
  1208. }
  1209. }
  1210. SetPendingInst(pCodecInst->coreIdx, 0);
  1211. LeaveLock(pCodecInst->coreIdx);
  1212. return RETCODE_SUCCESS;
  1213. }
  1214. RetCode VPU_DecFrameBufferFlush(DecHandle handle, DecOutputInfo* pRemainings, Uint32* retNum)
  1215. {
  1216. CodecInst* pCodecInst;
  1217. DecInfo* pDecInfo;
  1218. DecOutputInfo* pOut;
  1219. RetCode ret;
  1220. FramebufferIndex retIndex[MAX_GDI_IDX];
  1221. Uint32 retRemainings = 0;
  1222. Int32 i, index, val;
  1223. VpuAttr* pAttr = NULL;
  1224. ret = CheckDecInstanceValidity(handle);
  1225. if (ret != RETCODE_SUCCESS)
  1226. return ret;
  1227. pCodecInst = handle;
  1228. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1229. EnterLock(pCodecInst->coreIdx);
  1230. if (GetPendingInst(pCodecInst->coreIdx)) {
  1231. LeaveLock(pCodecInst->coreIdx);
  1232. return RETCODE_FRAME_NOT_COMPLETE;
  1233. }
  1234. osal_memset((void*)retIndex, 0xff, sizeof(retIndex));
  1235. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1236. if (pAttr->supportCommandQueue == FALSE) {
  1237. EnterDispFlagLock(pCodecInst->coreIdx);
  1238. val = pDecInfo->frameDisplayFlag;
  1239. val |= pDecInfo->setDisplayIndexes;
  1240. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  1241. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  1242. pDecInfo->clearDisplayIndexes = 0;
  1243. pDecInfo->setDisplayIndexes = 0;
  1244. LeaveDispFlagLock(pCodecInst->coreIdx);
  1245. }
  1246. if ((ret=ProductVpuDecFlush(pCodecInst, retIndex, MAX_GDI_IDX)) != RETCODE_SUCCESS) {
  1247. LeaveLock(pCodecInst->coreIdx);
  1248. return ret;
  1249. }
  1250. if (pRemainings != NULL) {
  1251. for (i=0; i<MAX_GDI_IDX; i++) {
  1252. index = (pDecInfo->wtlEnable == TRUE) ? retIndex[i].tiledIndex : retIndex[i].linearIndex;
  1253. if (index < 0)
  1254. break;
  1255. pRemainings[i] = pDecInfo->decOutInfo[index];
  1256. pOut = &pRemainings[i];
  1257. pOut->indexFrameDisplay = pOut->indexFrameDecoded;
  1258. pOut->indexFrameDisplayForTiled = pOut->indexFrameDecodedForTiled;
  1259. if (pDecInfo->wtlEnable == TRUE)
  1260. pOut->dispFrame = pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding+retIndex[i].linearIndex];
  1261. else
  1262. pOut->dispFrame = pDecInfo->frameBufPool[index];
  1263. pOut->dispFrame.sequenceNo = pOut->sequenceNo;
  1264. if (pCodecInst->codecMode == W_VP9_DEC || pCodecInst->codecMode == W_AVS2_DEC) {
  1265. Uint32 regVal;
  1266. if ((pDecInfo->scaleWidth == 0) || (pDecInfo->scaleHeight == 0)) {
  1267. regVal = VpuReadReg(pCodecInst->coreIdx, W5_RET_DEC_DISPLAY_SIZE);
  1268. pOut->dispPicWidth = regVal>>16;
  1269. pOut->dispPicHeight = regVal&0xffff;
  1270. }
  1271. else {
  1272. pOut->dispPicWidth = pDecInfo->scaleWidth;
  1273. pOut->dispPicHeight = pDecInfo->scaleHeight;
  1274. }
  1275. }
  1276. else {
  1277. pOut->dispPicWidth = pOut->decPicWidth;
  1278. pOut->dispPicHeight = pOut->decPicHeight;
  1279. }
  1280. if (pDecInfo->rotationEnable)
  1281. {
  1282. switch(pDecInfo->rotationAngle)
  1283. {
  1284. case 90:
  1285. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.top;
  1286. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1287. pOut->rcDisplay.top = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.right;
  1288. pOut->rcDisplay.bottom = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.left;
  1289. break;
  1290. case 270:
  1291. pOut->rcDisplay.left = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1292. pOut->rcDisplay.right = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1293. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.left;
  1294. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.right;
  1295. break;
  1296. case 180:
  1297. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1298. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1299. pOut->rcDisplay.top = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1300. pOut->rcDisplay.bottom = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1301. break;
  1302. default:
  1303. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1304. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1305. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1306. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1307. break;
  1308. }
  1309. }
  1310. else
  1311. {
  1312. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1313. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1314. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1315. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1316. }
  1317. retRemainings++;
  1318. }
  1319. }
  1320. if (retNum) *retNum = retRemainings;
  1321. if (pCodecInst->loggingEnable)
  1322. vdi_log(pCodecInst->coreIdx, DEC_BUF_FLUSH, 0);
  1323. LeaveLock(pCodecInst->coreIdx);
  1324. return ret;
  1325. }
  1326. RetCode VPU_DecSetRdPtr(DecHandle handle, PhysicalAddress addr, int updateWrPtr)
  1327. {
  1328. CodecInst* pCodecInst;
  1329. CodecInst* pPendingInst;
  1330. DecInfo* pDecInfo;
  1331. RetCode ret;
  1332. ret = CheckDecInstanceValidity(handle);
  1333. if (ret != RETCODE_SUCCESS) {
  1334. return ret;
  1335. }
  1336. pCodecInst = (CodecInst*)handle;
  1337. ret = ProductVpuDecCheckCapability(pCodecInst);
  1338. if (ret != RETCODE_SUCCESS) {
  1339. return ret;
  1340. }
  1341. pCodecInst = handle;
  1342. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1343. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1344. if (pCodecInst == pPendingInst) {
  1345. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1346. }
  1347. else {
  1348. EnterLock(pCodecInst->coreIdx);
  1349. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1350. LeaveLock(pCodecInst->coreIdx);
  1351. }
  1352. pDecInfo->streamRdPtr = addr;
  1353. pDecInfo->prevFrameEndPos = addr;
  1354. if (updateWrPtr == TRUE) {
  1355. pDecInfo->streamWrPtr = addr;
  1356. }
  1357. pDecInfo->rdPtrValidFlag = 1;
  1358. return RETCODE_SUCCESS;
  1359. }
  1360. RetCode VPU_EncSetWrPtr(EncHandle handle, PhysicalAddress addr, int updateRdPtr)
  1361. {
  1362. CodecInst* pCodecInst;
  1363. CodecInst* pPendingInst;
  1364. EncInfo * pEncInfo;
  1365. RetCode ret;
  1366. ret = CheckEncInstanceValidity(handle);
  1367. if (ret != RETCODE_SUCCESS)
  1368. return ret;
  1369. pCodecInst = (CodecInst*)handle;
  1370. if (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980) {
  1371. return RETCODE_NOT_SUPPORTED_FEATURE;
  1372. }
  1373. pEncInfo = &handle->CodecInfo->encInfo;
  1374. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1375. if (pCodecInst == pPendingInst) {
  1376. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1377. }
  1378. else {
  1379. EnterLock(pCodecInst->coreIdx);
  1380. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1381. LeaveLock(pCodecInst->coreIdx);
  1382. }
  1383. pEncInfo->streamWrPtr = addr;
  1384. if (updateRdPtr)
  1385. pEncInfo->streamRdPtr = addr;
  1386. return RETCODE_SUCCESS;
  1387. }
  1388. RetCode VPU_DecClrDispFlag(DecHandle handle, int index)
  1389. {
  1390. CodecInst* pCodecInst;
  1391. DecInfo* pDecInfo;
  1392. RetCode ret = RETCODE_SUCCESS;
  1393. Int32 endIndex, SvacSvcFlag;
  1394. VpuAttr* pAttr = NULL;
  1395. BOOL supportCommandQueue;
  1396. ret = CheckDecInstanceValidity(handle);
  1397. if (ret != RETCODE_SUCCESS)
  1398. return ret;
  1399. pCodecInst = handle;
  1400. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1401. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1402. SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1403. endIndex = (pDecInfo->openParam.wtlEnable == TRUE) ? pDecInfo->numFbsForWTL : (SvacSvcFlag == TRUE ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding);
  1404. if ((index < 0) || (index > (endIndex - 1))) {
  1405. return RETCODE_INVALID_PARAM;
  1406. }
  1407. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1408. if (supportCommandQueue == TRUE) {
  1409. EnterLock(pCodecInst->coreIdx);
  1410. ret = ProductClrDispFlag(pCodecInst, index);
  1411. LeaveLock(pCodecInst->coreIdx);
  1412. }
  1413. else {
  1414. EnterDispFlagLock(pCodecInst->coreIdx);
  1415. pDecInfo->clearDisplayIndexes |= (1<<index);
  1416. LeaveDispFlagLock(pCodecInst->coreIdx);
  1417. }
  1418. return ret;
  1419. }
  1420. RetCode VPU_DecGiveCommand(DecHandle handle, CodecCommand cmd, void* param)
  1421. {
  1422. CodecInst* pCodecInst;
  1423. DecInfo* pDecInfo;
  1424. RetCode ret;
  1425. ret = CheckDecInstanceValidity(handle);
  1426. if (ret != RETCODE_SUCCESS)
  1427. return ret;
  1428. pCodecInst = handle;
  1429. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1430. switch (cmd)
  1431. {
  1432. case ENABLE_ROTATION :
  1433. {
  1434. if (pDecInfo->rotatorStride == 0) {
  1435. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1436. }
  1437. pDecInfo->rotationEnable = 1;
  1438. break;
  1439. }
  1440. case DISABLE_ROTATION :
  1441. {
  1442. pDecInfo->rotationEnable = 0;
  1443. break;
  1444. }
  1445. case ENABLE_MIRRORING :
  1446. {
  1447. if (pDecInfo->rotatorStride == 0) {
  1448. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1449. }
  1450. pDecInfo->mirrorEnable = 1;
  1451. break;
  1452. }
  1453. case DISABLE_MIRRORING :
  1454. {
  1455. pDecInfo->mirrorEnable = 0;
  1456. break;
  1457. }
  1458. case SET_MIRROR_DIRECTION :
  1459. {
  1460. MirrorDirection mirDir;
  1461. if (param == 0) {
  1462. return RETCODE_INVALID_PARAM;
  1463. }
  1464. mirDir = *(MirrorDirection *)param;
  1465. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  1466. return RETCODE_INVALID_PARAM;
  1467. }
  1468. pDecInfo->mirrorDirection = mirDir;
  1469. break;
  1470. }
  1471. case SET_ROTATION_ANGLE :
  1472. {
  1473. int angle;
  1474. if (param == 0) {
  1475. return RETCODE_INVALID_PARAM;
  1476. }
  1477. angle = *(int *)param;
  1478. if (angle != 0 && angle != 90 &&
  1479. angle != 180 && angle != 270) {
  1480. return RETCODE_INVALID_PARAM;
  1481. }
  1482. if (pDecInfo->rotatorStride != 0) {
  1483. if (angle == 90 || angle ==270) {
  1484. if (pDecInfo->initialInfo.picHeight > pDecInfo->rotatorStride) {
  1485. return RETCODE_INVALID_PARAM;
  1486. }
  1487. } else {
  1488. if (pDecInfo->initialInfo.picWidth > pDecInfo->rotatorStride) {
  1489. return RETCODE_INVALID_PARAM;
  1490. }
  1491. }
  1492. }
  1493. pDecInfo->rotationAngle = angle;
  1494. break;
  1495. }
  1496. case SET_ROTATOR_OUTPUT :
  1497. {
  1498. FrameBuffer *frame;
  1499. if (param == 0) {
  1500. return RETCODE_INVALID_PARAM;
  1501. }
  1502. frame = (FrameBuffer *)param;
  1503. pDecInfo->rotatorOutput = *frame;
  1504. pDecInfo->rotatorOutputValid = 1;
  1505. break;
  1506. }
  1507. case SET_ROTATOR_STRIDE :
  1508. {
  1509. int stride;
  1510. if (param == 0) {
  1511. return RETCODE_INVALID_PARAM;
  1512. }
  1513. stride = *(int *)param;
  1514. if (stride % 8 != 0 || stride == 0) {
  1515. return RETCODE_INVALID_STRIDE;
  1516. }
  1517. if (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) {
  1518. if (pDecInfo->initialInfo.picHeight > stride) {
  1519. return RETCODE_INVALID_STRIDE;
  1520. }
  1521. } else {
  1522. if (pDecInfo->initialInfo.picWidth > stride) {
  1523. return RETCODE_INVALID_STRIDE;
  1524. }
  1525. }
  1526. pDecInfo->rotatorStride = stride;
  1527. break;
  1528. }
  1529. case DEC_SET_SPS_RBSP:
  1530. {
  1531. if (pCodecInst->codecMode != AVC_DEC) {
  1532. return RETCODE_INVALID_COMMAND;
  1533. }
  1534. if (param == 0) {
  1535. return RETCODE_INVALID_PARAM;
  1536. }
  1537. return SetParaSet(handle, 0, (DecParamSet *)param);
  1538. }
  1539. case DEC_SET_PPS_RBSP:
  1540. {
  1541. if (pCodecInst->codecMode != AVC_DEC) {
  1542. return RETCODE_INVALID_COMMAND;
  1543. }
  1544. if (param == 0) {
  1545. return RETCODE_INVALID_PARAM;
  1546. }
  1547. return SetParaSet(handle, 1, (DecParamSet *)param);
  1548. }
  1549. case ENABLE_DERING :
  1550. {
  1551. if (pDecInfo->rotatorStride == 0) {
  1552. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1553. }
  1554. pDecInfo->deringEnable = 1;
  1555. break;
  1556. }
  1557. case DISABLE_DERING :
  1558. {
  1559. pDecInfo->deringEnable = 0;
  1560. break;
  1561. }
  1562. case SET_SEC_AXI:
  1563. {
  1564. SecAxiUse secAxiUse;
  1565. if (param == 0) {
  1566. return RETCODE_INVALID_PARAM;
  1567. }
  1568. secAxiUse = *(SecAxiUse *)param;
  1569. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 ||
  1570. handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511 || handle->productId == PRODUCT_ID_517) {
  1571. pDecInfo->secAxiInfo.u.wave.useIpEnable = secAxiUse.u.wave.useIpEnable;
  1572. pDecInfo->secAxiInfo.u.wave.useLfRowEnable = secAxiUse.u.wave.useLfRowEnable;
  1573. pDecInfo->secAxiInfo.u.wave.useBitEnable = secAxiUse.u.wave.useBitEnable;
  1574. pDecInfo->secAxiInfo.u.wave.useSclEnable = secAxiUse.u.wave.useSclEnable;
  1575. }
  1576. else {
  1577. pDecInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  1578. pDecInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  1579. pDecInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  1580. pDecInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  1581. pDecInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  1582. pDecInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  1583. }
  1584. break;
  1585. }
  1586. case ENABLE_REP_USERDATA:
  1587. {
  1588. if (!pDecInfo->userDataBufAddr) {
  1589. return RETCODE_USERDATA_BUF_NOT_SET;
  1590. }
  1591. if (pDecInfo->userDataBufSize == 0) {
  1592. return RETCODE_USERDATA_BUF_NOT_SET;
  1593. }
  1594. switch (pCodecInst->productId) {
  1595. case PRODUCT_ID_512:
  1596. case PRODUCT_ID_515:
  1597. case PRODUCT_ID_521:
  1598. case PRODUCT_ID_511:
  1599. case PRODUCT_ID_517:
  1600. if (!param)
  1601. return RETCODE_INVALID_PARAM;
  1602. pDecInfo->userDataEnable = *(Uint32*)param;
  1603. break;
  1604. case PRODUCT_ID_960:
  1605. case PRODUCT_ID_980:
  1606. pDecInfo->userDataEnable = TRUE;
  1607. break;
  1608. default:
  1609. VLOG(INFO, "%s(ENABLE_REP_DATA) invalid productId(%d)\n", __FUNCTION__, pCodecInst->productId);
  1610. return RETCODE_INVALID_PARAM;
  1611. }
  1612. break;
  1613. }
  1614. case DISABLE_REP_USERDATA:
  1615. {
  1616. pDecInfo->userDataEnable = 0;
  1617. break;
  1618. }
  1619. case SET_ADDR_REP_USERDATA:
  1620. {
  1621. PhysicalAddress userDataBufAddr;
  1622. if (param == 0) {
  1623. return RETCODE_INVALID_PARAM;
  1624. }
  1625. userDataBufAddr = *(PhysicalAddress *)param;
  1626. if (userDataBufAddr % 8 != 0 || userDataBufAddr == 0) {
  1627. return RETCODE_INVALID_PARAM;
  1628. }
  1629. pDecInfo->userDataBufAddr = userDataBufAddr;
  1630. break;
  1631. }
  1632. case SET_VIRT_ADDR_REP_USERDATA:
  1633. {
  1634. unsigned long userDataVirtAddr;
  1635. if (param == 0) {
  1636. return RETCODE_INVALID_PARAM;
  1637. }
  1638. if (!pDecInfo->userDataBufAddr) {
  1639. return RETCODE_USERDATA_BUF_NOT_SET;
  1640. }
  1641. if (pDecInfo->userDataBufSize == 0) {
  1642. return RETCODE_USERDATA_BUF_NOT_SET;
  1643. }
  1644. userDataVirtAddr = *(unsigned long *)param;
  1645. if (!userDataVirtAddr) {
  1646. return RETCODE_INVALID_PARAM;
  1647. }
  1648. pDecInfo->vbUserData.phys_addr = pDecInfo->userDataBufAddr;
  1649. pDecInfo->vbUserData.size = pDecInfo->userDataBufSize;
  1650. pDecInfo->vbUserData.virt_addr = (unsigned long)userDataVirtAddr;
  1651. if (vdi_attach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData) != 0) {
  1652. return RETCODE_INSUFFICIENT_RESOURCE;
  1653. }
  1654. break;
  1655. }
  1656. case SET_SIZE_REP_USERDATA:
  1657. {
  1658. PhysicalAddress userDataBufSize;
  1659. if (param == 0) {
  1660. return RETCODE_INVALID_PARAM;
  1661. }
  1662. userDataBufSize = *(PhysicalAddress *)param;
  1663. pDecInfo->userDataBufSize = userDataBufSize;
  1664. break;
  1665. }
  1666. case SET_USERDATA_REPORT_MODE:
  1667. {
  1668. int userDataMode;
  1669. userDataMode = *(int *)param;
  1670. if (userDataMode != 1 && userDataMode != 0) {
  1671. return RETCODE_INVALID_PARAM;
  1672. }
  1673. pDecInfo->userDataReportMode = userDataMode;
  1674. break;
  1675. }
  1676. case SET_CACHE_CONFIG:
  1677. {
  1678. MaverickCacheConfig *mcCacheConfig;
  1679. if (param == 0) {
  1680. return RETCODE_INVALID_PARAM;
  1681. }
  1682. mcCacheConfig = (MaverickCacheConfig *)param;
  1683. pDecInfo->cacheConfig = *mcCacheConfig;
  1684. }
  1685. break;
  1686. case SET_LOW_DELAY_CONFIG:
  1687. {
  1688. LowDelayInfo *lowDelayInfo;
  1689. if (param == 0) {
  1690. return RETCODE_INVALID_PARAM;
  1691. }
  1692. if (pCodecInst->productId != PRODUCT_ID_980) {
  1693. return RETCODE_NOT_SUPPORTED_FEATURE;
  1694. }
  1695. lowDelayInfo = (LowDelayInfo *)param;
  1696. if (lowDelayInfo->lowDelayEn) {
  1697. if ( (pCodecInst->codecMode != AVC_DEC) ||
  1698. pDecInfo->rotationEnable ||
  1699. pDecInfo->mirrorEnable ||
  1700. pDecInfo->tiled2LinearEnable ||
  1701. pDecInfo->deringEnable) {
  1702. return RETCODE_INVALID_PARAM;
  1703. }
  1704. }
  1705. pDecInfo->lowDelayInfo.lowDelayEn = lowDelayInfo->lowDelayEn;
  1706. pDecInfo->lowDelayInfo.numRows = lowDelayInfo->numRows;
  1707. }
  1708. break;
  1709. case DEC_SET_FRAME_DELAY:
  1710. {
  1711. pDecInfo->frameDelay = *(int *)param;
  1712. break;
  1713. }
  1714. case DEC_ENABLE_REORDER:
  1715. {
  1716. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1717. {
  1718. if (pDecInfo->initialInfoObtained) {
  1719. return RETCODE_WRONG_CALL_SEQUENCE;
  1720. }
  1721. }
  1722. pDecInfo->reorderEnable = 1;
  1723. break;
  1724. }
  1725. case DEC_DISABLE_REORDER:
  1726. {
  1727. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1728. {
  1729. if (pDecInfo->initialInfoObtained) {
  1730. return RETCODE_WRONG_CALL_SEQUENCE;
  1731. }
  1732. if(pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != VC1_DEC && pCodecInst->codecMode != AVS_DEC) {
  1733. return RETCODE_INVALID_COMMAND;
  1734. }
  1735. }
  1736. pDecInfo->reorderEnable = 0;
  1737. break;
  1738. }
  1739. case DEC_SET_AVC_ERROR_CONCEAL_MODE:
  1740. {
  1741. if(pCodecInst->codecMode != AVC_DEC) {
  1742. return RETCODE_INVALID_COMMAND;
  1743. }
  1744. pDecInfo->avcErrorConcealMode = *(int *)param;
  1745. break;
  1746. }
  1747. case DEC_FREE_FRAME_BUFFER:
  1748. {
  1749. int i;
  1750. if (pDecInfo->vbSlice.size)
  1751. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  1752. if (pDecInfo->vbFrame.size){
  1753. if (pDecInfo->frameAllocExt == 0)
  1754. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  1755. }
  1756. for (i=0 ; i<MAX_REG_FRAME; i++) {
  1757. if (pDecInfo->vbFbcYTbl[i].size)
  1758. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  1759. if (pDecInfo->vbFbcCTbl[i].size)
  1760. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  1761. if (pDecInfo->vbMV[i].size)
  1762. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  1763. }
  1764. if (pDecInfo->vbPPU.size) {
  1765. if (pDecInfo->ppuAllocExt == 0)
  1766. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  1767. }
  1768. if (pDecInfo->wtlEnable) {
  1769. if (pDecInfo->vbWTL.size)
  1770. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  1771. }
  1772. break;
  1773. }
  1774. case DEC_GET_FRAMEBUF_INFO:
  1775. {
  1776. DecGetFramebufInfo* fbInfo = (DecGetFramebufInfo*)param;
  1777. Uint32 i;
  1778. fbInfo->vbFrame = pDecInfo->vbFrame;
  1779. fbInfo->vbWTL = pDecInfo->vbWTL;
  1780. for (i=0 ; i<MAX_REG_FRAME; i++)
  1781. {
  1782. fbInfo->vbFbcYTbl[i] = pDecInfo->vbFbcYTbl[i];
  1783. fbInfo->vbFbcCTbl[i] = pDecInfo->vbFbcCTbl[i];
  1784. fbInfo->vbMvCol[i] = pDecInfo->vbMV[i];
  1785. }
  1786. for (i=0; i<MAX_GDI_IDX*2; i++) {
  1787. fbInfo->framebufPool[i] = pDecInfo->frameBufPool[i];
  1788. }
  1789. fbInfo->vbTask = pDecInfo->vbTask;
  1790. }
  1791. break;
  1792. case DEC_RESET_FRAMEBUF_INFO:
  1793. {
  1794. int i;
  1795. pDecInfo->vbFrame.base = 0;
  1796. pDecInfo->vbFrame.phys_addr = 0;
  1797. pDecInfo->vbFrame.virt_addr = 0;
  1798. pDecInfo->vbFrame.size = 0;
  1799. pDecInfo->vbWTL.base = 0;
  1800. pDecInfo->vbWTL.phys_addr = 0;
  1801. pDecInfo->vbWTL.virt_addr = 0;
  1802. pDecInfo->vbWTL.size = 0;
  1803. for (i=0 ; i<MAX_REG_FRAME; i++)
  1804. {
  1805. pDecInfo->vbFbcYTbl[i].base = 0;
  1806. pDecInfo->vbFbcYTbl[i].phys_addr = 0;
  1807. pDecInfo->vbFbcYTbl[i].virt_addr = 0;
  1808. pDecInfo->vbFbcYTbl[i].size = 0;
  1809. pDecInfo->vbFbcCTbl[i].base = 0;
  1810. pDecInfo->vbFbcCTbl[i].phys_addr = 0;
  1811. pDecInfo->vbFbcCTbl[i].virt_addr = 0;
  1812. pDecInfo->vbFbcCTbl[i].size = 0;
  1813. pDecInfo->vbMV[i].base = 0;
  1814. pDecInfo->vbMV[i].phys_addr = 0;
  1815. pDecInfo->vbMV[i].virt_addr = 0;
  1816. pDecInfo->vbMV[i].size = 0;
  1817. }
  1818. pDecInfo->frameDisplayFlag = 0;
  1819. pDecInfo->setDisplayIndexes = 0;
  1820. pDecInfo->clearDisplayIndexes = 0;
  1821. break;
  1822. }
  1823. case DEC_GET_QUEUE_STATUS:
  1824. {
  1825. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  1826. queueInfo->instanceQueueCount = pDecInfo->instanceQueueCount;
  1827. queueInfo->reportQueueCount = pDecInfo->reportQueueCount;
  1828. break;
  1829. }
  1830. case ENABLE_DEC_THUMBNAIL_MODE:
  1831. {
  1832. pDecInfo->thumbnailMode = 1;
  1833. break;
  1834. }
  1835. case DEC_GET_SEQ_INFO:
  1836. {
  1837. DecInitialInfo* seqInfo = (DecInitialInfo*)param;
  1838. *seqInfo = pDecInfo->initialInfo;
  1839. break;
  1840. }
  1841. case DEC_GET_FIELD_PIC_TYPE:
  1842. {
  1843. return RETCODE_FAILURE;
  1844. }
  1845. case DEC_GET_DISPLAY_OUTPUT_INFO:
  1846. {
  1847. DecOutputInfo *pDecOutInfo = (DecOutputInfo *)param;
  1848. *pDecOutInfo = pDecInfo->decOutInfo[pDecOutInfo->indexFrameDisplay];
  1849. break;
  1850. }
  1851. case GET_TILEDMAP_CONFIG:
  1852. {
  1853. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  1854. if (!pMapCfg) {
  1855. return RETCODE_INVALID_PARAM;
  1856. }
  1857. if (!pDecInfo->stride) {
  1858. return RETCODE_WRONG_CALL_SEQUENCE;
  1859. }
  1860. *pMapCfg = pDecInfo->mapCfg;
  1861. break;
  1862. }
  1863. case SET_DRAM_CONFIG:
  1864. {
  1865. DRAMConfig *cfg = (DRAMConfig *)param;
  1866. if (!cfg) {
  1867. return RETCODE_INVALID_PARAM;
  1868. }
  1869. pDecInfo->dramCfg = *cfg;
  1870. break;
  1871. }
  1872. case GET_DRAM_CONFIG:
  1873. {
  1874. DRAMConfig *cfg = (DRAMConfig *)param;
  1875. if (!cfg) {
  1876. return RETCODE_INVALID_PARAM;
  1877. }
  1878. *cfg = pDecInfo->dramCfg;
  1879. break;
  1880. }
  1881. case GET_LOW_DELAY_OUTPUT:
  1882. {
  1883. DecOutputInfo *lowDelayOutput;
  1884. if (param == 0) {
  1885. return RETCODE_INVALID_PARAM;
  1886. }
  1887. if (!pDecInfo->lowDelayInfo.lowDelayEn || pCodecInst->codecMode != AVC_DEC) {
  1888. return RETCODE_INVALID_COMMAND;
  1889. }
  1890. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  1891. return RETCODE_WRONG_CALL_SEQUENCE;
  1892. }
  1893. lowDelayOutput = (DecOutputInfo *)param;
  1894. GetLowDelayOutput(pCodecInst, lowDelayOutput);
  1895. }
  1896. break;
  1897. case ENABLE_LOGGING:
  1898. {
  1899. pCodecInst->loggingEnable = 1;
  1900. }
  1901. break;
  1902. case DISABLE_LOGGING:
  1903. {
  1904. pCodecInst->loggingEnable = 0;
  1905. }
  1906. break;
  1907. case DEC_SET_SEQ_CHANGE_MASK:
  1908. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId))
  1909. return RETCODE_INVALID_PARAM;
  1910. pDecInfo->seqChangeMask = *(int*)param;
  1911. break;
  1912. case DEC_SET_WTL_FRAME_FORMAT:
  1913. pDecInfo->wtlFormat = *(FrameBufferFormat*)param;
  1914. break;
  1915. case DEC_SET_DISPLAY_FLAG:
  1916. {
  1917. Int32 index;
  1918. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1919. BOOL supportCommandQueue = FALSE;
  1920. if (param == 0) {
  1921. return RETCODE_INVALID_PARAM;
  1922. }
  1923. index = *(Int32 *)param;
  1924. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1925. if (supportCommandQueue == TRUE) {
  1926. EnterLock(pCodecInst->coreIdx);
  1927. ProductSetDispFlag(pCodecInst, index);
  1928. LeaveLock(pCodecInst->coreIdx);
  1929. }
  1930. else {
  1931. EnterDispFlagLock(pCodecInst->coreIdx);
  1932. pDecInfo->setDisplayIndexes |= (1<<index);
  1933. LeaveDispFlagLock(pCodecInst->coreIdx);
  1934. }
  1935. }
  1936. break;
  1937. case DEC_GET_SCALER_INFO:
  1938. {
  1939. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1940. if (scalerInfo == NULL) {
  1941. return RETCODE_INVALID_PARAM;
  1942. }
  1943. scalerInfo->enScaler = pDecInfo->scalerEnable;
  1944. scalerInfo->scaleWidth = pDecInfo->scaleWidth;
  1945. scalerInfo->scaleHeight = pDecInfo->scaleHeight;
  1946. }
  1947. break;
  1948. case DEC_SET_SCALER_INFO:
  1949. {
  1950. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1951. if (!pDecInfo->initialInfoObtained) {
  1952. return RETCODE_WRONG_CALL_SEQUENCE;
  1953. }
  1954. if (scalerInfo == NULL) {
  1955. return RETCODE_INVALID_PARAM;
  1956. }
  1957. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1958. if (scalerInfo->enScaler == TRUE) {
  1959. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1960. Uint32 scalerStep = (pAttr->support2AlignScaler == TRUE) ? 2 : 8;
  1961. // minW = Ceil8(picWidth/8), minH = Ceil8(picHeight/8)
  1962. Uint32 minScaleWidth = VPU_ALIGN8(pDecInfo->initialInfo.picWidth>>3);
  1963. Uint32 minScaleHeight = VPU_ALIGN8(pDecInfo->initialInfo.picHeight>>3);
  1964. if (minScaleWidth == 0) minScaleWidth = 8;
  1965. if (minScaleHeight == 0) minScaleHeight = 8;
  1966. if (scalerInfo->scaleWidth < minScaleWidth || scalerInfo->scaleHeight < minScaleHeight) {
  1967. return RETCODE_INVALID_PARAM;
  1968. }
  1969. if (scalerInfo->scaleWidth > 0 || scalerInfo->scaleHeight > 0) {
  1970. if ((scalerInfo->scaleWidth % scalerStep) || scalerInfo->scaleWidth > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picWidth))) {
  1971. return RETCODE_INVALID_PARAM;
  1972. }
  1973. if ((scalerInfo->scaleHeight % scalerStep) || scalerInfo->scaleHeight > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picHeight))) {
  1974. return RETCODE_INVALID_PARAM;
  1975. }
  1976. pDecInfo->scaleWidth = scalerInfo->scaleWidth;
  1977. pDecInfo->scaleHeight = scalerInfo->scaleHeight;
  1978. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1979. }
  1980. }
  1981. break;
  1982. }
  1983. case DEC_SET_TARGET_TEMPORAL_ID:
  1984. if (param == NULL) {
  1985. return RETCODE_INVALID_PARAM;
  1986. }
  1987. if (pDecInfo->tempIdSelectMode == FALSE)
  1988. pDecInfo->targetSubLayerId = *(Uint32*)param;
  1989. else
  1990. pDecInfo->relTargetLayerId = *(Uint32*)param;
  1991. break;
  1992. case DEC_SET_TEMPORAL_ID_MODE:
  1993. if (param == NULL) {
  1994. return RETCODE_INVALID_PARAM;
  1995. }
  1996. pDecInfo->tempIdSelectMode = *(Uint32*)param;
  1997. break;
  1998. case DEC_SET_BWB_CUR_FRAME_IDX:
  1999. pDecInfo->chBwbFrameIdx = *(Uint32*)param;
  2000. break;
  2001. case DEC_SET_FBC_CUR_FRAME_IDX:
  2002. pDecInfo->chFbcFrameIdx = *(Uint32*)param;
  2003. break;
  2004. case DEC_SET_INTER_RES_INFO_ON:
  2005. pDecInfo->interResChange = 1;
  2006. break;
  2007. case DEC_SET_INTER_RES_INFO_OFF:
  2008. pDecInfo->interResChange = 0;
  2009. break;
  2010. case DEC_FREE_FBC_TABLE_BUFFER:
  2011. {
  2012. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2013. if(pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size > 0) {
  2014. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex);
  2015. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = 0;
  2016. }
  2017. if(pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size > 0) {
  2018. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex);
  2019. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = 0;
  2020. }
  2021. }
  2022. break;
  2023. case DEC_FREE_MV_BUFFER:
  2024. {
  2025. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2026. if(pDecInfo->vbMV[fbcCurFrameIdx].size > 0) {
  2027. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex);
  2028. pDecInfo->vbMV[fbcCurFrameIdx].size = 0;
  2029. }
  2030. }
  2031. break;
  2032. case DEC_ALLOC_MV_BUFFER:
  2033. {
  2034. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2035. Uint32 size;
  2036. size = WAVE5_DEC_VP9_MVCOL_BUF_SIZE(pDecInfo->initialInfo.picWidth, pDecInfo->initialInfo.picHeight);
  2037. pDecInfo->vbMV[fbcCurFrameIdx].phys_addr = 0;
  2038. pDecInfo->vbMV[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096; /* 4096 is a margin */
  2039. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex) < 0)
  2040. return RETCODE_INSUFFICIENT_RESOURCE;
  2041. }
  2042. break;
  2043. case DEC_ALLOC_FBC_Y_TABLE_BUFFER:
  2044. {
  2045. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2046. Uint32 size;
  2047. size = WAVE5_FBC_LUMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2048. size = VPU_ALIGN16(size);
  2049. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].phys_addr = 0;
  2050. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2051. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex) < 0)
  2052. return RETCODE_INSUFFICIENT_RESOURCE;
  2053. }
  2054. break;
  2055. case DEC_ALLOC_FBC_C_TABLE_BUFFER:
  2056. {
  2057. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2058. Uint32 size;
  2059. size = WAVE5_FBC_CHROMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2060. size = VPU_ALIGN16(size);
  2061. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].phys_addr = 0;
  2062. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2063. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex) < 0)
  2064. return RETCODE_INSUFFICIENT_RESOURCE;
  2065. }
  2066. break;
  2067. case GET_BANDWIDTH_REPORT:
  2068. ret = ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2069. break;
  2070. case SET_CYCLE_PER_TICK:
  2071. {
  2072. pDecInfo->cyclePerTick = *(Uint32 *)param;
  2073. }
  2074. break;
  2075. case GET_DEBUG_INFORM:
  2076. ret = ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2077. break;
  2078. default:
  2079. return RETCODE_INVALID_COMMAND;
  2080. }
  2081. return ret;
  2082. }
  2083. RetCode VPU_DecAllocateFrameBuffer(DecHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2084. {
  2085. CodecInst* pCodecInst;
  2086. DecInfo* pDecInfo;
  2087. RetCode ret;
  2088. Uint32 gdiIndex;
  2089. ret = CheckDecInstanceValidity(handle);
  2090. if (ret != RETCODE_SUCCESS)
  2091. return ret;
  2092. pCodecInst = handle;
  2093. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  2094. if (!frameBuffer) {
  2095. return RETCODE_INVALID_PARAM;
  2096. }
  2097. if (info.type == FB_TYPE_PPU) {
  2098. if (pDecInfo->numFrameBuffers == 0)
  2099. return RETCODE_WRONG_CALL_SEQUENCE;
  2100. if (frameBuffer[0].updateFbInfo == TRUE) {
  2101. pDecInfo->ppuAllocExt = TRUE;
  2102. }
  2103. pDecInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2104. gdiIndex = pDecInfo->numFbsForDecoding;
  2105. ret = ProductVpuAllocateFramebuffer(
  2106. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2107. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbPPU, gdiIndex, FB_TYPE_PPU);
  2108. }
  2109. else if (info.type == FB_TYPE_CODEC) {
  2110. gdiIndex = 0;
  2111. if (frameBuffer[0].updateFbInfo == TRUE) {
  2112. pDecInfo->frameAllocExt = TRUE;
  2113. }
  2114. ret = ProductVpuAllocateFramebuffer(
  2115. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2116. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2117. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->vbFrame.phys_addr;
  2118. }
  2119. return ret;
  2120. }
  2121. RetCode VPU_EncOpen(EncHandle* pHandle, EncOpenParam * pop)
  2122. {
  2123. CodecInst* pCodecInst;
  2124. EncInfo* pEncInfo;
  2125. RetCode ret;
  2126. if ((ret=ProductCheckEncOpenParam(pop)) != RETCODE_SUCCESS)
  2127. return ret;
  2128. EnterLock(pop->coreIdx);
  2129. if (VPU_IsInit(pop->coreIdx) == 0) {
  2130. LeaveLock(pop->coreIdx);
  2131. return RETCODE_NOT_INITIALIZED;
  2132. }
  2133. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  2134. if (ret == RETCODE_FAILURE) {
  2135. *pHandle = 0;
  2136. LeaveLock(pop->coreIdx);
  2137. return RETCODE_FAILURE;
  2138. }
  2139. pCodecInst->isDecoder = FALSE;
  2140. *pHandle = pCodecInst;
  2141. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2142. osal_memset(pEncInfo, 0x00, sizeof(EncInfo));
  2143. pEncInfo->openParam = *pop;
  2144. if ((ret=ProductVpuEncBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  2145. *pHandle = 0;
  2146. }
  2147. LeaveLock(pCodecInst->coreIdx);
  2148. return ret;
  2149. }
  2150. RetCode VPU_EncClose(EncHandle handle)
  2151. {
  2152. CodecInst* pCodecInst;
  2153. EncInfo* pEncInfo;
  2154. RetCode ret;
  2155. ret = CheckEncInstanceValidity(handle);
  2156. if (ret != RETCODE_SUCCESS) {
  2157. return ret;
  2158. }
  2159. pCodecInst = handle;
  2160. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2161. EnterLock(pCodecInst->coreIdx);
  2162. if (pEncInfo->initialInfoObtained) {
  2163. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, pEncInfo->streamWrPtr);
  2164. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, pEncInfo->streamRdPtr);
  2165. if ((ret=ProductVpuEncFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  2166. if (pCodecInst->loggingEnable)
  2167. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 2);
  2168. if (ret == RETCODE_VPU_STILL_RUNNING) {
  2169. LeaveLock(pCodecInst->coreIdx);
  2170. return ret;
  2171. }
  2172. }
  2173. if (pCodecInst->loggingEnable)
  2174. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 0);
  2175. pEncInfo->streamWrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2176. }
  2177. if (pEncInfo->vbScratch.size) {
  2178. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbScratch, ENC_ETC, pCodecInst->instIndex);
  2179. }
  2180. if (pEncInfo->vbWork.size) {
  2181. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbWork, ENC_WORK, pCodecInst->instIndex);
  2182. }
  2183. if (pEncInfo->vbFrame.size) {
  2184. if (pEncInfo->frameAllocExt == 0)
  2185. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFrame, ENC_ETC, pCodecInst->instIndex);
  2186. }
  2187. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2188. if (pEncInfo->vbSubSamBuf.size)
  2189. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSamBuf, ENC_SUBSAMBUF, pCodecInst->instIndex);
  2190. if (pEncInfo->vbMV.size)
  2191. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMV, ENC_MV, pCodecInst->instIndex);
  2192. if (pEncInfo->vbFbcYTbl.size)
  2193. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcYTbl, ENC_FBCY_TBL, pCodecInst->instIndex);
  2194. if (pEncInfo->vbFbcCTbl.size)
  2195. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcCTbl, ENC_FBCC_TBL, pCodecInst->instIndex);
  2196. if (pEncInfo->vbTemp.size)
  2197. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTemp);
  2198. }
  2199. if (pEncInfo->vbPPU.size) {
  2200. if (pEncInfo->ppuAllocExt == 0)
  2201. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbPPU, ENC_ETC, pCodecInst->instIndex);
  2202. }
  2203. if (pEncInfo->vbSubSampFrame.size)
  2204. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2205. if (pEncInfo->vbMvcSubSampFrame.size)
  2206. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMvcSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2207. if (pEncInfo->vbTask.size)
  2208. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTask, ENC_TASK, pCodecInst->instIndex);
  2209. LeaveLock(pCodecInst->coreIdx);
  2210. FreeCodecInstance(pCodecInst);
  2211. return ret;
  2212. }
  2213. RetCode VPU_EncGetInitialInfo(EncHandle handle, EncInitialInfo * info)
  2214. {
  2215. CodecInst* pCodecInst;
  2216. EncInfo* pEncInfo;
  2217. RetCode ret;
  2218. ret = CheckEncInstanceValidity(handle);
  2219. if (ret != RETCODE_SUCCESS)
  2220. return ret;
  2221. if (info == 0) {
  2222. return RETCODE_INVALID_PARAM;
  2223. }
  2224. pCodecInst = handle;
  2225. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2226. EnterLock(pCodecInst->coreIdx);
  2227. if (GetPendingInst(pCodecInst->coreIdx)) {
  2228. LeaveLock(pCodecInst->coreIdx);
  2229. return RETCODE_FRAME_NOT_COMPLETE;
  2230. }
  2231. if ((ret=ProductVpuEncSetup(pCodecInst)) != RETCODE_SUCCESS) {
  2232. LeaveLock(pCodecInst->coreIdx);
  2233. return ret;
  2234. }
  2235. if (pCodecInst->codecMode == AVC_ENC && pCodecInst->codecModeAux == AVC_AUX_MVC)
  2236. info->minFrameBufferCount = 3; // reconstructed frame + 2 reference frame
  2237. else if(pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2238. info->minFrameBufferCount = pEncInfo->initialInfo.minFrameBufferCount;
  2239. info->minSrcFrameCount = pEncInfo->initialInfo.minSrcFrameCount;
  2240. }
  2241. else
  2242. info->minFrameBufferCount = 2; // reconstructed frame + reference frame
  2243. pEncInfo->initialInfo = *info;
  2244. pEncInfo->initialInfoObtained = TRUE;
  2245. LeaveLock(pCodecInst->coreIdx);
  2246. return RETCODE_SUCCESS;
  2247. }
  2248. RetCode VPU_EncRegisterFrameBuffer(EncHandle handle, FrameBuffer* bufArray, int num, int stride, int height, TiledMapType mapType)
  2249. {
  2250. CodecInst* pCodecInst;
  2251. EncInfo* pEncInfo;
  2252. Int32 i;
  2253. RetCode ret;
  2254. EncOpenParam* openParam;
  2255. FrameBuffer* fb;
  2256. ret = CheckEncInstanceValidity(handle);
  2257. // FIXME temp
  2258. if (ret != RETCODE_SUCCESS)
  2259. return ret;
  2260. pCodecInst = handle;
  2261. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2262. openParam = &pEncInfo->openParam;
  2263. if (pEncInfo->stride)
  2264. return RETCODE_CALLED_BEFORE;
  2265. if (!pEncInfo->initialInfoObtained)
  2266. return RETCODE_WRONG_CALL_SEQUENCE;
  2267. if (num < pEncInfo->initialInfo.minFrameBufferCount)
  2268. return RETCODE_INSUFFICIENT_FRAME_BUFFERS;
  2269. if (stride == 0 || (stride % 8 != 0) || stride < 0)
  2270. return RETCODE_INVALID_STRIDE;
  2271. if (height == 0 || height < 0)
  2272. return RETCODE_INVALID_PARAM;
  2273. if ( pEncInfo->productCode == WAVE521C_DUAL_CODE) {
  2274. if (openParam->bitstreamFormat == STD_HEVC) {
  2275. if (stride % 16 != 0)
  2276. return RETCODE_INVALID_STRIDE;
  2277. }
  2278. }
  2279. else {
  2280. if (openParam->bitstreamFormat == STD_HEVC) {
  2281. if (stride % 32 != 0)
  2282. return RETCODE_INVALID_STRIDE;
  2283. }
  2284. }
  2285. EnterLock(pCodecInst->coreIdx);
  2286. if (GetPendingInst(pCodecInst->coreIdx)) {
  2287. LeaveLock(pCodecInst->coreIdx);
  2288. return RETCODE_FRAME_NOT_COMPLETE;
  2289. }
  2290. pEncInfo->numFrameBuffers = num;
  2291. pEncInfo->stride = stride;
  2292. pEncInfo->frameBufferHeight = height;
  2293. pEncInfo->mapType = mapType;
  2294. pEncInfo->mapCfg.productId = pCodecInst->productId;
  2295. if (bufArray) {
  2296. for(i=0; i<num; i++) {
  2297. pEncInfo->frameBufPool[i] = bufArray[i];
  2298. }
  2299. if (openParam->EncStdParam.waveParam.svcEnable == TRUE) {
  2300. for(i=num; i<num*2; i++) {
  2301. pEncInfo->frameBufPool[i] = bufArray[i];
  2302. }
  2303. }
  2304. }
  2305. if (pEncInfo->frameAllocExt == FALSE) {
  2306. fb = pEncInfo->frameBufPool;
  2307. if (bufArray) {
  2308. if (bufArray[0].bufCb == (PhysicalAddress)-1 && bufArray[0].bufCr == (PhysicalAddress)-1) {
  2309. Uint32 size;
  2310. pEncInfo->frameAllocExt = TRUE;
  2311. size = ProductCalculateFrameBufSize(pCodecInst, pCodecInst->productId, stride, height,
  2312. (TiledMapType)mapType, (FrameBufferFormat)openParam->srcFormat,
  2313. (BOOL)openParam->cbcrInterleave, NULL);
  2314. if (mapType == LINEAR_FRAME_MAP) {
  2315. pEncInfo->vbFrame.phys_addr = bufArray[0].bufY;
  2316. pEncInfo->vbFrame.size = size * num;
  2317. }
  2318. }
  2319. }
  2320. ret = ProductVpuAllocateFramebuffer(
  2321. pCodecInst, fb, (TiledMapType)mapType, num, stride, height, (FrameBufferFormat)openParam->srcFormat,
  2322. openParam->cbcrInterleave, FALSE, openParam->frameEndian, &pEncInfo->vbFrame, 0, FB_TYPE_CODEC);
  2323. if (ret != RETCODE_SUCCESS) {
  2324. SetPendingInst(pCodecInst->coreIdx, 0);
  2325. LeaveLock(pCodecInst->coreIdx);
  2326. return ret;
  2327. }
  2328. }
  2329. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  2330. SetPendingInst(pCodecInst->coreIdx, 0);
  2331. LeaveLock(pCodecInst->coreIdx);
  2332. return ret;
  2333. }
  2334. RetCode VPU_EncGetBitstreamBuffer( EncHandle handle,
  2335. PhysicalAddress * prdPrt,
  2336. PhysicalAddress * pwrPtr,
  2337. int * size)
  2338. {
  2339. CodecInst * pCodecInst;
  2340. EncInfo * pEncInfo;
  2341. PhysicalAddress rdPtr;
  2342. PhysicalAddress wrPtr;
  2343. Uint32 room;
  2344. RetCode ret;
  2345. ret = CheckEncInstanceValidity(handle);
  2346. if (ret != RETCODE_SUCCESS)
  2347. return ret;
  2348. if ( prdPrt == 0 || pwrPtr == 0 || size == 0) {
  2349. return RETCODE_INVALID_PARAM;
  2350. }
  2351. pCodecInst = handle;
  2352. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2353. rdPtr = pEncInfo->streamRdPtr;
  2354. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2355. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2356. else {
  2357. if (handle->productId == PRODUCT_ID_521) {
  2358. EnterLock(pCodecInst->coreIdx);
  2359. ProductVpuEncGetRdWrPtr(pCodecInst, &rdPtr, &wrPtr);
  2360. LeaveLock(pCodecInst->coreIdx);
  2361. }
  2362. else
  2363. wrPtr = pEncInfo->streamWrPtr;
  2364. }
  2365. if(pEncInfo->ringBufferEnable == 1 || pEncInfo->lineBufIntEn == 1) {
  2366. if (wrPtr >= rdPtr) {
  2367. room = wrPtr - rdPtr;
  2368. }
  2369. else {
  2370. room = (pEncInfo->streamBufEndAddr - rdPtr) + (wrPtr - pEncInfo->streamBufStartAddr);
  2371. }
  2372. }
  2373. else {
  2374. if(wrPtr >= rdPtr)
  2375. room = wrPtr - rdPtr;
  2376. else
  2377. return RETCODE_INVALID_PARAM;
  2378. }
  2379. *prdPrt = rdPtr;
  2380. *pwrPtr = wrPtr;
  2381. *size = room;
  2382. return RETCODE_SUCCESS;
  2383. }
  2384. RetCode VPU_EncUpdateBitstreamBuffer(
  2385. EncHandle handle,
  2386. int size)
  2387. {
  2388. CodecInst * pCodecInst;
  2389. EncInfo * pEncInfo;
  2390. PhysicalAddress wrPtr;
  2391. PhysicalAddress rdPtr;
  2392. RetCode ret;
  2393. int room = 0;
  2394. ret = CheckEncInstanceValidity(handle);
  2395. if (ret != RETCODE_SUCCESS)
  2396. return ret;
  2397. pCodecInst = handle;
  2398. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2399. rdPtr = pEncInfo->streamRdPtr;
  2400. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2401. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2402. else
  2403. wrPtr = pEncInfo->streamWrPtr;
  2404. if ( rdPtr < wrPtr ) {
  2405. if ( rdPtr + size > wrPtr ) {
  2406. return RETCODE_INVALID_PARAM;
  2407. }
  2408. }
  2409. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId)) {
  2410. //************** for CODA *********************/
  2411. if (pEncInfo->ringBufferEnable == TRUE || pEncInfo->lineBufIntEn == TRUE) {
  2412. rdPtr += size;
  2413. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2414. if (pEncInfo->lineBufIntEn == TRUE) {
  2415. return RETCODE_INVALID_PARAM;
  2416. }
  2417. room = rdPtr - pEncInfo->streamBufEndAddr;
  2418. rdPtr = pEncInfo->streamBufStartAddr;
  2419. rdPtr += room;
  2420. }
  2421. if (rdPtr == pEncInfo->streamBufEndAddr)
  2422. rdPtr = pEncInfo->streamBufStartAddr;
  2423. }
  2424. else {
  2425. rdPtr = pEncInfo->streamBufStartAddr;
  2426. }
  2427. }
  2428. else {
  2429. //************** for WAVE5 *********************/
  2430. if (size > 0) {
  2431. if (pEncInfo->ringBufferEnable == TRUE) {
  2432. rdPtr += size;
  2433. if (pEncInfo->ringBufferWrapEnable == TRUE) {
  2434. //======== [case1]. ring=1 & wrap=1 ===================
  2435. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2436. if (pEncInfo->lineBufIntEn == TRUE) {
  2437. return RETCODE_INVALID_PARAM;
  2438. }
  2439. room = rdPtr - pEncInfo->streamBufEndAddr;
  2440. rdPtr = pEncInfo->streamBufStartAddr;
  2441. rdPtr += room;
  2442. }
  2443. pEncInfo->streamRdPtr = rdPtr;
  2444. EnterLock(pCodecInst->coreIdx);
  2445. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2446. LeaveLock(pCodecInst->coreIdx);
  2447. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2448. //set EndAddr to FW and set StartAddr to API
  2449. rdPtr = pEncInfo->streamBufStartAddr; // wrap-around
  2450. }
  2451. }
  2452. else {
  2453. //========= [case2]. ring=1 & wrap=0 ===================
  2454. pEncInfo->streamRdPtr = rdPtr;
  2455. EnterLock(pCodecInst->coreIdx);
  2456. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2457. LeaveLock(pCodecInst->coreIdx);
  2458. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2459. //set EndAddr to FW and set StartAddr to API
  2460. rdPtr = pEncInfo->streamBufStartAddr; // start? end? [FIX ME]
  2461. }
  2462. }
  2463. }
  2464. else {
  2465. //========= [case3]. Line buffer mode ===================
  2466. if (VPU_ALIGN16(wrPtr) >= pEncInfo->streamRdPtr + pEncInfo->streamBufSize) { // linebuffer full detected. already host read whole bistream in bitstreamBuffer.
  2467. EnterLock(pCodecInst->coreIdx);
  2468. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2469. LeaveLock(pCodecInst->coreIdx);
  2470. }
  2471. }
  2472. }
  2473. else {
  2474. //************ update new CPB buffer addr/size ***************/
  2475. if (size == UPDATE_NEW_BS_BUF) {
  2476. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2477. pEncInfo->streamBufTobeReadStartAddr = pEncInfo->streamBufStartAddr;
  2478. pEncInfo->streamBufTobeReadSize = pEncInfo->streamBufSize;
  2479. pEncInfo->streamBufTobeReadEndAddr = pEncInfo->streamBufStartAddr + pEncInfo->streamBufSize;
  2480. EnterLock(pCodecInst->coreIdx);
  2481. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2482. LeaveLock(pCodecInst->coreIdx);
  2483. rdPtr = pEncInfo->streamBufStartAddr;
  2484. }
  2485. }
  2486. }
  2487. pEncInfo->streamRdPtr = rdPtr;
  2488. pEncInfo->streamWrPtr = wrPtr;
  2489. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2490. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, rdPtr);
  2491. if (pEncInfo->ringBufferEnable == FALSE && pEncInfo->lineBufIntEn == TRUE) {
  2492. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2493. }
  2494. return RETCODE_SUCCESS;
  2495. }
  2496. RetCode VPU_EncStartOneFrame(
  2497. EncHandle handle,
  2498. EncParam * param
  2499. )
  2500. {
  2501. CodecInst* pCodecInst;
  2502. EncInfo* pEncInfo;
  2503. RetCode ret;
  2504. VpuAttr* pAttr = NULL;
  2505. vpu_instance_pool_t* vip;
  2506. ret = CheckEncInstanceValidity(handle);
  2507. if (ret != RETCODE_SUCCESS)
  2508. return ret;
  2509. pCodecInst = handle;
  2510. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2511. vip = (vpu_instance_pool_t *)vdi_get_instance_pool(pCodecInst->coreIdx);
  2512. if (!vip) {
  2513. return RETCODE_INVALID_HANDLE;
  2514. }
  2515. if (pEncInfo->stride == 0) { // This means frame buffers have not been registered.
  2516. return RETCODE_WRONG_CALL_SEQUENCE;
  2517. }
  2518. ret = CheckEncParam(handle, param);
  2519. if (ret != RETCODE_SUCCESS) {
  2520. return ret;
  2521. }
  2522. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2523. EnterLock(pCodecInst->coreIdx);
  2524. pEncInfo->ptsMap[param->srcIdx] = (pEncInfo->openParam.enablePTS == TRUE) ? GetTimestamp(handle) : param->pts;
  2525. if (GetPendingInst(pCodecInst->coreIdx)) {
  2526. LeaveLock(pCodecInst->coreIdx);
  2527. return RETCODE_FRAME_NOT_COMPLETE;
  2528. }
  2529. ret = ProductVpuEncode(pCodecInst, param);
  2530. if (pAttr->supportCommandQueue == TRUE) {
  2531. SetPendingInst(pCodecInst->coreIdx, NULL);
  2532. LeaveLock(pCodecInst->coreIdx);
  2533. }
  2534. else {
  2535. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2536. }
  2537. return ret;
  2538. }
  2539. RetCode VPU_EncGetOutputInfo(
  2540. EncHandle handle,
  2541. EncOutputInfo* info
  2542. )
  2543. {
  2544. CodecInst* pCodecInst;
  2545. EncInfo* pEncInfo;
  2546. RetCode ret;
  2547. VpuAttr* pAttr;
  2548. ret = CheckEncInstanceValidity(handle);
  2549. if (ret != RETCODE_SUCCESS) {
  2550. return ret;
  2551. }
  2552. if (info == 0) {
  2553. return RETCODE_INVALID_PARAM;
  2554. }
  2555. pCodecInst = handle;
  2556. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2557. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2558. if (pAttr->supportCommandQueue == TRUE) {
  2559. EnterLock(pCodecInst->coreIdx);
  2560. }
  2561. else {
  2562. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  2563. SetPendingInst(pCodecInst->coreIdx, 0);
  2564. LeaveLock(pCodecInst->coreIdx);
  2565. return RETCODE_WRONG_CALL_SEQUENCE;
  2566. }
  2567. }
  2568. ret = ProductVpuEncGetResult(pCodecInst, info);
  2569. if (ret == RETCODE_SUCCESS) {
  2570. if (info->encSrcIdx >= 0 && info->reconFrameIndex >= 0 )
  2571. info->pts = pEncInfo->ptsMap[info->encSrcIdx];
  2572. }
  2573. else {
  2574. info->pts = 0LL;
  2575. }
  2576. SetPendingInst(pCodecInst->coreIdx, 0);
  2577. LeaveLock(pCodecInst->coreIdx);
  2578. return ret;
  2579. }
  2580. RetCode VPU_EncGiveCommand(
  2581. EncHandle handle,
  2582. CodecCommand cmd,
  2583. void* param
  2584. )
  2585. {
  2586. CodecInst* pCodecInst;
  2587. EncInfo* pEncInfo;
  2588. RetCode ret;
  2589. ret = CheckEncInstanceValidity(handle);
  2590. if (ret != RETCODE_SUCCESS) {
  2591. return ret;
  2592. }
  2593. pCodecInst = handle;
  2594. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2595. switch (cmd)
  2596. {
  2597. case ENABLE_ROTATION :
  2598. {
  2599. pEncInfo->rotationEnable = 1;
  2600. }
  2601. break;
  2602. case DISABLE_ROTATION :
  2603. {
  2604. pEncInfo->rotationEnable = 0;
  2605. }
  2606. break;
  2607. case ENABLE_MIRRORING :
  2608. {
  2609. pEncInfo->mirrorEnable = 1;
  2610. }
  2611. break;
  2612. case DISABLE_MIRRORING :
  2613. {
  2614. pEncInfo->mirrorEnable = 0;
  2615. }
  2616. break;
  2617. case SET_MIRROR_DIRECTION :
  2618. {
  2619. MirrorDirection mirDir;
  2620. if (param == 0) {
  2621. return RETCODE_INVALID_PARAM;
  2622. }
  2623. mirDir = *(MirrorDirection *)param;
  2624. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  2625. return RETCODE_INVALID_PARAM;
  2626. }
  2627. pEncInfo->mirrorDirection = mirDir;
  2628. }
  2629. break;
  2630. case SET_ROTATION_ANGLE :
  2631. {
  2632. int angle;
  2633. if (param == 0) {
  2634. return RETCODE_INVALID_PARAM;
  2635. }
  2636. angle = *(int *)param;
  2637. if (angle != 0 && angle != 90 &&
  2638. angle != 180 && angle != 270) {
  2639. return RETCODE_INVALID_PARAM;
  2640. }
  2641. if (pEncInfo->initialInfoObtained && (angle == 90 || angle ==270)) {
  2642. return RETCODE_INVALID_PARAM;
  2643. }
  2644. pEncInfo->rotationAngle = angle;
  2645. }
  2646. break;
  2647. case SET_CACHE_CONFIG:
  2648. {
  2649. MaverickCacheConfig *mcCacheConfig;
  2650. if (param == 0) {
  2651. return RETCODE_INVALID_PARAM;
  2652. }
  2653. mcCacheConfig = (MaverickCacheConfig *)param;
  2654. pEncInfo->cacheConfig = *mcCacheConfig;
  2655. }
  2656. break;
  2657. case ENC_PUT_VIDEO_HEADER:
  2658. {
  2659. EncHeaderParam *encHeaderParam;
  2660. if (param == 0) {
  2661. return RETCODE_INVALID_PARAM;
  2662. }
  2663. encHeaderParam = (EncHeaderParam *)param;
  2664. if (pCodecInst->codecMode == MP4_ENC ) {
  2665. if (!( VOL_HEADER<=encHeaderParam->headerType && encHeaderParam->headerType <= VIS_HEADER)) {
  2666. return RETCODE_INVALID_PARAM;
  2667. }
  2668. }
  2669. else if (pCodecInst->codecMode == AVC_ENC) {
  2670. if (!( SPS_RBSP<=encHeaderParam->headerType && encHeaderParam->headerType <= PPS_RBSP_MVC)) {
  2671. return RETCODE_INVALID_PARAM;
  2672. }
  2673. }
  2674. else if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2675. if (!( CODEOPT_ENC_VPS<=encHeaderParam->headerType && encHeaderParam->headerType <= (CODEOPT_ENC_VPS|CODEOPT_ENC_SPS|CODEOPT_ENC_PPS))) {
  2676. return RETCODE_INVALID_PARAM;
  2677. }
  2678. if (pEncInfo->ringBufferEnable == 0 ) {
  2679. if (encHeaderParam->buf % 16 || encHeaderParam->size == 0)
  2680. return RETCODE_INVALID_PARAM;
  2681. }
  2682. if (encHeaderParam->headerType & CODEOPT_ENC_VCL) // ENC_PUT_VIDEO_HEADER encode only non-vcl header.
  2683. return RETCODE_INVALID_PARAM;
  2684. }
  2685. else
  2686. return RETCODE_INVALID_PARAM;
  2687. if (pEncInfo->ringBufferEnable == 0 ) {
  2688. if (encHeaderParam->buf % 8 || encHeaderParam->size == 0) {
  2689. return RETCODE_INVALID_PARAM;
  2690. }
  2691. }
  2692. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2693. if (handle->productId == PRODUCT_ID_521)
  2694. return Wave5VpuEncGetHeader(handle, encHeaderParam);
  2695. else
  2696. return RETCODE_INVALID_PARAM;
  2697. }
  2698. else {
  2699. return GetEncHeader(handle, encHeaderParam);
  2700. }
  2701. }
  2702. case ENC_SET_PARAM:
  2703. {
  2704. if (param == 0) {
  2705. return RETCODE_INVALID_PARAM;
  2706. }
  2707. pEncInfo->openParam = *(EncOpenParam *)param;
  2708. if (pCodecInst->codecMode != AVC_ENC)
  2709. return RETCODE_INVALID_COMMAND;
  2710. ret = EncParaSet(handle, SPS_RBSP);
  2711. if (ret != RETCODE_SUCCESS)
  2712. return ret;
  2713. ret = EncParaSet(handle, PPS_RBSP);
  2714. if (ret != RETCODE_SUCCESS)
  2715. return ret;
  2716. return ret;
  2717. }
  2718. case ENC_SET_GOP_NUMBER:
  2719. {
  2720. int *pGopNumber =(int *)param;
  2721. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2722. return RETCODE_INVALID_COMMAND;
  2723. }
  2724. if (*pGopNumber < 0)
  2725. return RETCODE_INVALID_PARAM;
  2726. pEncInfo->openParam.gopSize = *pGopNumber;
  2727. SetGopNumber(handle, (Uint32 *)pGopNumber);
  2728. }
  2729. break;
  2730. case ENC_SET_INTRA_QP:
  2731. {
  2732. int *pIntraQp =(int *)param;
  2733. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2734. return RETCODE_INVALID_COMMAND;
  2735. }
  2736. if (pCodecInst->codecMode == MP4_ENC)
  2737. {
  2738. if(*pIntraQp<1 || *pIntraQp>31)
  2739. return RETCODE_INVALID_PARAM;
  2740. }
  2741. if (pCodecInst->codecMode == AVC_ENC)
  2742. {
  2743. if(*pIntraQp<0 || *pIntraQp>51)
  2744. return RETCODE_INVALID_PARAM;
  2745. }
  2746. SetIntraQp(handle, (Uint32 *)pIntraQp);
  2747. }
  2748. break;
  2749. case ENC_SET_BITRATE:
  2750. {
  2751. int *pBitrate = (int *)param;
  2752. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2753. return RETCODE_INVALID_COMMAND;
  2754. }
  2755. {
  2756. if (*pBitrate < 0 || *pBitrate> 32767) {
  2757. return RETCODE_INVALID_PARAM;
  2758. }
  2759. }
  2760. SetBitrate(handle, (Uint32 *)pBitrate);
  2761. }
  2762. break;
  2763. case ENC_SET_FRAME_RATE:
  2764. {
  2765. int *pFramerate = (int *)param;
  2766. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2767. return RETCODE_INVALID_COMMAND;
  2768. }
  2769. if (*pFramerate <= 0) {
  2770. return RETCODE_INVALID_PARAM;
  2771. }
  2772. SetFramerate(handle, (Uint32 *)pFramerate);
  2773. }
  2774. break;
  2775. case ENC_SET_INTRA_MB_REFRESH_NUMBER:
  2776. {
  2777. int *pIntraRefreshNum =(int *)param;
  2778. SetIntraRefreshNum(handle, (Uint32 *)pIntraRefreshNum);
  2779. }
  2780. break;
  2781. case ENC_SET_SLICE_INFO:
  2782. {
  2783. EncSliceMode *pSliceMode = (EncSliceMode *)param;
  2784. if(pSliceMode->sliceMode<0 || pSliceMode->sliceMode>1)
  2785. {
  2786. return RETCODE_INVALID_PARAM;
  2787. }
  2788. if(pSliceMode->sliceSizeMode<0 || pSliceMode->sliceSizeMode>1)
  2789. {
  2790. return RETCODE_INVALID_PARAM;
  2791. }
  2792. SetSliceMode(handle, (EncSliceMode *)pSliceMode);
  2793. }
  2794. break;
  2795. case ENC_ENABLE_HEC:
  2796. {
  2797. if (pCodecInst->codecMode != MP4_ENC) {
  2798. return RETCODE_INVALID_COMMAND;
  2799. }
  2800. SetHecMode(handle, 1);
  2801. }
  2802. break;
  2803. case ENC_DISABLE_HEC:
  2804. {
  2805. if (pCodecInst->codecMode != MP4_ENC) {
  2806. return RETCODE_INVALID_COMMAND;
  2807. }
  2808. SetHecMode(handle, 0);
  2809. }
  2810. break;
  2811. case SET_SEC_AXI:
  2812. {
  2813. SecAxiUse secAxiUse;
  2814. if (param == 0) {
  2815. return RETCODE_INVALID_PARAM;
  2816. }
  2817. secAxiUse = *(SecAxiUse *)param;
  2818. if (handle->productId == PRODUCT_ID_521) {
  2819. pEncInfo->secAxiInfo.u.wave.useEncRdoEnable = secAxiUse.u.wave.useEncRdoEnable;
  2820. pEncInfo->secAxiInfo.u.wave.useEncLfEnable = secAxiUse.u.wave.useEncLfEnable;
  2821. }
  2822. else { // coda9 or coda7q or ...
  2823. pEncInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  2824. pEncInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  2825. pEncInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  2826. pEncInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  2827. pEncInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  2828. pEncInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  2829. }
  2830. }
  2831. break;
  2832. case GET_TILEDMAP_CONFIG:
  2833. {
  2834. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  2835. if (!pMapCfg) {
  2836. return RETCODE_INVALID_PARAM;
  2837. }
  2838. *pMapCfg = pEncInfo->mapCfg;
  2839. break;
  2840. }
  2841. case SET_DRAM_CONFIG:
  2842. {
  2843. DRAMConfig *cfg = (DRAMConfig *)param;
  2844. if (!cfg) {
  2845. return RETCODE_INVALID_PARAM;
  2846. }
  2847. pEncInfo->dramCfg = *cfg;
  2848. break;
  2849. }
  2850. case GET_DRAM_CONFIG:
  2851. {
  2852. DRAMConfig *cfg = (DRAMConfig *)param;
  2853. if (!cfg) {
  2854. return RETCODE_INVALID_PARAM;
  2855. }
  2856. *cfg = pEncInfo->dramCfg;
  2857. break;
  2858. }
  2859. case ENABLE_LOGGING:
  2860. {
  2861. pCodecInst->loggingEnable = 1;
  2862. }
  2863. break;
  2864. case DISABLE_LOGGING:
  2865. {
  2866. pCodecInst->loggingEnable = 0;
  2867. }
  2868. break;
  2869. case ENC_SET_PARA_CHANGE:
  2870. {
  2871. EncChangeParam* option = (EncChangeParam*)param;
  2872. if (handle->productId == PRODUCT_ID_521)
  2873. return Wave5VpuEncParaChange(handle, option);
  2874. else
  2875. return RETCODE_INVALID_PARAM;
  2876. }
  2877. case GET_BANDWIDTH_REPORT :
  2878. return ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2879. case ENC_GET_QUEUE_STATUS:
  2880. {
  2881. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  2882. queueInfo->instanceQueueCount = pEncInfo->instanceQueueCount;
  2883. queueInfo->reportQueueCount = pEncInfo->reportQueueCount;
  2884. break;
  2885. }
  2886. case ENC_WRPTR_SEL:
  2887. {
  2888. pEncInfo->encWrPtrSel = *(int *)param;
  2889. }
  2890. break;
  2891. case SET_CYCLE_PER_TICK:
  2892. {
  2893. pEncInfo->cyclePerTick = *(Uint32 *)param;
  2894. }
  2895. break;
  2896. case ENC_GET_SRC_BUF_FLAG:
  2897. return ProductVpuGetSrcBufFlag(pCodecInst, (Uint32*)param);
  2898. case GET_DEBUG_INFORM:
  2899. return ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2900. #ifdef SUPPORT_LOOK_AHEAD_RC
  2901. case ENC_SET_LARC_DATA:
  2902. {
  2903. EncLarcInfo* larcInfo = (EncLarcInfo*)param;
  2904. if (handle->productId == PRODUCT_ID_521)
  2905. return Wave5VpuEncSetLarcData(handle, *larcInfo);
  2906. else
  2907. return RETCODE_INVALID_PARAM;
  2908. }
  2909. break;
  2910. #endif
  2911. default:
  2912. return RETCODE_INVALID_COMMAND;
  2913. }
  2914. return RETCODE_SUCCESS;
  2915. }
  2916. RetCode VPU_EncAllocateFrameBuffer(EncHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2917. {
  2918. CodecInst* pCodecInst;
  2919. EncInfo* pEncInfo;
  2920. RetCode ret;
  2921. int gdiIndex;
  2922. ret = CheckEncInstanceValidity(handle);
  2923. if (ret != RETCODE_SUCCESS)
  2924. return ret;
  2925. pCodecInst = handle;
  2926. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2927. if (!frameBuffer) {
  2928. return RETCODE_INVALID_PARAM;
  2929. }
  2930. if (info.num == 0 || info.num < 0) {
  2931. return RETCODE_INVALID_PARAM;
  2932. }
  2933. if (info.stride == 0 || info.stride < 0) {
  2934. return RETCODE_INVALID_PARAM;
  2935. }
  2936. if (info.height == 0 || info.height < 0) {
  2937. return RETCODE_INVALID_PARAM;
  2938. }
  2939. if (info.type == FB_TYPE_PPU) {
  2940. if (pEncInfo->numFrameBuffers == 0) {
  2941. return RETCODE_WRONG_CALL_SEQUENCE;
  2942. }
  2943. pEncInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2944. gdiIndex = pEncInfo->numFrameBuffers;
  2945. ret = ProductVpuAllocateFramebuffer(pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2946. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21,
  2947. info.endian, &pEncInfo->vbPPU, gdiIndex, (FramebufferAllocType)info.type);
  2948. }
  2949. else if (info.type == FB_TYPE_CODEC) {
  2950. gdiIndex = 0;
  2951. pEncInfo->frameAllocExt = frameBuffer[0].updateFbInfo;
  2952. ret = ProductVpuAllocateFramebuffer(
  2953. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2954. info.stride, info.height, info.format, info.cbcrInterleave, FALSE, info.endian, &pEncInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2955. }
  2956. else {
  2957. ret = RETCODE_INVALID_PARAM;
  2958. }
  2959. return ret;
  2960. }
  2961. RetCode VPU_EncIssueSeqInit(EncHandle handle)
  2962. {
  2963. CodecInst* pCodecInst;
  2964. RetCode ret;
  2965. VpuAttr* pAttr;
  2966. ret = CheckEncInstanceValidity(handle);
  2967. if (ret != RETCODE_SUCCESS)
  2968. return ret;
  2969. pCodecInst = handle;
  2970. EnterLock(pCodecInst->coreIdx);
  2971. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2972. if (GetPendingInst(pCodecInst->coreIdx)) {
  2973. LeaveLock(pCodecInst->coreIdx);
  2974. return RETCODE_FRAME_NOT_COMPLETE;
  2975. }
  2976. ret = ProductVpuEncInitSeq(handle);
  2977. if (ret == RETCODE_SUCCESS) {
  2978. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2979. }
  2980. if (pAttr->supportCommandQueue == TRUE) {
  2981. SetPendingInst(pCodecInst->coreIdx, NULL);
  2982. LeaveLock(pCodecInst->coreIdx);
  2983. }
  2984. return ret;
  2985. }
  2986. RetCode VPU_EncCompleteSeqInit(EncHandle handle, EncInitialInfo * info)
  2987. {
  2988. CodecInst* pCodecInst;
  2989. EncInfo* pEncInfo;
  2990. RetCode ret;
  2991. VpuAttr* pAttr;
  2992. ret = CheckEncInstanceValidity(handle);
  2993. if (ret != RETCODE_SUCCESS) {
  2994. return ret;
  2995. }
  2996. if (info == 0) {
  2997. return RETCODE_INVALID_PARAM;
  2998. }
  2999. pCodecInst = handle;
  3000. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  3001. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  3002. if (pAttr->supportCommandQueue == TRUE) {
  3003. EnterLock(pCodecInst->coreIdx);
  3004. }
  3005. else {
  3006. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  3007. SetPendingInst(pCodecInst->coreIdx, 0);
  3008. LeaveLock(pCodecInst->coreIdx);
  3009. return RETCODE_WRONG_CALL_SEQUENCE;
  3010. }
  3011. }
  3012. ret = ProductVpuEncGetSeqInfo(handle, info);
  3013. if (ret == RETCODE_SUCCESS) {
  3014. pEncInfo->initialInfoObtained = 1;
  3015. }
  3016. //info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr);
  3017. //info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  3018. //pEncInfo->prevFrameEndPos = info->rdPtr;
  3019. pEncInfo->initialInfo = *info;
  3020. SetPendingInst(pCodecInst->coreIdx, NULL);
  3021. LeaveLock(pCodecInst->coreIdx);
  3022. return ret;
  3023. }