vpuapi.c 114 KB

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  1. /*
  2. * Copyright (c) 2019, Chips&Media
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice, this
  9. * list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright notice,
  11. * this list of conditions and the following disclaimer in the documentation
  12. * and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  16. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
  18. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  19. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  20. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  21. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  23. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. */
  25. #include "vpuapifunc.h"
  26. #include "product.h"
  27. #include "wave/wave5_regdefine.h"
  28. #include "wave/wave5.h"
  29. #define W5_RET_DEC_DISPLAY_SIZE (W5_REG_BASE + 0x01D8) // [FIX ME] delete ? or not?
  30. #define INVALID_CORE_INDEX_RETURN_ERROR(_coreIdx) \
  31. if (_coreIdx >= MAX_NUM_VPU_CORE) \
  32. return -1;
  33. static const Uint16* s_pusBitCode[MAX_NUM_VPU_CORE] = {NULL,};
  34. static int s_bitCodeSize[MAX_NUM_VPU_CORE] = {0,};
  35. Uint32 __VPU_BUSY_TIMEOUT = VPU_BUSY_CHECK_TIMEOUT;
  36. static RetCode CheckDecInstanceValidity(CodecInst* pCodecInst)
  37. {
  38. RetCode ret;
  39. if (pCodecInst == NULL)
  40. return RETCODE_INVALID_HANDLE;
  41. ret = CheckInstanceValidity(pCodecInst);
  42. if (ret != RETCODE_SUCCESS) {
  43. return RETCODE_INVALID_HANDLE;
  44. }
  45. if (!pCodecInst->inUse) {
  46. return RETCODE_INVALID_HANDLE;
  47. }
  48. return ProductVpuDecCheckCapability(pCodecInst);
  49. }
  50. Int32 VPU_IsInit(Uint32 coreIdx)
  51. {
  52. Int32 pc;
  53. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  54. pc = ProductVpuIsInit(coreIdx);
  55. return pc;
  56. }
  57. Int32 VPU_WaitInterrupt(Uint32 coreIdx, int timeout)
  58. {
  59. Int32 ret;
  60. CodecInst* instance;
  61. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  62. if ((instance=GetPendingInst(coreIdx)) != NULL) {
  63. ret = ProductVpuWaitInterrupt(instance, timeout);
  64. }
  65. else {
  66. ret = -1;
  67. }
  68. return ret;
  69. }
  70. Int32 VPU_WaitInterruptEx(VpuHandle handle, int timeout)
  71. {
  72. Int32 ret;
  73. CodecInst *pCodecInst;
  74. pCodecInst = handle;
  75. INVALID_CORE_INDEX_RETURN_ERROR(pCodecInst->coreIdx);
  76. ret = ProductVpuWaitInterrupt(pCodecInst, timeout);
  77. return ret;
  78. }
  79. void VPU_ClearInterrupt(Uint32 coreIdx)
  80. {
  81. /* clear all interrupt flags */
  82. ProductVpuClearInterrupt(coreIdx, 0xffff);
  83. }
  84. void VPU_ClearInterruptEx(VpuHandle handle, Int32 intrFlag)
  85. {
  86. CodecInst *pCodecInst;
  87. pCodecInst = handle;
  88. ProductVpuClearInterrupt(pCodecInst->coreIdx, intrFlag);
  89. }
  90. int VPU_GetFrameBufSize(VpuHandle handle, int coreIdx, int stride, int height, int mapType, int format, int interleave, DRAMConfig *pDramCfg)
  91. {
  92. int productId;
  93. CodecInst *pCodecInst;
  94. pCodecInst = handle;
  95. UNREFERENCED_PARAMETER(interleave); /*!<< for backward compatiblity */
  96. if (coreIdx < 0 || coreIdx >= MAX_NUM_VPU_CORE)
  97. return -1;
  98. productId = ProductVpuGetId(coreIdx);
  99. return ProductCalculateFrameBufSize(pCodecInst, productId, stride, height, (TiledMapType)mapType, (FrameBufferFormat)format, (BOOL)interleave, pDramCfg);
  100. }
  101. int VPU_GetProductId(int coreIdx)
  102. {
  103. Int32 productId;
  104. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  105. if ((productId=ProductVpuGetId(coreIdx)) != PRODUCT_ID_NONE) {
  106. return productId;
  107. }
  108. if (vdi_init(coreIdx) < 0)
  109. return -1;
  110. VLOG(INFO, "[VDI] VPU_GetProductId1 \n");
  111. EnterLock(coreIdx);
  112. if (ProductVpuScan(coreIdx) == FALSE)
  113. productId = -1;
  114. else
  115. productId = ProductVpuGetId(coreIdx);
  116. LeaveLock((coreIdx));
  117. vdi_release(coreIdx);
  118. return productId;
  119. }
  120. int VPU_GetOpenInstanceNum(Uint32 coreIdx)
  121. {
  122. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  123. return vdi_get_instance_num(coreIdx);
  124. }
  125. static RetCode InitializeVPU(Uint32 coreIdx, const Uint16* code, Uint32 size)
  126. {
  127. RetCode ret;
  128. if (vdi_init(coreIdx) < 0)
  129. return RETCODE_FAILURE;
  130. VLOG(INFO, "[VDI] InitializeVPU1 \n");
  131. EnterLock(coreIdx);
  132. if (vdi_get_instance_num(coreIdx) > 0) {
  133. if (ProductVpuScan(coreIdx) == 0) {
  134. LeaveLock(coreIdx);
  135. return RETCODE_NOT_FOUND_VPU_DEVICE;
  136. }
  137. }
  138. /* force to reset vpu, so that the vpu in a clean state */
  139. #if 0
  140. if (VPU_IsInit(coreIdx) != 0) {
  141. ProductVpuReInit(coreIdx, (void *)code, size);
  142. LeaveLock(coreIdx);
  143. return RETCODE_CALLED_BEFORE;
  144. }
  145. #endif
  146. InitCodecInstancePool(coreIdx);
  147. ret = ProductVpuReset(coreIdx, SW_RESET_ON_BOOT);
  148. if (ret != RETCODE_SUCCESS) {
  149. LeaveLock(coreIdx);
  150. return ret;
  151. }
  152. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  153. create_sw_uart_thread(coreIdx);
  154. usleep(500*1000);
  155. #endif
  156. ret = ProductVpuInit(coreIdx, (void*)code, size);
  157. if (ret != RETCODE_SUCCESS) {
  158. LeaveLock(coreIdx);
  159. return ret;
  160. }
  161. LeaveLock(coreIdx);
  162. return RETCODE_SUCCESS;
  163. }
  164. RetCode VPU_Init(Uint32 coreIdx)
  165. {
  166. if (coreIdx >= MAX_NUM_VPU_CORE)
  167. return RETCODE_INVALID_PARAM;
  168. if (s_bitCodeSize[coreIdx] == 0)
  169. return RETCODE_NOT_FOUND_BITCODE_PATH;
  170. return InitializeVPU(coreIdx, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  171. }
  172. RetCode VPU_InitWithBitcode(Uint32 coreIdx, const Uint16* code, Uint32 size)
  173. {
  174. if (coreIdx >= MAX_NUM_VPU_CORE)
  175. return RETCODE_INVALID_PARAM;
  176. if (code == NULL || size == 0)
  177. return RETCODE_INVALID_PARAM;
  178. s_pusBitCode[coreIdx] = NULL;
  179. s_pusBitCode[coreIdx] = (Uint16 *)osal_malloc(size*sizeof(Uint16));
  180. if (!s_pusBitCode[coreIdx])
  181. return RETCODE_INSUFFICIENT_RESOURCE;
  182. osal_memcpy((void *)s_pusBitCode[coreIdx], (const void *)code, size*sizeof(Uint16));
  183. s_bitCodeSize[coreIdx] = size;
  184. return InitializeVPU(coreIdx, code, size);
  185. }
  186. RetCode VPU_DeInit(Uint32 coreIdx)
  187. {
  188. int ret;
  189. if (coreIdx >= MAX_NUM_VPU_CORE)
  190. return RETCODE_INVALID_PARAM;
  191. EnterLock(coreIdx);
  192. if (s_pusBitCode[coreIdx]) {
  193. osal_free((void *)s_pusBitCode[coreIdx]);
  194. }
  195. s_pusBitCode[coreIdx] = NULL;
  196. s_bitCodeSize[coreIdx] = 0;
  197. LeaveLock(coreIdx);
  198. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  199. destory_sw_uart_thread();
  200. #endif
  201. ret = vdi_release(coreIdx);
  202. if (ret != 0)
  203. return RETCODE_FAILURE;
  204. return RETCODE_SUCCESS;
  205. }
  206. RetCode VPU_GetVersionInfo(Uint32 coreIdx, Uint32 *versionInfo, Uint32 *revision, Uint32 *productId)
  207. {
  208. RetCode ret;
  209. if (coreIdx >= MAX_NUM_VPU_CORE)
  210. return RETCODE_INVALID_PARAM;
  211. EnterLock(coreIdx);
  212. if (ProductVpuIsInit(coreIdx) == 0) {
  213. LeaveLock(coreIdx);
  214. return RETCODE_NOT_INITIALIZED;
  215. }
  216. if (GetPendingInst(coreIdx)) {
  217. LeaveLock(coreIdx);
  218. return RETCODE_FRAME_NOT_COMPLETE;
  219. }
  220. if (productId != NULL) {
  221. *productId = ProductVpuGetId(coreIdx);
  222. }
  223. ret = ProductVpuGetVersion(coreIdx, versionInfo, revision);
  224. LeaveLock(coreIdx);
  225. return ret;
  226. }
  227. RetCode VPU_GetProductInfo(Uint32 coreIdx, VpuAttr *productInfo)
  228. {
  229. RetCode ret;
  230. if (coreIdx >= MAX_NUM_VPU_CORE)
  231. return RETCODE_INVALID_PARAM;
  232. EnterLock(coreIdx);
  233. if (ProductVpuIsInit(coreIdx) == 0) {
  234. LeaveLock(coreIdx);
  235. return RETCODE_NOT_INITIALIZED;
  236. }
  237. if (GetPendingInst(coreIdx)) {
  238. LeaveLock(coreIdx);
  239. return RETCODE_FRAME_NOT_COMPLETE;
  240. }
  241. productInfo->productId = ProductVpuGetId(coreIdx);
  242. ret = ProductVpuGetProductInfo(coreIdx, productInfo);
  243. LeaveLock(coreIdx);
  244. return ret;
  245. }
  246. RetCode VPU_DecOpen(DecHandle* pHandle, DecOpenParam* pop)
  247. {
  248. CodecInst * pCodecInst;
  249. DecInfo* pDecInfo;
  250. RetCode ret;
  251. ret = ProductCheckDecOpenParam(pop);
  252. if (ret != RETCODE_SUCCESS)
  253. return ret;
  254. EnterLock(pop->coreIdx);
  255. if (VPU_IsInit(pop->coreIdx) == 0) {
  256. LeaveLock(pop->coreIdx);
  257. return RETCODE_NOT_INITIALIZED;
  258. }
  259. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  260. if (ret != RETCODE_SUCCESS)
  261. {
  262. *pHandle = 0;
  263. LeaveLock(pop->coreIdx);
  264. return ret;
  265. }
  266. pCodecInst->isDecoder = TRUE;
  267. *pHandle = pCodecInst;
  268. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  269. osal_memset(pDecInfo, 0x00, sizeof(DecInfo));
  270. osal_memcpy((void*)&pDecInfo->openParam, pop, sizeof(DecOpenParam));
  271. if (pop->bitstreamFormat == STD_MPEG4) {
  272. pCodecInst->codecMode = MP4_DEC;
  273. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  274. }
  275. else if (pop->bitstreamFormat == STD_AVC) {
  276. if (pCodecInst->productId == PRODUCT_ID_521 || pCodecInst->productId == PRODUCT_ID_511 || pCodecInst->productId == PRODUCT_ID_517) {
  277. pCodecInst->codecMode = W_AVC_DEC;
  278. }
  279. else {
  280. pCodecInst->codecMode = AVC_DEC;
  281. pCodecInst->codecModeAux = pop->avcExtension;
  282. }
  283. }
  284. else if (pop->bitstreamFormat == STD_VC1) {
  285. pCodecInst->codecMode = VC1_DEC;
  286. }
  287. else if (pop->bitstreamFormat == STD_MPEG2) {
  288. pCodecInst->codecMode = MP2_DEC;
  289. }
  290. else if (pop->bitstreamFormat == STD_H263) {
  291. pCodecInst->codecMode = MP4_DEC;
  292. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  293. }
  294. else if (pop->bitstreamFormat == STD_DIV3) {
  295. pCodecInst->codecMode = DV3_DEC;
  296. pCodecInst->codecModeAux = MP4_AUX_DIVX3;
  297. }
  298. else if (pop->bitstreamFormat == STD_RV) {
  299. pCodecInst->codecMode = RV_DEC;
  300. }
  301. else if (pop->bitstreamFormat == STD_AVS) {
  302. pCodecInst->codecMode = AVS_DEC;
  303. }
  304. else if (pop->bitstreamFormat == STD_THO) {
  305. pCodecInst->codecMode = VPX_DEC;
  306. pCodecInst->codecModeAux = VPX_AUX_THO;
  307. }
  308. else if (pop->bitstreamFormat == STD_VP3) {
  309. pCodecInst->codecMode = VPX_DEC;
  310. pCodecInst->codecModeAux = VPX_AUX_THO;
  311. }
  312. else if (pop->bitstreamFormat == STD_VP8) {
  313. pCodecInst->codecMode = VPX_DEC;
  314. pCodecInst->codecModeAux = VPX_AUX_VP8;
  315. }
  316. else if (pop->bitstreamFormat == STD_HEVC) {
  317. pCodecInst->codecMode = W_HEVC_DEC;
  318. }
  319. else if (pop->bitstreamFormat == STD_VP9) {
  320. pCodecInst->codecMode = W_VP9_DEC;
  321. }
  322. else if (pop->bitstreamFormat == STD_AVS2) {
  323. pCodecInst->codecMode = W_AVS2_DEC;
  324. }
  325. else if (pop->bitstreamFormat == STD_SVAC) {
  326. pCodecInst->codecMode = W_SVAC_DEC;
  327. }
  328. else if (pop->bitstreamFormat == STD_AV1) {
  329. pCodecInst->codecMode = W_AV1_DEC;
  330. }
  331. else {
  332. LeaveLock(pop->coreIdx);
  333. return RETCODE_INVALID_PARAM;
  334. }
  335. pDecInfo->wtlEnable = pop->wtlEnable;
  336. pDecInfo->wtlMode = pop->wtlMode;
  337. if (!pDecInfo->wtlEnable)
  338. pDecInfo->wtlMode = 0;
  339. pDecInfo->streamWrPtr = pop->bitstreamBuffer;
  340. pDecInfo->streamRdPtr = pop->bitstreamBuffer;
  341. pDecInfo->frameDelay = -1;
  342. pDecInfo->streamBufStartAddr = pop->bitstreamBuffer;
  343. pDecInfo->streamBufSize = pop->bitstreamBufferSize;
  344. pDecInfo->streamBufEndAddr = pop->bitstreamBuffer + pop->bitstreamBufferSize;
  345. pDecInfo->reorderEnable = VPU_REORDER_ENABLE;
  346. pDecInfo->mirrorDirection = MIRDIR_NONE;
  347. pDecInfo->prevFrameEndPos = pop->bitstreamBuffer;
  348. pDecInfo->tempIdSelectMode = pop->tempIdSelectMode;
  349. pDecInfo->targetSubLayerId = DECODE_ALL_TEMPORAL_LAYERS;
  350. pDecInfo->relTargetLayerId = 0;
  351. if ((ret=ProductVpuDecBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  352. *pHandle = 0;
  353. LeaveLock(pCodecInst->coreIdx);
  354. return ret;
  355. }
  356. pDecInfo->tiled2LinearEnable = pop->tiled2LinearEnable;
  357. pDecInfo->tiled2LinearMode = pop->tiled2LinearMode;
  358. if (!pDecInfo->tiled2LinearEnable)
  359. pDecInfo->tiled2LinearMode = 0; //coda980 only
  360. if (!pDecInfo->wtlEnable) //coda980, wave320, wave410 only
  361. pDecInfo->wtlMode = 0;
  362. osal_memset((void*)&pDecInfo->cacheConfig, 0x00, sizeof(MaverickCacheConfig));
  363. LeaveLock(pCodecInst->coreIdx);
  364. return RETCODE_SUCCESS;
  365. }
  366. RetCode VPU_DecClose(DecHandle handle)
  367. {
  368. CodecInst * pCodecInst;
  369. DecInfo * pDecInfo;
  370. RetCode ret;
  371. int i;
  372. ret = CheckDecInstanceValidity(handle);
  373. if (ret != RETCODE_SUCCESS) {
  374. return ret;
  375. }
  376. pCodecInst = handle;
  377. if (!pCodecInst) {
  378. return RETCODE_INVALID_HANDLE;
  379. }
  380. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  381. EnterLock(pCodecInst->coreIdx);
  382. if ((ret=ProductVpuDecFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  383. if (pCodecInst->loggingEnable)
  384. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 2);
  385. if (ret == RETCODE_VPU_STILL_RUNNING) {
  386. LeaveLock(pCodecInst->coreIdx);
  387. return ret;
  388. }
  389. }
  390. if (pCodecInst->loggingEnable)
  391. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 0);
  392. if (pDecInfo->vbSlice.size)
  393. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  394. if (pDecInfo->vbWork.size) {
  395. if (pDecInfo->workBufferAllocExt == 0) {
  396. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork, DEC_WORK, pCodecInst->instIndex);
  397. }
  398. else {
  399. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork);
  400. }
  401. }
  402. if (pDecInfo->vbFrame.size) {
  403. if (pDecInfo->frameAllocExt == 0) {
  404. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  405. }
  406. }
  407. for ( i=0 ; i<MAX_REG_FRAME; i++) {
  408. if (pDecInfo->vbMV[i].size)
  409. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  410. if (pDecInfo->vbFbcYTbl[i].size)
  411. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  412. if (pDecInfo->vbFbcCTbl[i].size)
  413. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  414. }
  415. if (pDecInfo->vbTemp.size)
  416. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTemp);
  417. if (pDecInfo->vbPPU.size) {
  418. if (pDecInfo->ppuAllocExt == 0)
  419. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  420. }
  421. if (pDecInfo->vbWTL.size)
  422. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  423. if (pDecInfo->vbUserData.size)
  424. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData);
  425. if (pDecInfo->vbReport.size)
  426. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbReport, DEC_ETC, pCodecInst->instIndex);
  427. if (pDecInfo->vbTask.size)
  428. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTask, DEC_TASK, pCodecInst->instIndex);
  429. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  430. ClearPendingInst(pCodecInst->coreIdx);
  431. LeaveLock(pCodecInst->coreIdx);
  432. FreeCodecInstance(pCodecInst);
  433. return ret;
  434. }
  435. RetCode VPU_DecSetEscSeqInit(DecHandle handle, int escape)
  436. {
  437. CodecInst * pCodecInst;
  438. DecInfo * pDecInfo;
  439. RetCode ret;
  440. ret = CheckDecInstanceValidity(handle);
  441. if (ret != RETCODE_SUCCESS)
  442. return ret;
  443. pCodecInst = handle;
  444. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  445. if (pDecInfo->openParam.bitstreamMode != BS_MODE_INTERRUPT)
  446. return RETCODE_INVALID_PARAM;
  447. pDecInfo->seqInitEscape = escape;
  448. return RETCODE_SUCCESS;
  449. }
  450. RetCode VPU_DecGetInitialInfo(DecHandle handle, DecInitialInfo* info)
  451. {
  452. CodecInst* pCodecInst;
  453. DecInfo* pDecInfo;
  454. RetCode ret;
  455. Int32 flags;
  456. Uint32 interruptBit;
  457. VpuAttr* pAttr;
  458. if (PRODUCT_ID_W_SERIES(handle->productId)) {
  459. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 || handle->productId == PRODUCT_ID_517 || handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511) {
  460. interruptBit = INT_WAVE5_INIT_SEQ;
  461. }
  462. else
  463. return RETCODE_INVALID_PARAM;
  464. }
  465. else {
  466. /* CODA9xx */
  467. interruptBit = INT_BIT_SEQ_INIT;
  468. }
  469. ret = CheckDecInstanceValidity(handle);
  470. if (ret != RETCODE_SUCCESS)
  471. return ret;
  472. if (info == NULL)
  473. return RETCODE_INVALID_PARAM;
  474. pCodecInst = handle;
  475. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  476. ret = ProductVpuDecCheckCapability(pCodecInst);
  477. if (ret != RETCODE_SUCCESS)
  478. return ret;
  479. EnterLock(pCodecInst->coreIdx);
  480. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  481. if (GetPendingInst(pCodecInst->coreIdx)) {
  482. /* The other instance is running */
  483. LeaveLock(pCodecInst->coreIdx);
  484. return RETCODE_FRAME_NOT_COMPLETE;
  485. }
  486. if (DecBitstreamBufEmpty(pDecInfo)) {
  487. LeaveLock(pCodecInst->coreIdx);
  488. return RETCODE_WRONG_CALL_SEQUENCE;
  489. }
  490. ret = ProductVpuDecInitSeq(handle);
  491. if (ret != RETCODE_SUCCESS) {
  492. LeaveLock(pCodecInst->coreIdx);
  493. return ret;
  494. }
  495. if (pAttr->supportCommandQueue == TRUE) {
  496. LeaveLock(pCodecInst->coreIdx);
  497. }
  498. flags = ProductVpuWaitInterrupt(pCodecInst, __VPU_BUSY_TIMEOUT);
  499. if (pAttr->supportCommandQueue == TRUE) {
  500. EnterLock(pCodecInst->coreIdx);
  501. }
  502. if (flags == -1) {
  503. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  504. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  505. ret = RETCODE_VPU_RESPONSE_TIMEOUT;
  506. }
  507. else {
  508. if (flags&(1<<interruptBit))
  509. ProductVpuClearInterrupt(pCodecInst->coreIdx, (1<<interruptBit));
  510. if (flags != (1<<interruptBit))
  511. ret = RETCODE_FAILURE;
  512. else
  513. ret = ProductVpuDecGetSeqInfo(handle, info);
  514. }
  515. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  516. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  517. pDecInfo->initialInfo = *info;
  518. if (ret == RETCODE_SUCCESS) {
  519. pDecInfo->initialInfoObtained = 1;
  520. }
  521. SetPendingInst(pCodecInst->coreIdx, 0);
  522. LeaveLock(pCodecInst->coreIdx);
  523. return ret;
  524. }
  525. RetCode VPU_DecIssueSeqInit(DecHandle handle)
  526. {
  527. CodecInst* pCodecInst;
  528. RetCode ret;
  529. VpuAttr* pAttr;
  530. ret = CheckDecInstanceValidity(handle);
  531. if (ret != RETCODE_SUCCESS)
  532. return ret;
  533. pCodecInst = handle;
  534. EnterLock(pCodecInst->coreIdx);
  535. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  536. if (GetPendingInst(pCodecInst->coreIdx)) {
  537. LeaveLock(pCodecInst->coreIdx);
  538. return RETCODE_FRAME_NOT_COMPLETE;
  539. }
  540. ret = ProductVpuDecInitSeq(handle);
  541. if (ret == RETCODE_SUCCESS) {
  542. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  543. }
  544. if (pAttr->supportCommandQueue == TRUE) {
  545. SetPendingInst(pCodecInst->coreIdx, NULL);
  546. LeaveLock(pCodecInst->coreIdx);
  547. }
  548. return ret;
  549. }
  550. RetCode VPU_DecCompleteSeqInit(DecHandle handle, DecInitialInfo * info)
  551. {
  552. CodecInst* pCodecInst;
  553. DecInfo* pDecInfo;
  554. RetCode ret;
  555. VpuAttr* pAttr;
  556. ret = CheckDecInstanceValidity(handle);
  557. if (ret != RETCODE_SUCCESS) {
  558. return ret;
  559. }
  560. if (info == 0) {
  561. return RETCODE_INVALID_PARAM;
  562. }
  563. pCodecInst = handle;
  564. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  565. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  566. if (pAttr->supportCommandQueue == TRUE) {
  567. EnterLock(pCodecInst->coreIdx);
  568. }
  569. else {
  570. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  571. SetPendingInst(pCodecInst->coreIdx, 0);
  572. LeaveLock(pCodecInst->coreIdx);
  573. return RETCODE_WRONG_CALL_SEQUENCE;
  574. }
  575. }
  576. ret = ProductVpuDecGetSeqInfo(handle, info);
  577. if (ret == RETCODE_SUCCESS) {
  578. pDecInfo->initialInfoObtained = 1;
  579. }
  580. info->rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  581. info->wrPtr = pDecInfo->streamWrPtr;
  582. pDecInfo->prevFrameEndPos = info->rdPtr;
  583. pDecInfo->initialInfo = *info;
  584. SetPendingInst(pCodecInst->coreIdx, NULL);
  585. LeaveLock(pCodecInst->coreIdx);
  586. return ret;
  587. }
  588. static RetCode DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int numFbsForDecoding, int numFbsForWTL, int stride, int height, int mapType)
  589. {
  590. CodecInst* pCodecInst;
  591. DecInfo* pDecInfo;
  592. Int32 i;
  593. RetCode ret;
  594. FrameBuffer* fb, nullFb;
  595. vpu_buffer_t* vb;
  596. FrameBufferFormat format = FORMAT_420;
  597. Int32 totalNumOfFbs;
  598. ret = CheckDecInstanceValidity(handle);
  599. if (ret != RETCODE_SUCCESS)
  600. return ret;
  601. if (numFbsForDecoding > MAX_FRAMEBUFFER_COUNT || numFbsForWTL > MAX_FRAMEBUFFER_COUNT) {
  602. return RETCODE_INVALID_PARAM;
  603. }
  604. osal_memset(&nullFb, 0x00, sizeof(FrameBuffer));
  605. pCodecInst = handle;
  606. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  607. pDecInfo->numFbsForDecoding = numFbsForDecoding;
  608. pDecInfo->numFbsForWTL = numFbsForWTL;
  609. pDecInfo->numFrameBuffers = numFbsForDecoding + numFbsForWTL;
  610. pDecInfo->stride = stride;
  611. if (pCodecInst->codecMode == VPX_DEC)
  612. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  613. else if (pCodecInst->codecMode == W_VP9_DEC)
  614. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  615. else
  616. pDecInfo->frameBufferHeight = height;
  617. pDecInfo->mapType = mapType;
  618. pDecInfo->mapCfg.productId = pCodecInst->productId;
  619. ret = ProductVpuDecCheckCapability(pCodecInst);
  620. if (ret != RETCODE_SUCCESS)
  621. return ret;
  622. if (!pDecInfo->initialInfoObtained)
  623. return RETCODE_WRONG_CALL_SEQUENCE;
  624. if ( (stride < pDecInfo->initialInfo.picWidth) || (stride % 8 != 0) || (height<pDecInfo->initialInfo.picHeight) ) {
  625. return RETCODE_INVALID_STRIDE;
  626. }
  627. EnterLock(pCodecInst->coreIdx);
  628. if (GetPendingInst(pCodecInst->coreIdx)) {
  629. LeaveLock(pCodecInst->coreIdx);
  630. return RETCODE_FRAME_NOT_COMPLETE;
  631. }
  632. /* clear frameBufPool */
  633. for (i=0; i<(int)(sizeof(pDecInfo->frameBufPool)/sizeof(FrameBuffer)); i++) {
  634. pDecInfo->frameBufPool[i] = nullFb;
  635. }
  636. /* LinearMap or TiledMap, compressed framebuffer inclusive. */
  637. if (pDecInfo->initialInfo.lumaBitdepth > 8 || pDecInfo->initialInfo.chromaBitdepth > 8)
  638. format = FORMAT_420_P10_16BIT_LSB;
  639. totalNumOfFbs = numFbsForDecoding + numFbsForWTL;
  640. if (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE)
  641. totalNumOfFbs = numFbsForDecoding + numFbsForDecoding + numFbsForWTL; // (EL + BL + linear)
  642. if (bufArray) {
  643. for(i=0; i<totalNumOfFbs; i++)
  644. pDecInfo->frameBufPool[i] = bufArray[i];
  645. }
  646. else {
  647. vb = &pDecInfo->vbFrame;
  648. fb = &pDecInfo->frameBufPool[0];
  649. ret = ProductVpuAllocateFramebuffer(
  650. (CodecInst*)handle, fb, (TiledMapType)mapType, numFbsForDecoding, stride, height, format,
  651. pDecInfo->openParam.cbcrInterleave,
  652. pDecInfo->openParam.nv21,
  653. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_CODEC);
  654. if (ret != RETCODE_SUCCESS) {
  655. LeaveLock(pCodecInst->coreIdx);
  656. return ret;
  657. }
  658. }
  659. if (pCodecInst->productId != PRODUCT_ID_960) {
  660. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->frameBufPool[0].bufY;
  661. }
  662. /* LinearMap */
  663. if (pDecInfo->wtlEnable == TRUE || numFbsForWTL != 0) {
  664. pDecInfo->stride = stride;
  665. if (!bufArray) {
  666. TiledMapType map;
  667. map = pDecInfo->wtlMode==FF_FRAME ? LINEAR_FRAME_MAP : LINEAR_FIELD_MAP;
  668. vb = &pDecInfo->vbWTL;
  669. fb = &pDecInfo->frameBufPool[numFbsForDecoding];
  670. ret = ProductVpuAllocateFramebuffer(
  671. (CodecInst*)handle, fb, map, numFbsForWTL, stride, height,
  672. pDecInfo->wtlFormat,
  673. pDecInfo->openParam.cbcrInterleave,
  674. pDecInfo->openParam.nv21,
  675. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_PPU);
  676. if (ret != RETCODE_SUCCESS) {
  677. LeaveLock(pCodecInst->coreIdx);
  678. return ret;
  679. }
  680. }
  681. }
  682. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  683. LeaveLock(pCodecInst->coreIdx);
  684. return ret;
  685. }
  686. RetCode VPU_DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int num, int stride, int height, int mapType)
  687. {
  688. DecInfo* pDecInfo = &handle->CodecInfo->decInfo;
  689. Uint32 numWTL = 0;
  690. if (pDecInfo->wtlEnable == TRUE) numWTL = num;
  691. return DecRegisterFrameBuffer(handle, bufArray, num, numWTL, stride, height, mapType);
  692. }
  693. RetCode VPU_DecRegisterFrameBufferEx(DecHandle handle, FrameBuffer *bufArray, int numOfDecFbs, int numOfDisplayFbs, int stride, int height, int mapType)
  694. {
  695. return DecRegisterFrameBuffer(handle, bufArray, numOfDecFbs, numOfDisplayFbs, stride, height, mapType);
  696. }
  697. RetCode VPU_DecGetFrameBuffer(DecHandle handle, int frameIdx, FrameBuffer* frameBuf)
  698. {
  699. CodecInst * pCodecInst;
  700. DecInfo * pDecInfo;
  701. RetCode ret;
  702. ret = CheckDecInstanceValidity(handle);
  703. if (ret != RETCODE_SUCCESS)
  704. return ret;
  705. if (frameBuf == 0)
  706. return RETCODE_INVALID_PARAM;
  707. pCodecInst = handle;
  708. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  709. if (frameIdx < 0 || frameIdx >= pDecInfo->numFrameBuffers)
  710. return RETCODE_INVALID_PARAM;
  711. *frameBuf = pDecInfo->frameBufPool[frameIdx];
  712. return RETCODE_SUCCESS;
  713. }
  714. RetCode VPU_DecUpdateFrameBuffer(
  715. DecHandle handle,
  716. FrameBuffer* fbcFb,
  717. FrameBuffer* linearFb,
  718. Int32 mvColIndex,
  719. Int32 picWidth,
  720. Int32 picHeight
  721. )
  722. {
  723. if (handle == NULL) {
  724. return RETCODE_INVALID_HANDLE;
  725. }
  726. return ProductVpuDecUpdateFrameBuffer((CodecInst*)handle, fbcFb, linearFb, mvColIndex, picWidth, picHeight);
  727. }
  728. RetCode VPU_DecGetBitstreamBuffer(DecHandle handle, PhysicalAddress* prdPtr, PhysicalAddress* pwrPtr, Uint32* size)
  729. {
  730. CodecInst* pCodecInst;
  731. DecInfo* pDecInfo;
  732. PhysicalAddress rdPtr;
  733. PhysicalAddress wrPtr;
  734. PhysicalAddress tempPtr;
  735. int room;
  736. Int32 coreIdx;
  737. VpuAttr* pAttr;
  738. coreIdx = handle->coreIdx;
  739. pAttr = &g_VpuCoreAttributes[coreIdx];
  740. pCodecInst = handle;
  741. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  742. if (pAttr->supportCommandQueue == TRUE) {
  743. if (pDecInfo->rdPtrValidFlag == TRUE) { // when RdPtr has been updated by calling SetRdPtr.
  744. rdPtr = pDecInfo->streamRdPtr;
  745. }
  746. else {
  747. EnterLock(pCodecInst->coreIdx);
  748. rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  749. LeaveLock(pCodecInst->coreIdx);
  750. }
  751. }
  752. else {
  753. if (GetPendingInst(coreIdx) == pCodecInst) {
  754. if (pCodecInst->codecMode == AVC_DEC && pCodecInst->codecModeAux == AVC_AUX_MVC) {
  755. rdPtr = pDecInfo->streamRdPtr;
  756. }
  757. else {
  758. rdPtr = VpuReadReg(coreIdx, pDecInfo->streamRdPtrRegAddr);
  759. }
  760. }
  761. else {
  762. rdPtr = pDecInfo->streamRdPtr;
  763. }
  764. }
  765. wrPtr = pDecInfo->streamWrPtr;
  766. pAttr = &g_VpuCoreAttributes[coreIdx];
  767. tempPtr = rdPtr;
  768. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  769. if (wrPtr < tempPtr) {
  770. room = tempPtr - wrPtr - pAttr->bitstreamBufferMargin*2;
  771. }
  772. else {
  773. room = (pDecInfo->streamBufEndAddr - wrPtr) + (tempPtr - pDecInfo->streamBufStartAddr) - pAttr->bitstreamBufferMargin*2;
  774. }
  775. room--;
  776. }
  777. else {
  778. room = (pDecInfo->streamBufEndAddr - wrPtr);
  779. }
  780. if (prdPtr) *prdPtr = tempPtr;
  781. if (pwrPtr) *pwrPtr = wrPtr;
  782. if (size) *size = room;
  783. return RETCODE_SUCCESS;
  784. }
  785. RetCode VPU_DecUpdateBitstreamBuffer(DecHandle handle, int size)
  786. {
  787. CodecInst* pCodecInst;
  788. DecInfo* pDecInfo;
  789. PhysicalAddress wrPtr;
  790. PhysicalAddress rdPtr;
  791. RetCode ret;
  792. BOOL running;
  793. VpuAttr* pAttr;
  794. ret = CheckDecInstanceValidity(handle);
  795. if (ret != RETCODE_SUCCESS)
  796. return ret;
  797. pCodecInst = handle;
  798. if (!pCodecInst)
  799. return RETCODE_INVALID_HANDLE;
  800. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  801. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  802. wrPtr = pDecInfo->streamWrPtr;
  803. if (pAttr->supportCommandQueue == TRUE) {
  804. running = FALSE;
  805. }
  806. else {
  807. running = (BOOL)(GetPendingInst(pCodecInst->coreIdx) == pCodecInst);
  808. }
  809. if (size > 0) {
  810. Uint32 room = 0;
  811. if (running == TRUE)
  812. rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  813. else
  814. rdPtr = pDecInfo->streamRdPtr;
  815. if (wrPtr < rdPtr) {
  816. if (rdPtr <= wrPtr + size) {
  817. return RETCODE_INVALID_PARAM;
  818. }
  819. }
  820. wrPtr += size;
  821. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  822. if (wrPtr > pDecInfo->streamBufEndAddr) {
  823. room = wrPtr - pDecInfo->streamBufEndAddr;
  824. wrPtr = pDecInfo->streamBufStartAddr;
  825. wrPtr += room;
  826. }
  827. else if (wrPtr == pDecInfo->streamBufEndAddr) {
  828. wrPtr = pDecInfo->streamBufStartAddr;
  829. }
  830. }
  831. pDecInfo->streamWrPtr = wrPtr;
  832. pDecInfo->streamRdPtr = rdPtr;
  833. if (running == TRUE) {
  834. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr, wrPtr);
  835. }
  836. }
  837. if (running == FALSE) {
  838. EnterLock(pCodecInst->coreIdx);
  839. }
  840. ret = ProductVpuDecSetBitstreamFlag(pCodecInst, running, size);
  841. if (running == FALSE) {
  842. LeaveLock(pCodecInst->coreIdx);
  843. }
  844. return ret;
  845. }
  846. RetCode VPU_HWReset(Uint32 coreIdx)
  847. {
  848. if (vdi_hw_reset(coreIdx) < 0 )
  849. return RETCODE_FAILURE;
  850. if (GetPendingInst(coreIdx))
  851. {
  852. SetPendingInst(coreIdx, 0);
  853. LeaveLock(coreIdx); //if vpu is in a lock state. release the state;
  854. }
  855. return RETCODE_SUCCESS;
  856. }
  857. /**
  858. * VPU_SWReset
  859. * IN
  860. * forcedReset : 1 if there is no need to waiting for BUS transaction,
  861. * 0 for otherwise
  862. * OUT
  863. * RetCode : RETCODE_FAILURE if failed to reset,
  864. * RETCODE_SUCCESS for otherwise
  865. */
  866. RetCode VPU_SWReset(Uint32 coreIdx, SWResetMode resetMode, void *pendingInst)
  867. {
  868. CodecInst *pCodecInst = (CodecInst *)pendingInst;
  869. RetCode ret = RETCODE_SUCCESS;
  870. VpuAttr* attr = &g_VpuCoreAttributes[coreIdx];
  871. if (attr->supportCommandQueue == TRUE) {
  872. if (pCodecInst && pCodecInst->loggingEnable) {
  873. vdi_log(pCodecInst->coreIdx, 0x10000, 1);
  874. }
  875. EnterLock(coreIdx);
  876. ret = ProductVpuReset(coreIdx, resetMode);
  877. LeaveLock(coreIdx);
  878. if (pCodecInst && pCodecInst->loggingEnable) {
  879. vdi_log(pCodecInst->coreIdx, 0x10000, 0);
  880. }
  881. }
  882. else {
  883. if (pCodecInst) {
  884. if (pCodecInst->loggingEnable) {
  885. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 1);
  886. }
  887. }
  888. else {
  889. EnterLock(coreIdx);
  890. }
  891. ret = ProductVpuReset(coreIdx, resetMode);
  892. if (pCodecInst) {
  893. if (pCodecInst->loggingEnable) {
  894. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 0);
  895. }
  896. SetPendingInst(pCodecInst->coreIdx, 0);
  897. LeaveLock(coreIdx);
  898. }
  899. else {
  900. LeaveLock(coreIdx);
  901. }
  902. }
  903. return ret;
  904. }
  905. //---- VPU_SLEEP/WAKE
  906. RetCode VPU_SleepWake(Uint32 coreIdx, int iSleepWake)
  907. {
  908. RetCode ret;
  909. EnterLock(coreIdx);
  910. ret = ProductVpuSleepWake(coreIdx, iSleepWake, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  911. LeaveLock(coreIdx);
  912. return ret;
  913. }
  914. RetCode VPU_DecStartOneFrame(DecHandle handle, DecParam *param)
  915. {
  916. CodecInst* pCodecInst;
  917. DecInfo* pDecInfo;
  918. Uint32 val = 0;
  919. RetCode ret = RETCODE_SUCCESS;
  920. VpuAttr* pAttr = NULL;
  921. ret = CheckDecInstanceValidity(handle);
  922. if (ret != RETCODE_SUCCESS) {
  923. return ret;
  924. }
  925. pCodecInst = (CodecInst*)handle;
  926. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  927. if (pDecInfo->stride == 0) { // This means frame buffers have not been registered.
  928. return RETCODE_WRONG_CALL_SEQUENCE;
  929. }
  930. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  931. EnterLock(pCodecInst->coreIdx);
  932. if (GetPendingInst(pCodecInst->coreIdx)) {
  933. LeaveLock(pCodecInst->coreIdx);
  934. return RETCODE_FRAME_NOT_COMPLETE;
  935. }
  936. if (pAttr->supportCommandQueue == FALSE) {
  937. EnterDispFlagLock(pCodecInst->coreIdx);
  938. val = pDecInfo->frameDisplayFlag;
  939. val |= pDecInfo->setDisplayIndexes;
  940. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  941. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  942. pDecInfo->clearDisplayIndexes = 0;
  943. pDecInfo->setDisplayIndexes = 0;
  944. LeaveDispFlagLock(pCodecInst->coreIdx);
  945. }
  946. pDecInfo->frameStartPos = pDecInfo->streamRdPtr;
  947. ret = ProductVpuDecode(pCodecInst, param);
  948. if (pAttr->supportCommandQueue == TRUE) {
  949. SetPendingInst(pCodecInst->coreIdx, NULL);
  950. LeaveLock(pCodecInst->coreIdx);
  951. }
  952. else {
  953. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  954. }
  955. return ret;
  956. }
  957. RetCode VPU_DecGetOutputInfo(DecHandle handle, DecOutputInfo* info)
  958. {
  959. CodecInst* pCodecInst;
  960. DecInfo* pDecInfo;
  961. RetCode ret;
  962. VpuRect rectInfo;
  963. Uint32 val;
  964. Int32 decodedIndex;
  965. Int32 displayIndex;
  966. Uint32 maxDecIndex;
  967. VpuAttr* pAttr;
  968. ret = CheckDecInstanceValidity(handle);
  969. if (ret != RETCODE_SUCCESS) {
  970. return ret;
  971. }
  972. if (info == 0) {
  973. return RETCODE_INVALID_PARAM;
  974. }
  975. pCodecInst = handle;
  976. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  977. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  978. if (pAttr->supportCommandQueue == TRUE) {
  979. EnterLock(pCodecInst->coreIdx);
  980. }
  981. else {
  982. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  983. SetPendingInst(pCodecInst->coreIdx, 0);
  984. LeaveLock(pCodecInst->coreIdx);
  985. return RETCODE_WRONG_CALL_SEQUENCE;
  986. }
  987. }
  988. osal_memset((void*)info, 0x00, sizeof(DecOutputInfo));
  989. ret = ProductVpuDecGetResult(pCodecInst, info);
  990. if (ret != RETCODE_SUCCESS) {
  991. info->rdPtr = pDecInfo->streamRdPtr;
  992. info->wrPtr = pDecInfo->streamWrPtr;
  993. SetPendingInst(pCodecInst->coreIdx, 0);
  994. LeaveLock(pCodecInst->coreIdx);
  995. return ret;
  996. }
  997. decodedIndex = info->indexFrameDecoded;
  998. // Calculate display frame region
  999. val = 0;
  1000. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1001. //default value
  1002. rectInfo.left = 0;
  1003. rectInfo.right = info->decPicWidth;
  1004. rectInfo.top = 0;
  1005. rectInfo.bottom = info->decPicHeight;
  1006. if (pCodecInst->codecMode == W_HEVC_DEC || pCodecInst->codecMode == AVC_DEC || pCodecInst->codecMode == AVS_DEC)
  1007. rectInfo = pDecInfo->initialInfo.picCropRect;
  1008. if (pCodecInst->codecMode == W_HEVC_DEC)
  1009. pDecInfo->decOutInfo[decodedIndex].decodedPOC = info->decodedPOC;
  1010. if (pCodecInst->codecMode == W_AVS2_DEC)
  1011. pDecInfo->decOutInfo[decodedIndex].avs2Info.decodedPOI = info->avs2Info.decodedPOI;
  1012. info->rcDecoded.left = pDecInfo->decOutInfo[decodedIndex].rcDecoded.left = rectInfo.left;
  1013. info->rcDecoded.right = pDecInfo->decOutInfo[decodedIndex].rcDecoded.right = rectInfo.right;
  1014. info->rcDecoded.top = pDecInfo->decOutInfo[decodedIndex].rcDecoded.top = rectInfo.top;
  1015. info->rcDecoded.bottom = pDecInfo->decOutInfo[decodedIndex].rcDecoded.bottom = rectInfo.bottom;
  1016. }
  1017. else
  1018. {
  1019. info->rcDecoded.left = 0;
  1020. info->rcDecoded.right = info->decPicWidth;
  1021. info->rcDecoded.top = 0;
  1022. info->rcDecoded.bottom = info->decPicHeight;
  1023. }
  1024. displayIndex = info->indexFrameDisplay;
  1025. if (info->indexFrameDisplay >= 0 && info->indexFrameDisplay < MAX_GDI_IDX)
  1026. {
  1027. if (pCodecInst->codecMode == VC1_DEC) // vc1 rotates decoded frame buffer region. the other std rotated whole frame buffer region.
  1028. {
  1029. if (pDecInfo->rotationEnable && (pDecInfo->rotationAngle==90 || pDecInfo->rotationAngle==270))
  1030. {
  1031. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1032. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1033. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1034. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1035. }
  1036. else
  1037. {
  1038. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1039. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1040. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1041. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1042. }
  1043. }
  1044. else
  1045. {
  1046. if (pDecInfo->rotationEnable)
  1047. {
  1048. switch(pDecInfo->rotationAngle)
  1049. {
  1050. case 90:
  1051. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1052. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1053. info->rcDisplay.top = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1054. info->rcDisplay.bottom = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1055. break;
  1056. case 270:
  1057. info->rcDisplay.left = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1058. info->rcDisplay.right = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1059. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1060. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1061. break;
  1062. case 180:
  1063. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1064. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1065. info->rcDisplay.top = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1066. info->rcDisplay.bottom = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1067. break;
  1068. default:
  1069. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1070. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1071. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1072. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1073. break;
  1074. }
  1075. }
  1076. else
  1077. {
  1078. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1079. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1080. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1081. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1082. }
  1083. if (pDecInfo->mirrorEnable) {
  1084. Uint32 temp;
  1085. Uint32 width = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicHeight: info->decPicWidth;
  1086. Uint32 height = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicWidth : info->decPicHeight;
  1087. if (pDecInfo->mirrorDirection & MIRDIR_VER) {
  1088. temp = info->rcDisplay.top;
  1089. info->rcDisplay.top = height - info->rcDisplay.bottom;
  1090. info->rcDisplay.bottom = height - temp;
  1091. }
  1092. if (pDecInfo->mirrorDirection & MIRDIR_HOR) {
  1093. temp = info->rcDisplay.left;
  1094. info->rcDisplay.left = width - info->rcDisplay.right;
  1095. info->rcDisplay.right = width - temp;
  1096. }
  1097. }
  1098. switch (pCodecInst->codecMode) {
  1099. case W_HEVC_DEC:
  1100. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1101. break;
  1102. case W_AVS2_DEC:
  1103. info->avs2Info.displayPOI = pDecInfo->decOutInfo[displayIndex].avs2Info.decodedPOI;
  1104. break;
  1105. case W_AVC_DEC:
  1106. if (TRUE == PRODUCT_ID_W_SERIES(pCodecInst->productId)) {
  1107. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1108. }
  1109. break;
  1110. default:
  1111. break;
  1112. }
  1113. }
  1114. if (info->indexFrameDisplay == info->indexFrameDecoded)
  1115. {
  1116. info->dispPicWidth = info->decPicWidth;
  1117. info->dispPicHeight = info->decPicHeight;
  1118. }
  1119. else
  1120. {
  1121. /*
  1122. When indexFrameDecoded < 0, and indexFrameDisplay >= 0
  1123. info->decPicWidth and info->decPicHeight are still valid
  1124. But those of pDecInfo->decOutInfo[displayIndex] are invalid in VP9
  1125. */
  1126. info->dispPicWidth = pDecInfo->decOutInfo[displayIndex].decPicWidth;
  1127. info->dispPicHeight = pDecInfo->decOutInfo[displayIndex].decPicHeight;
  1128. }
  1129. if (pDecInfo->scalerEnable == TRUE) {
  1130. if ((pDecInfo->scaleWidth != 0) && (pDecInfo->scaleHeight != 0)) {
  1131. info->dispPicWidth = pDecInfo->scaleWidth;
  1132. info->dispPicHeight = pDecInfo->scaleHeight;
  1133. info->rcDisplay.right = pDecInfo->scaleWidth;
  1134. info->rcDisplay.bottom = pDecInfo->scaleHeight;
  1135. }
  1136. }
  1137. }
  1138. else
  1139. {
  1140. info->rcDisplay.left = 0;
  1141. info->rcDisplay.right = 0;
  1142. info->rcDisplay.top = 0;
  1143. info->rcDisplay.bottom = 0;
  1144. if (pDecInfo->rotationEnable || pDecInfo->mirrorEnable || pDecInfo->tiled2LinearEnable || pDecInfo->deringEnable) {
  1145. info->dispPicWidth = info->decPicWidth;
  1146. info->dispPicHeight = info->decPicHeight;
  1147. }
  1148. else {
  1149. info->dispPicWidth = 0;
  1150. info->dispPicHeight = 0;
  1151. }
  1152. }
  1153. if ( (pCodecInst->codecMode == VC1_DEC ) && info->indexFrameDisplay != -3) {
  1154. if (pDecInfo->vc1BframeDisplayValid == 0) {
  1155. if (info->picType == 2)
  1156. info->indexFrameDisplay = -3;
  1157. else
  1158. pDecInfo->vc1BframeDisplayValid = 1;
  1159. }
  1160. }
  1161. pDecInfo->streamRdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  1162. pDecInfo->frameDisplayFlag = VpuReadReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr);
  1163. if (pCodecInst->codecMode == W_VP9_DEC) {
  1164. pDecInfo->frameDisplayFlag &= 0xFFFF;
  1165. }
  1166. pDecInfo->frameEndPos = pDecInfo->streamRdPtr;
  1167. if (pDecInfo->frameEndPos < pDecInfo->frameStartPos)
  1168. info->consumedByte = pDecInfo->frameEndPos + pDecInfo->streamBufSize - pDecInfo->frameStartPos;
  1169. else
  1170. info->consumedByte = pDecInfo->frameEndPos - pDecInfo->frameStartPos;
  1171. if (pDecInfo->deringEnable || pDecInfo->mirrorEnable || pDecInfo->rotationEnable || pDecInfo->tiled2LinearEnable) {
  1172. info->dispFrame = pDecInfo->rotatorOutput;
  1173. info->dispFrame.stride = pDecInfo->rotatorStride;
  1174. }
  1175. else {
  1176. Int32 SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1177. val = (pDecInfo->openParam.wtlEnable == TRUE ? pDecInfo->numFbsForDecoding: 0); //fbOffset
  1178. if (SvacSvcFlag && pDecInfo->openParam.wtlEnable == TRUE)
  1179. val = pDecInfo->numFbsForDecoding*2;
  1180. maxDecIndex = (pDecInfo->numFbsForDecoding > pDecInfo->numFbsForWTL) ? (SvacSvcFlag ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding) : pDecInfo->numFbsForWTL;
  1181. if (0 <= info->indexFrameDisplay && info->indexFrameDisplay < (int)maxDecIndex)
  1182. info->dispFrame = pDecInfo->frameBufPool[val+info->indexFrameDisplay];
  1183. }
  1184. info->rdPtr = pDecInfo->streamRdPtr;
  1185. info->wrPtr = pDecInfo->streamWrPtr;
  1186. info->frameDisplayFlag = pDecInfo->frameDisplayFlag;
  1187. info->sequenceNo = pDecInfo->initialInfo.sequenceNo;
  1188. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1189. pDecInfo->decOutInfo[decodedIndex] = *info;
  1190. }
  1191. if (displayIndex >= 0 && displayIndex < MAX_GDI_IDX) {
  1192. info->numOfTotMBs = info->numOfTotMBs;
  1193. info->numOfErrMBs = info->numOfErrMBs;
  1194. info->numOfTotMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfTotMBs;
  1195. info->numOfErrMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfErrMBs;
  1196. info->dispFrame.sequenceNo = info->sequenceNo;
  1197. }
  1198. else {
  1199. info->numOfTotMBsInDisplay = 0;
  1200. info->numOfErrMBsInDisplay = 0;
  1201. }
  1202. if (info->sequenceChanged != 0) {
  1203. if (!(pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)) {
  1204. /* Update new sequence information */
  1205. osal_memcpy((void*)&pDecInfo->initialInfo, (void*)&pDecInfo->newSeqInfo, sizeof(DecInitialInfo));
  1206. }
  1207. if ((info->sequenceChanged & SEQ_CHANGE_INTER_RES_CHANGE) != SEQ_CHANGE_INTER_RES_CHANGE) {
  1208. pDecInfo->initialInfo.sequenceNo++;
  1209. }
  1210. }
  1211. SetPendingInst(pCodecInst->coreIdx, 0);
  1212. LeaveLock(pCodecInst->coreIdx);
  1213. return RETCODE_SUCCESS;
  1214. }
  1215. RetCode VPU_DecFrameBufferFlush(DecHandle handle, DecOutputInfo* pRemainings, Uint32* retNum)
  1216. {
  1217. CodecInst* pCodecInst;
  1218. DecInfo* pDecInfo;
  1219. DecOutputInfo* pOut;
  1220. RetCode ret;
  1221. FramebufferIndex retIndex[MAX_GDI_IDX];
  1222. Uint32 retRemainings = 0;
  1223. Int32 i, index, val;
  1224. VpuAttr* pAttr = NULL;
  1225. ret = CheckDecInstanceValidity(handle);
  1226. if (ret != RETCODE_SUCCESS)
  1227. return ret;
  1228. pCodecInst = handle;
  1229. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1230. EnterLock(pCodecInst->coreIdx);
  1231. if (GetPendingInst(pCodecInst->coreIdx)) {
  1232. LeaveLock(pCodecInst->coreIdx);
  1233. return RETCODE_FRAME_NOT_COMPLETE;
  1234. }
  1235. osal_memset((void*)retIndex, 0xff, sizeof(retIndex));
  1236. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1237. if (pAttr->supportCommandQueue == FALSE) {
  1238. EnterDispFlagLock(pCodecInst->coreIdx);
  1239. val = pDecInfo->frameDisplayFlag;
  1240. val |= pDecInfo->setDisplayIndexes;
  1241. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  1242. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  1243. pDecInfo->clearDisplayIndexes = 0;
  1244. pDecInfo->setDisplayIndexes = 0;
  1245. LeaveDispFlagLock(pCodecInst->coreIdx);
  1246. }
  1247. if ((ret=ProductVpuDecFlush(pCodecInst, retIndex, MAX_GDI_IDX)) != RETCODE_SUCCESS) {
  1248. LeaveLock(pCodecInst->coreIdx);
  1249. return ret;
  1250. }
  1251. if (pRemainings != NULL) {
  1252. for (i=0; i<MAX_GDI_IDX; i++) {
  1253. index = (pDecInfo->wtlEnable == TRUE) ? retIndex[i].tiledIndex : retIndex[i].linearIndex;
  1254. if (index < 0)
  1255. break;
  1256. pRemainings[i] = pDecInfo->decOutInfo[index];
  1257. pOut = &pRemainings[i];
  1258. pOut->indexFrameDisplay = pOut->indexFrameDecoded;
  1259. pOut->indexFrameDisplayForTiled = pOut->indexFrameDecodedForTiled;
  1260. if (pDecInfo->wtlEnable == TRUE)
  1261. pOut->dispFrame = pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding+retIndex[i].linearIndex];
  1262. else
  1263. pOut->dispFrame = pDecInfo->frameBufPool[index];
  1264. pOut->dispFrame.sequenceNo = pOut->sequenceNo;
  1265. if (pCodecInst->codecMode == W_VP9_DEC || pCodecInst->codecMode == W_AVS2_DEC) {
  1266. Uint32 regVal;
  1267. if ((pDecInfo->scaleWidth == 0) || (pDecInfo->scaleHeight == 0)) {
  1268. regVal = VpuReadReg(pCodecInst->coreIdx, W5_RET_DEC_DISPLAY_SIZE);
  1269. pOut->dispPicWidth = regVal>>16;
  1270. pOut->dispPicHeight = regVal&0xffff;
  1271. }
  1272. else {
  1273. pOut->dispPicWidth = pDecInfo->scaleWidth;
  1274. pOut->dispPicHeight = pDecInfo->scaleHeight;
  1275. }
  1276. }
  1277. else {
  1278. pOut->dispPicWidth = pOut->decPicWidth;
  1279. pOut->dispPicHeight = pOut->decPicHeight;
  1280. }
  1281. if (pDecInfo->rotationEnable)
  1282. {
  1283. switch(pDecInfo->rotationAngle)
  1284. {
  1285. case 90:
  1286. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.top;
  1287. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1288. pOut->rcDisplay.top = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.right;
  1289. pOut->rcDisplay.bottom = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.left;
  1290. break;
  1291. case 270:
  1292. pOut->rcDisplay.left = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1293. pOut->rcDisplay.right = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1294. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.left;
  1295. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.right;
  1296. break;
  1297. case 180:
  1298. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1299. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1300. pOut->rcDisplay.top = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1301. pOut->rcDisplay.bottom = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1302. break;
  1303. default:
  1304. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1305. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1306. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1307. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1308. break;
  1309. }
  1310. }
  1311. else
  1312. {
  1313. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1314. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1315. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1316. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1317. }
  1318. retRemainings++;
  1319. }
  1320. }
  1321. if (retNum) *retNum = retRemainings;
  1322. if (pCodecInst->loggingEnable)
  1323. vdi_log(pCodecInst->coreIdx, DEC_BUF_FLUSH, 0);
  1324. LeaveLock(pCodecInst->coreIdx);
  1325. return ret;
  1326. }
  1327. RetCode VPU_DecSetRdPtr(DecHandle handle, PhysicalAddress addr, int updateWrPtr)
  1328. {
  1329. CodecInst* pCodecInst;
  1330. CodecInst* pPendingInst;
  1331. DecInfo* pDecInfo;
  1332. RetCode ret;
  1333. ret = CheckDecInstanceValidity(handle);
  1334. if (ret != RETCODE_SUCCESS) {
  1335. return ret;
  1336. }
  1337. pCodecInst = (CodecInst*)handle;
  1338. ret = ProductVpuDecCheckCapability(pCodecInst);
  1339. if (ret != RETCODE_SUCCESS) {
  1340. return ret;
  1341. }
  1342. pCodecInst = handle;
  1343. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1344. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1345. if (pCodecInst == pPendingInst) {
  1346. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1347. }
  1348. else {
  1349. EnterLock(pCodecInst->coreIdx);
  1350. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1351. LeaveLock(pCodecInst->coreIdx);
  1352. }
  1353. pDecInfo->streamRdPtr = addr;
  1354. pDecInfo->prevFrameEndPos = addr;
  1355. if (updateWrPtr == TRUE) {
  1356. pDecInfo->streamWrPtr = addr;
  1357. }
  1358. pDecInfo->rdPtrValidFlag = 1;
  1359. return RETCODE_SUCCESS;
  1360. }
  1361. RetCode VPU_EncSetWrPtr(EncHandle handle, PhysicalAddress addr, int updateRdPtr)
  1362. {
  1363. CodecInst* pCodecInst;
  1364. CodecInst* pPendingInst;
  1365. EncInfo * pEncInfo;
  1366. RetCode ret;
  1367. ret = CheckEncInstanceValidity(handle);
  1368. if (ret != RETCODE_SUCCESS)
  1369. return ret;
  1370. pCodecInst = (CodecInst*)handle;
  1371. if (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980) {
  1372. return RETCODE_NOT_SUPPORTED_FEATURE;
  1373. }
  1374. pEncInfo = &handle->CodecInfo->encInfo;
  1375. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1376. if (pCodecInst == pPendingInst) {
  1377. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1378. }
  1379. else {
  1380. EnterLock(pCodecInst->coreIdx);
  1381. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1382. LeaveLock(pCodecInst->coreIdx);
  1383. }
  1384. pEncInfo->streamWrPtr = addr;
  1385. if (updateRdPtr)
  1386. pEncInfo->streamRdPtr = addr;
  1387. return RETCODE_SUCCESS;
  1388. }
  1389. RetCode VPU_DecClrDispFlag(DecHandle handle, int index)
  1390. {
  1391. CodecInst* pCodecInst;
  1392. DecInfo* pDecInfo;
  1393. RetCode ret = RETCODE_SUCCESS;
  1394. Int32 endIndex, SvacSvcFlag;
  1395. VpuAttr* pAttr = NULL;
  1396. BOOL supportCommandQueue;
  1397. ret = CheckDecInstanceValidity(handle);
  1398. if (ret != RETCODE_SUCCESS)
  1399. return ret;
  1400. pCodecInst = handle;
  1401. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1402. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1403. SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1404. endIndex = (pDecInfo->openParam.wtlEnable == TRUE) ? pDecInfo->numFbsForWTL : (SvacSvcFlag == TRUE ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding);
  1405. if ((index < 0) || (index > (endIndex - 1))) {
  1406. return RETCODE_INVALID_PARAM;
  1407. }
  1408. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1409. if (supportCommandQueue == TRUE) {
  1410. EnterLock(pCodecInst->coreIdx);
  1411. ret = ProductClrDispFlag(pCodecInst, index);
  1412. LeaveLock(pCodecInst->coreIdx);
  1413. }
  1414. else {
  1415. EnterDispFlagLock(pCodecInst->coreIdx);
  1416. pDecInfo->clearDisplayIndexes |= (1<<index);
  1417. LeaveDispFlagLock(pCodecInst->coreIdx);
  1418. }
  1419. return ret;
  1420. }
  1421. RetCode VPU_DecGiveCommand(DecHandle handle, CodecCommand cmd, void* param)
  1422. {
  1423. CodecInst* pCodecInst;
  1424. DecInfo* pDecInfo;
  1425. RetCode ret;
  1426. ret = CheckDecInstanceValidity(handle);
  1427. if (ret != RETCODE_SUCCESS)
  1428. return ret;
  1429. pCodecInst = handle;
  1430. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1431. switch (cmd)
  1432. {
  1433. case ENABLE_ROTATION :
  1434. {
  1435. if (pDecInfo->rotatorStride == 0) {
  1436. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1437. }
  1438. pDecInfo->rotationEnable = 1;
  1439. break;
  1440. }
  1441. case DISABLE_ROTATION :
  1442. {
  1443. pDecInfo->rotationEnable = 0;
  1444. break;
  1445. }
  1446. case ENABLE_MIRRORING :
  1447. {
  1448. if (pDecInfo->rotatorStride == 0) {
  1449. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1450. }
  1451. pDecInfo->mirrorEnable = 1;
  1452. break;
  1453. }
  1454. case DISABLE_MIRRORING :
  1455. {
  1456. pDecInfo->mirrorEnable = 0;
  1457. break;
  1458. }
  1459. case SET_MIRROR_DIRECTION :
  1460. {
  1461. MirrorDirection mirDir;
  1462. if (param == 0) {
  1463. return RETCODE_INVALID_PARAM;
  1464. }
  1465. mirDir = *(MirrorDirection *)param;
  1466. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  1467. return RETCODE_INVALID_PARAM;
  1468. }
  1469. pDecInfo->mirrorDirection = mirDir;
  1470. break;
  1471. }
  1472. case SET_ROTATION_ANGLE :
  1473. {
  1474. int angle;
  1475. if (param == 0) {
  1476. return RETCODE_INVALID_PARAM;
  1477. }
  1478. angle = *(int *)param;
  1479. if (angle != 0 && angle != 90 &&
  1480. angle != 180 && angle != 270) {
  1481. return RETCODE_INVALID_PARAM;
  1482. }
  1483. if (pDecInfo->rotatorStride != 0) {
  1484. if (angle == 90 || angle ==270) {
  1485. if (pDecInfo->initialInfo.picHeight > pDecInfo->rotatorStride) {
  1486. return RETCODE_INVALID_PARAM;
  1487. }
  1488. } else {
  1489. if (pDecInfo->initialInfo.picWidth > pDecInfo->rotatorStride) {
  1490. return RETCODE_INVALID_PARAM;
  1491. }
  1492. }
  1493. }
  1494. pDecInfo->rotationAngle = angle;
  1495. break;
  1496. }
  1497. case SET_ROTATOR_OUTPUT :
  1498. {
  1499. FrameBuffer *frame;
  1500. if (param == 0) {
  1501. return RETCODE_INVALID_PARAM;
  1502. }
  1503. frame = (FrameBuffer *)param;
  1504. pDecInfo->rotatorOutput = *frame;
  1505. pDecInfo->rotatorOutputValid = 1;
  1506. break;
  1507. }
  1508. case SET_ROTATOR_STRIDE :
  1509. {
  1510. int stride;
  1511. if (param == 0) {
  1512. return RETCODE_INVALID_PARAM;
  1513. }
  1514. stride = *(int *)param;
  1515. if (stride % 8 != 0 || stride == 0) {
  1516. return RETCODE_INVALID_STRIDE;
  1517. }
  1518. if (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) {
  1519. if (pDecInfo->initialInfo.picHeight > stride) {
  1520. return RETCODE_INVALID_STRIDE;
  1521. }
  1522. } else {
  1523. if (pDecInfo->initialInfo.picWidth > stride) {
  1524. return RETCODE_INVALID_STRIDE;
  1525. }
  1526. }
  1527. pDecInfo->rotatorStride = stride;
  1528. break;
  1529. }
  1530. case DEC_SET_SPS_RBSP:
  1531. {
  1532. if (pCodecInst->codecMode != AVC_DEC) {
  1533. return RETCODE_INVALID_COMMAND;
  1534. }
  1535. if (param == 0) {
  1536. return RETCODE_INVALID_PARAM;
  1537. }
  1538. return SetParaSet(handle, 0, (DecParamSet *)param);
  1539. }
  1540. case DEC_SET_PPS_RBSP:
  1541. {
  1542. if (pCodecInst->codecMode != AVC_DEC) {
  1543. return RETCODE_INVALID_COMMAND;
  1544. }
  1545. if (param == 0) {
  1546. return RETCODE_INVALID_PARAM;
  1547. }
  1548. return SetParaSet(handle, 1, (DecParamSet *)param);
  1549. }
  1550. case ENABLE_DERING :
  1551. {
  1552. if (pDecInfo->rotatorStride == 0) {
  1553. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1554. }
  1555. pDecInfo->deringEnable = 1;
  1556. break;
  1557. }
  1558. case DISABLE_DERING :
  1559. {
  1560. pDecInfo->deringEnable = 0;
  1561. break;
  1562. }
  1563. case SET_SEC_AXI:
  1564. {
  1565. SecAxiUse secAxiUse;
  1566. if (param == 0) {
  1567. return RETCODE_INVALID_PARAM;
  1568. }
  1569. secAxiUse = *(SecAxiUse *)param;
  1570. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 ||
  1571. handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511 || handle->productId == PRODUCT_ID_517) {
  1572. pDecInfo->secAxiInfo.u.wave.useIpEnable = secAxiUse.u.wave.useIpEnable;
  1573. pDecInfo->secAxiInfo.u.wave.useLfRowEnable = secAxiUse.u.wave.useLfRowEnable;
  1574. pDecInfo->secAxiInfo.u.wave.useBitEnable = secAxiUse.u.wave.useBitEnable;
  1575. pDecInfo->secAxiInfo.u.wave.useSclEnable = secAxiUse.u.wave.useSclEnable;
  1576. }
  1577. else {
  1578. pDecInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  1579. pDecInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  1580. pDecInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  1581. pDecInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  1582. pDecInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  1583. pDecInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  1584. }
  1585. break;
  1586. }
  1587. case ENABLE_REP_USERDATA:
  1588. {
  1589. if (!pDecInfo->userDataBufAddr) {
  1590. return RETCODE_USERDATA_BUF_NOT_SET;
  1591. }
  1592. if (pDecInfo->userDataBufSize == 0) {
  1593. return RETCODE_USERDATA_BUF_NOT_SET;
  1594. }
  1595. switch (pCodecInst->productId) {
  1596. case PRODUCT_ID_512:
  1597. case PRODUCT_ID_515:
  1598. case PRODUCT_ID_521:
  1599. case PRODUCT_ID_511:
  1600. case PRODUCT_ID_517:
  1601. if (!param)
  1602. return RETCODE_INVALID_PARAM;
  1603. pDecInfo->userDataEnable = *(Uint32*)param;
  1604. break;
  1605. case PRODUCT_ID_960:
  1606. case PRODUCT_ID_980:
  1607. pDecInfo->userDataEnable = TRUE;
  1608. break;
  1609. default:
  1610. VLOG(INFO, "%s(ENABLE_REP_DATA) invalid productId(%d)\n", __FUNCTION__, pCodecInst->productId);
  1611. return RETCODE_INVALID_PARAM;
  1612. }
  1613. break;
  1614. }
  1615. case DISABLE_REP_USERDATA:
  1616. {
  1617. pDecInfo->userDataEnable = 0;
  1618. break;
  1619. }
  1620. case SET_ADDR_REP_USERDATA:
  1621. {
  1622. PhysicalAddress userDataBufAddr;
  1623. if (param == 0) {
  1624. return RETCODE_INVALID_PARAM;
  1625. }
  1626. userDataBufAddr = *(PhysicalAddress *)param;
  1627. if (userDataBufAddr % 8 != 0 || userDataBufAddr == 0) {
  1628. return RETCODE_INVALID_PARAM;
  1629. }
  1630. pDecInfo->userDataBufAddr = userDataBufAddr;
  1631. break;
  1632. }
  1633. case SET_VIRT_ADDR_REP_USERDATA:
  1634. {
  1635. unsigned long userDataVirtAddr;
  1636. if (param == 0) {
  1637. return RETCODE_INVALID_PARAM;
  1638. }
  1639. if (!pDecInfo->userDataBufAddr) {
  1640. return RETCODE_USERDATA_BUF_NOT_SET;
  1641. }
  1642. if (pDecInfo->userDataBufSize == 0) {
  1643. return RETCODE_USERDATA_BUF_NOT_SET;
  1644. }
  1645. userDataVirtAddr = *(unsigned long *)param;
  1646. if (!userDataVirtAddr) {
  1647. return RETCODE_INVALID_PARAM;
  1648. }
  1649. pDecInfo->vbUserData.phys_addr = pDecInfo->userDataBufAddr;
  1650. pDecInfo->vbUserData.size = pDecInfo->userDataBufSize;
  1651. pDecInfo->vbUserData.virt_addr = (unsigned long)userDataVirtAddr;
  1652. if (vdi_attach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData) != 0) {
  1653. return RETCODE_INSUFFICIENT_RESOURCE;
  1654. }
  1655. break;
  1656. }
  1657. case SET_SIZE_REP_USERDATA:
  1658. {
  1659. PhysicalAddress userDataBufSize;
  1660. if (param == 0) {
  1661. return RETCODE_INVALID_PARAM;
  1662. }
  1663. userDataBufSize = *(PhysicalAddress *)param;
  1664. pDecInfo->userDataBufSize = userDataBufSize;
  1665. break;
  1666. }
  1667. case SET_USERDATA_REPORT_MODE:
  1668. {
  1669. int userDataMode;
  1670. userDataMode = *(int *)param;
  1671. if (userDataMode != 1 && userDataMode != 0) {
  1672. return RETCODE_INVALID_PARAM;
  1673. }
  1674. pDecInfo->userDataReportMode = userDataMode;
  1675. break;
  1676. }
  1677. case SET_CACHE_CONFIG:
  1678. {
  1679. MaverickCacheConfig *mcCacheConfig;
  1680. if (param == 0) {
  1681. return RETCODE_INVALID_PARAM;
  1682. }
  1683. mcCacheConfig = (MaverickCacheConfig *)param;
  1684. pDecInfo->cacheConfig = *mcCacheConfig;
  1685. }
  1686. break;
  1687. case SET_LOW_DELAY_CONFIG:
  1688. {
  1689. LowDelayInfo *lowDelayInfo;
  1690. if (param == 0) {
  1691. return RETCODE_INVALID_PARAM;
  1692. }
  1693. if (pCodecInst->productId != PRODUCT_ID_980) {
  1694. return RETCODE_NOT_SUPPORTED_FEATURE;
  1695. }
  1696. lowDelayInfo = (LowDelayInfo *)param;
  1697. if (lowDelayInfo->lowDelayEn) {
  1698. if ( (pCodecInst->codecMode != AVC_DEC) ||
  1699. pDecInfo->rotationEnable ||
  1700. pDecInfo->mirrorEnable ||
  1701. pDecInfo->tiled2LinearEnable ||
  1702. pDecInfo->deringEnable) {
  1703. return RETCODE_INVALID_PARAM;
  1704. }
  1705. }
  1706. pDecInfo->lowDelayInfo.lowDelayEn = lowDelayInfo->lowDelayEn;
  1707. pDecInfo->lowDelayInfo.numRows = lowDelayInfo->numRows;
  1708. }
  1709. break;
  1710. case DEC_SET_FRAME_DELAY:
  1711. {
  1712. pDecInfo->frameDelay = *(int *)param;
  1713. break;
  1714. }
  1715. case DEC_ENABLE_REORDER:
  1716. {
  1717. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1718. {
  1719. if (pDecInfo->initialInfoObtained) {
  1720. return RETCODE_WRONG_CALL_SEQUENCE;
  1721. }
  1722. }
  1723. pDecInfo->reorderEnable = 1;
  1724. break;
  1725. }
  1726. case DEC_DISABLE_REORDER:
  1727. {
  1728. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1729. {
  1730. if (pDecInfo->initialInfoObtained) {
  1731. return RETCODE_WRONG_CALL_SEQUENCE;
  1732. }
  1733. if(pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != VC1_DEC && pCodecInst->codecMode != AVS_DEC) {
  1734. return RETCODE_INVALID_COMMAND;
  1735. }
  1736. }
  1737. pDecInfo->reorderEnable = 0;
  1738. break;
  1739. }
  1740. case DEC_SET_AVC_ERROR_CONCEAL_MODE:
  1741. {
  1742. if(pCodecInst->codecMode != AVC_DEC) {
  1743. return RETCODE_INVALID_COMMAND;
  1744. }
  1745. pDecInfo->avcErrorConcealMode = *(int *)param;
  1746. break;
  1747. }
  1748. case DEC_FREE_FRAME_BUFFER:
  1749. {
  1750. int i;
  1751. if (pDecInfo->vbSlice.size)
  1752. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  1753. if (pDecInfo->vbFrame.size){
  1754. if (pDecInfo->frameAllocExt == 0)
  1755. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  1756. }
  1757. for (i=0 ; i<MAX_REG_FRAME; i++) {
  1758. if (pDecInfo->vbFbcYTbl[i].size)
  1759. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  1760. if (pDecInfo->vbFbcCTbl[i].size)
  1761. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  1762. if (pDecInfo->vbMV[i].size)
  1763. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  1764. }
  1765. if (pDecInfo->vbPPU.size) {
  1766. if (pDecInfo->ppuAllocExt == 0)
  1767. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  1768. }
  1769. if (pDecInfo->wtlEnable) {
  1770. if (pDecInfo->vbWTL.size)
  1771. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  1772. }
  1773. break;
  1774. }
  1775. case DEC_GET_FRAMEBUF_INFO:
  1776. {
  1777. DecGetFramebufInfo* fbInfo = (DecGetFramebufInfo*)param;
  1778. Uint32 i;
  1779. fbInfo->vbFrame = pDecInfo->vbFrame;
  1780. fbInfo->vbWTL = pDecInfo->vbWTL;
  1781. for (i=0 ; i<MAX_REG_FRAME; i++)
  1782. {
  1783. fbInfo->vbFbcYTbl[i] = pDecInfo->vbFbcYTbl[i];
  1784. fbInfo->vbFbcCTbl[i] = pDecInfo->vbFbcCTbl[i];
  1785. fbInfo->vbMvCol[i] = pDecInfo->vbMV[i];
  1786. }
  1787. for (i=0; i<MAX_GDI_IDX*2; i++) {
  1788. fbInfo->framebufPool[i] = pDecInfo->frameBufPool[i];
  1789. }
  1790. fbInfo->vbTask = pDecInfo->vbTask;
  1791. }
  1792. break;
  1793. case DEC_RESET_FRAMEBUF_INFO:
  1794. {
  1795. int i;
  1796. pDecInfo->vbFrame.base = 0;
  1797. pDecInfo->vbFrame.phys_addr = 0;
  1798. pDecInfo->vbFrame.virt_addr = 0;
  1799. pDecInfo->vbFrame.size = 0;
  1800. pDecInfo->vbWTL.base = 0;
  1801. pDecInfo->vbWTL.phys_addr = 0;
  1802. pDecInfo->vbWTL.virt_addr = 0;
  1803. pDecInfo->vbWTL.size = 0;
  1804. for (i=0 ; i<MAX_REG_FRAME; i++)
  1805. {
  1806. pDecInfo->vbFbcYTbl[i].base = 0;
  1807. pDecInfo->vbFbcYTbl[i].phys_addr = 0;
  1808. pDecInfo->vbFbcYTbl[i].virt_addr = 0;
  1809. pDecInfo->vbFbcYTbl[i].size = 0;
  1810. pDecInfo->vbFbcCTbl[i].base = 0;
  1811. pDecInfo->vbFbcCTbl[i].phys_addr = 0;
  1812. pDecInfo->vbFbcCTbl[i].virt_addr = 0;
  1813. pDecInfo->vbFbcCTbl[i].size = 0;
  1814. pDecInfo->vbMV[i].base = 0;
  1815. pDecInfo->vbMV[i].phys_addr = 0;
  1816. pDecInfo->vbMV[i].virt_addr = 0;
  1817. pDecInfo->vbMV[i].size = 0;
  1818. }
  1819. pDecInfo->frameDisplayFlag = 0;
  1820. pDecInfo->setDisplayIndexes = 0;
  1821. pDecInfo->clearDisplayIndexes = 0;
  1822. break;
  1823. }
  1824. case DEC_GET_QUEUE_STATUS:
  1825. {
  1826. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  1827. queueInfo->instanceQueueCount = pDecInfo->instanceQueueCount;
  1828. queueInfo->reportQueueCount = pDecInfo->reportQueueCount;
  1829. break;
  1830. }
  1831. case ENABLE_DEC_THUMBNAIL_MODE:
  1832. {
  1833. pDecInfo->thumbnailMode = 1;
  1834. break;
  1835. }
  1836. case DEC_GET_SEQ_INFO:
  1837. {
  1838. DecInitialInfo* seqInfo = (DecInitialInfo*)param;
  1839. *seqInfo = pDecInfo->initialInfo;
  1840. break;
  1841. }
  1842. case DEC_GET_FIELD_PIC_TYPE:
  1843. {
  1844. return RETCODE_FAILURE;
  1845. }
  1846. case DEC_GET_DISPLAY_OUTPUT_INFO:
  1847. {
  1848. DecOutputInfo *pDecOutInfo = (DecOutputInfo *)param;
  1849. *pDecOutInfo = pDecInfo->decOutInfo[pDecOutInfo->indexFrameDisplay];
  1850. break;
  1851. }
  1852. case GET_TILEDMAP_CONFIG:
  1853. {
  1854. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  1855. if (!pMapCfg) {
  1856. return RETCODE_INVALID_PARAM;
  1857. }
  1858. if (!pDecInfo->stride) {
  1859. return RETCODE_WRONG_CALL_SEQUENCE;
  1860. }
  1861. *pMapCfg = pDecInfo->mapCfg;
  1862. break;
  1863. }
  1864. case SET_DRAM_CONFIG:
  1865. {
  1866. DRAMConfig *cfg = (DRAMConfig *)param;
  1867. if (!cfg) {
  1868. return RETCODE_INVALID_PARAM;
  1869. }
  1870. pDecInfo->dramCfg = *cfg;
  1871. break;
  1872. }
  1873. case GET_DRAM_CONFIG:
  1874. {
  1875. DRAMConfig *cfg = (DRAMConfig *)param;
  1876. if (!cfg) {
  1877. return RETCODE_INVALID_PARAM;
  1878. }
  1879. *cfg = pDecInfo->dramCfg;
  1880. break;
  1881. }
  1882. case GET_LOW_DELAY_OUTPUT:
  1883. {
  1884. DecOutputInfo *lowDelayOutput;
  1885. if (param == 0) {
  1886. return RETCODE_INVALID_PARAM;
  1887. }
  1888. if (!pDecInfo->lowDelayInfo.lowDelayEn || pCodecInst->codecMode != AVC_DEC) {
  1889. return RETCODE_INVALID_COMMAND;
  1890. }
  1891. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  1892. return RETCODE_WRONG_CALL_SEQUENCE;
  1893. }
  1894. lowDelayOutput = (DecOutputInfo *)param;
  1895. GetLowDelayOutput(pCodecInst, lowDelayOutput);
  1896. }
  1897. break;
  1898. case ENABLE_LOGGING:
  1899. {
  1900. pCodecInst->loggingEnable = 1;
  1901. }
  1902. break;
  1903. case DISABLE_LOGGING:
  1904. {
  1905. pCodecInst->loggingEnable = 0;
  1906. }
  1907. break;
  1908. case DEC_SET_SEQ_CHANGE_MASK:
  1909. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId))
  1910. return RETCODE_INVALID_PARAM;
  1911. pDecInfo->seqChangeMask = *(int*)param;
  1912. break;
  1913. case DEC_SET_WTL_FRAME_FORMAT:
  1914. pDecInfo->wtlFormat = *(FrameBufferFormat*)param;
  1915. break;
  1916. case DEC_SET_DISPLAY_FLAG:
  1917. {
  1918. Int32 index;
  1919. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1920. BOOL supportCommandQueue = FALSE;
  1921. if (param == 0) {
  1922. return RETCODE_INVALID_PARAM;
  1923. }
  1924. index = *(Int32 *)param;
  1925. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1926. if (supportCommandQueue == TRUE) {
  1927. EnterLock(pCodecInst->coreIdx);
  1928. ProductSetDispFlag(pCodecInst, index);
  1929. LeaveLock(pCodecInst->coreIdx);
  1930. }
  1931. else {
  1932. EnterDispFlagLock(pCodecInst->coreIdx);
  1933. pDecInfo->setDisplayIndexes |= (1<<index);
  1934. LeaveDispFlagLock(pCodecInst->coreIdx);
  1935. }
  1936. }
  1937. break;
  1938. case DEC_GET_SCALER_INFO:
  1939. {
  1940. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1941. if (scalerInfo == NULL) {
  1942. return RETCODE_INVALID_PARAM;
  1943. }
  1944. scalerInfo->enScaler = pDecInfo->scalerEnable;
  1945. scalerInfo->scaleWidth = pDecInfo->scaleWidth;
  1946. scalerInfo->scaleHeight = pDecInfo->scaleHeight;
  1947. }
  1948. break;
  1949. case DEC_SET_SCALER_INFO:
  1950. {
  1951. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1952. if (!pDecInfo->initialInfoObtained) {
  1953. return RETCODE_WRONG_CALL_SEQUENCE;
  1954. }
  1955. if (scalerInfo == NULL) {
  1956. return RETCODE_INVALID_PARAM;
  1957. }
  1958. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1959. if (scalerInfo->enScaler == TRUE) {
  1960. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1961. Uint32 scalerStep = (pAttr->support2AlignScaler == TRUE) ? 2 : 8;
  1962. // minW = Ceil8(picWidth/8), minH = Ceil8(picHeight/8)
  1963. Uint32 minScaleWidth = VPU_ALIGN8(pDecInfo->initialInfo.picWidth>>3);
  1964. Uint32 minScaleHeight = VPU_ALIGN8(pDecInfo->initialInfo.picHeight>>3);
  1965. if (minScaleWidth == 0) minScaleWidth = 8;
  1966. if (minScaleHeight == 0) minScaleHeight = 8;
  1967. if (scalerInfo->scaleWidth < minScaleWidth || scalerInfo->scaleHeight < minScaleHeight) {
  1968. return RETCODE_INVALID_PARAM;
  1969. }
  1970. if (scalerInfo->scaleWidth > 0 || scalerInfo->scaleHeight > 0) {
  1971. if ((scalerInfo->scaleWidth % scalerStep) || scalerInfo->scaleWidth > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picWidth))) {
  1972. return RETCODE_INVALID_PARAM;
  1973. }
  1974. if ((scalerInfo->scaleHeight % scalerStep) || scalerInfo->scaleHeight > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picHeight))) {
  1975. return RETCODE_INVALID_PARAM;
  1976. }
  1977. pDecInfo->scaleWidth = scalerInfo->scaleWidth;
  1978. pDecInfo->scaleHeight = scalerInfo->scaleHeight;
  1979. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1980. }
  1981. }
  1982. break;
  1983. }
  1984. case DEC_SET_TARGET_TEMPORAL_ID:
  1985. if (param == NULL) {
  1986. return RETCODE_INVALID_PARAM;
  1987. }
  1988. if (pDecInfo->tempIdSelectMode == FALSE)
  1989. pDecInfo->targetSubLayerId = *(Uint32*)param;
  1990. else
  1991. pDecInfo->relTargetLayerId = *(Uint32*)param;
  1992. break;
  1993. case DEC_SET_TEMPORAL_ID_MODE:
  1994. if (param == NULL) {
  1995. return RETCODE_INVALID_PARAM;
  1996. }
  1997. pDecInfo->tempIdSelectMode = *(Uint32*)param;
  1998. break;
  1999. case DEC_SET_BWB_CUR_FRAME_IDX:
  2000. pDecInfo->chBwbFrameIdx = *(Uint32*)param;
  2001. break;
  2002. case DEC_SET_FBC_CUR_FRAME_IDX:
  2003. pDecInfo->chFbcFrameIdx = *(Uint32*)param;
  2004. break;
  2005. case DEC_SET_INTER_RES_INFO_ON:
  2006. pDecInfo->interResChange = 1;
  2007. break;
  2008. case DEC_SET_INTER_RES_INFO_OFF:
  2009. pDecInfo->interResChange = 0;
  2010. break;
  2011. case DEC_FREE_FBC_TABLE_BUFFER:
  2012. {
  2013. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2014. if(pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size > 0) {
  2015. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex);
  2016. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = 0;
  2017. }
  2018. if(pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size > 0) {
  2019. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex);
  2020. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = 0;
  2021. }
  2022. }
  2023. break;
  2024. case DEC_FREE_MV_BUFFER:
  2025. {
  2026. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2027. if(pDecInfo->vbMV[fbcCurFrameIdx].size > 0) {
  2028. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex);
  2029. pDecInfo->vbMV[fbcCurFrameIdx].size = 0;
  2030. }
  2031. }
  2032. break;
  2033. case DEC_ALLOC_MV_BUFFER:
  2034. {
  2035. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2036. Uint32 size;
  2037. size = WAVE5_DEC_VP9_MVCOL_BUF_SIZE(pDecInfo->initialInfo.picWidth, pDecInfo->initialInfo.picHeight);
  2038. pDecInfo->vbMV[fbcCurFrameIdx].phys_addr = 0;
  2039. pDecInfo->vbMV[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096; /* 4096 is a margin */
  2040. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex) < 0)
  2041. return RETCODE_INSUFFICIENT_RESOURCE;
  2042. }
  2043. break;
  2044. case DEC_ALLOC_FBC_Y_TABLE_BUFFER:
  2045. {
  2046. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2047. Uint32 size;
  2048. size = WAVE5_FBC_LUMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2049. size = VPU_ALIGN16(size);
  2050. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].phys_addr = 0;
  2051. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2052. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex) < 0)
  2053. return RETCODE_INSUFFICIENT_RESOURCE;
  2054. }
  2055. break;
  2056. case DEC_ALLOC_FBC_C_TABLE_BUFFER:
  2057. {
  2058. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2059. Uint32 size;
  2060. size = WAVE5_FBC_CHROMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2061. size = VPU_ALIGN16(size);
  2062. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].phys_addr = 0;
  2063. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2064. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex) < 0)
  2065. return RETCODE_INSUFFICIENT_RESOURCE;
  2066. }
  2067. break;
  2068. case GET_BANDWIDTH_REPORT:
  2069. ret = ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2070. break;
  2071. case SET_CYCLE_PER_TICK:
  2072. {
  2073. pDecInfo->cyclePerTick = *(Uint32 *)param;
  2074. }
  2075. break;
  2076. case GET_DEBUG_INFORM:
  2077. ret = ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2078. break;
  2079. default:
  2080. return RETCODE_INVALID_COMMAND;
  2081. }
  2082. return ret;
  2083. }
  2084. RetCode VPU_DecAllocateFrameBuffer(DecHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2085. {
  2086. CodecInst* pCodecInst;
  2087. DecInfo* pDecInfo;
  2088. RetCode ret;
  2089. Uint32 gdiIndex;
  2090. ret = CheckDecInstanceValidity(handle);
  2091. if (ret != RETCODE_SUCCESS)
  2092. return ret;
  2093. pCodecInst = handle;
  2094. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  2095. if (!frameBuffer) {
  2096. return RETCODE_INVALID_PARAM;
  2097. }
  2098. if (info.type == FB_TYPE_PPU) {
  2099. if (pDecInfo->numFrameBuffers == 0)
  2100. return RETCODE_WRONG_CALL_SEQUENCE;
  2101. if (frameBuffer[0].updateFbInfo == TRUE) {
  2102. pDecInfo->ppuAllocExt = TRUE;
  2103. }
  2104. pDecInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2105. gdiIndex = pDecInfo->numFbsForDecoding;
  2106. ret = ProductVpuAllocateFramebuffer(
  2107. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2108. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbPPU, gdiIndex, FB_TYPE_PPU);
  2109. }
  2110. else if (info.type == FB_TYPE_CODEC) {
  2111. gdiIndex = 0;
  2112. if (frameBuffer[0].updateFbInfo == TRUE) {
  2113. pDecInfo->frameAllocExt = TRUE;
  2114. }
  2115. ret = ProductVpuAllocateFramebuffer(
  2116. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2117. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2118. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->vbFrame.phys_addr;
  2119. }
  2120. return ret;
  2121. }
  2122. RetCode VPU_EncOpen(EncHandle* pHandle, EncOpenParam * pop)
  2123. {
  2124. CodecInst* pCodecInst;
  2125. EncInfo* pEncInfo;
  2126. RetCode ret;
  2127. if ((ret=ProductCheckEncOpenParam(pop)) != RETCODE_SUCCESS){
  2128. return ret;
  2129. }
  2130. EnterLock(pop->coreIdx);
  2131. if (VPU_IsInit(pop->coreIdx) == 0) {
  2132. LeaveLock(pop->coreIdx);
  2133. return RETCODE_NOT_INITIALIZED;
  2134. }
  2135. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  2136. if (ret == RETCODE_FAILURE) {
  2137. *pHandle = 0;
  2138. LeaveLock(pop->coreIdx);
  2139. return RETCODE_FAILURE;
  2140. }
  2141. pCodecInst->isDecoder = FALSE;
  2142. *pHandle = pCodecInst;
  2143. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2144. osal_memset(pEncInfo, 0x00, sizeof(EncInfo));
  2145. pEncInfo->openParam = *pop;
  2146. if ((ret=ProductVpuEncBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  2147. *pHandle = 0;
  2148. }
  2149. LeaveLock(pCodecInst->coreIdx);
  2150. return ret;
  2151. }
  2152. RetCode VPU_EncClose(EncHandle handle)
  2153. {
  2154. CodecInst* pCodecInst;
  2155. EncInfo* pEncInfo;
  2156. RetCode ret;
  2157. ret = CheckEncInstanceValidity(handle);
  2158. if (ret != RETCODE_SUCCESS) {
  2159. return ret;
  2160. }
  2161. pCodecInst = handle;
  2162. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2163. EnterLock(pCodecInst->coreIdx);
  2164. if (pEncInfo->initialInfoObtained) {
  2165. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, pEncInfo->streamWrPtr);
  2166. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, pEncInfo->streamRdPtr);
  2167. if ((ret=ProductVpuEncFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  2168. if (pCodecInst->loggingEnable)
  2169. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 2);
  2170. if (ret == RETCODE_VPU_STILL_RUNNING) {
  2171. LeaveLock(pCodecInst->coreIdx);
  2172. return ret;
  2173. }
  2174. }
  2175. if (pCodecInst->loggingEnable)
  2176. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 0);
  2177. pEncInfo->streamWrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2178. }
  2179. if (pEncInfo->vbScratch.size) {
  2180. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbScratch, ENC_ETC, pCodecInst->instIndex);
  2181. }
  2182. if (pEncInfo->vbWork.size) {
  2183. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbWork, ENC_WORK, pCodecInst->instIndex);
  2184. }
  2185. if (pEncInfo->vbFrame.size) {
  2186. if (pEncInfo->frameAllocExt == 0)
  2187. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFrame, ENC_ETC, pCodecInst->instIndex);
  2188. }
  2189. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2190. if (pEncInfo->vbSubSamBuf.size)
  2191. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSamBuf, ENC_SUBSAMBUF, pCodecInst->instIndex);
  2192. if (pEncInfo->vbMV.size)
  2193. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMV, ENC_MV, pCodecInst->instIndex);
  2194. if (pEncInfo->vbFbcYTbl.size)
  2195. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcYTbl, ENC_FBCY_TBL, pCodecInst->instIndex);
  2196. if (pEncInfo->vbFbcCTbl.size)
  2197. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcCTbl, ENC_FBCC_TBL, pCodecInst->instIndex);
  2198. if (pEncInfo->vbTemp.size)
  2199. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTemp);
  2200. }
  2201. if (pEncInfo->vbPPU.size) {
  2202. if (pEncInfo->ppuAllocExt == 0)
  2203. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbPPU, ENC_ETC, pCodecInst->instIndex);
  2204. }
  2205. if (pEncInfo->vbSubSampFrame.size)
  2206. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2207. if (pEncInfo->vbMvcSubSampFrame.size)
  2208. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMvcSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2209. if (pEncInfo->vbTask.size)
  2210. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTask, ENC_TASK, pCodecInst->instIndex);
  2211. LeaveLock(pCodecInst->coreIdx);
  2212. FreeCodecInstance(pCodecInst);
  2213. return ret;
  2214. }
  2215. RetCode VPU_EncGetInitialInfo(EncHandle handle, EncInitialInfo * info)
  2216. {
  2217. CodecInst* pCodecInst;
  2218. EncInfo* pEncInfo;
  2219. RetCode ret;
  2220. ret = CheckEncInstanceValidity(handle);
  2221. if (ret != RETCODE_SUCCESS)
  2222. return ret;
  2223. if (info == 0) {
  2224. return RETCODE_INVALID_PARAM;
  2225. }
  2226. pCodecInst = handle;
  2227. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2228. EnterLock(pCodecInst->coreIdx);
  2229. if (GetPendingInst(pCodecInst->coreIdx)) {
  2230. LeaveLock(pCodecInst->coreIdx);
  2231. return RETCODE_FRAME_NOT_COMPLETE;
  2232. }
  2233. if ((ret=ProductVpuEncSetup(pCodecInst)) != RETCODE_SUCCESS) {
  2234. LeaveLock(pCodecInst->coreIdx);
  2235. return ret;
  2236. }
  2237. if (pCodecInst->codecMode == AVC_ENC && pCodecInst->codecModeAux == AVC_AUX_MVC)
  2238. info->minFrameBufferCount = 3; // reconstructed frame + 2 reference frame
  2239. else if(pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2240. info->minFrameBufferCount = pEncInfo->initialInfo.minFrameBufferCount;
  2241. info->minSrcFrameCount = pEncInfo->initialInfo.minSrcFrameCount;
  2242. }
  2243. else
  2244. info->minFrameBufferCount = 2; // reconstructed frame + reference frame
  2245. pEncInfo->initialInfo = *info;
  2246. pEncInfo->initialInfoObtained = TRUE;
  2247. LeaveLock(pCodecInst->coreIdx);
  2248. return RETCODE_SUCCESS;
  2249. }
  2250. RetCode VPU_EncRegisterFrameBuffer(EncHandle handle, FrameBuffer* bufArray, int num, int stride, int height, TiledMapType mapType)
  2251. {
  2252. CodecInst* pCodecInst;
  2253. EncInfo* pEncInfo;
  2254. Int32 i;
  2255. RetCode ret;
  2256. EncOpenParam* openParam;
  2257. FrameBuffer* fb;
  2258. ret = CheckEncInstanceValidity(handle);
  2259. // FIXME temp
  2260. if (ret != RETCODE_SUCCESS)
  2261. return ret;
  2262. pCodecInst = handle;
  2263. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2264. openParam = &pEncInfo->openParam;
  2265. if (pEncInfo->stride)
  2266. return RETCODE_CALLED_BEFORE;
  2267. if (!pEncInfo->initialInfoObtained)
  2268. return RETCODE_WRONG_CALL_SEQUENCE;
  2269. if (num < pEncInfo->initialInfo.minFrameBufferCount)
  2270. return RETCODE_INSUFFICIENT_FRAME_BUFFERS;
  2271. if (stride == 0 || (stride % 8 != 0) || stride < 0)
  2272. return RETCODE_INVALID_STRIDE;
  2273. if (height == 0 || height < 0)
  2274. return RETCODE_INVALID_PARAM;
  2275. if ( pEncInfo->productCode == WAVE521C_DUAL_CODE) {
  2276. if (openParam->bitstreamFormat == STD_HEVC) {
  2277. if (stride % 16 != 0)
  2278. return RETCODE_INVALID_STRIDE;
  2279. }
  2280. }
  2281. else {
  2282. if (openParam->bitstreamFormat == STD_HEVC) {
  2283. if (stride % 32 != 0)
  2284. return RETCODE_INVALID_STRIDE;
  2285. }
  2286. }
  2287. EnterLock(pCodecInst->coreIdx);
  2288. if (GetPendingInst(pCodecInst->coreIdx)) {
  2289. LeaveLock(pCodecInst->coreIdx);
  2290. return RETCODE_FRAME_NOT_COMPLETE;
  2291. }
  2292. pEncInfo->numFrameBuffers = num;
  2293. pEncInfo->stride = stride;
  2294. pEncInfo->frameBufferHeight = height;
  2295. pEncInfo->mapType = mapType;
  2296. pEncInfo->mapCfg.productId = pCodecInst->productId;
  2297. if (bufArray) {
  2298. for(i=0; i<num; i++) {
  2299. pEncInfo->frameBufPool[i] = bufArray[i];
  2300. }
  2301. if (openParam->EncStdParam.waveParam.svcEnable == TRUE) {
  2302. for(i=num; i<num*2; i++) {
  2303. pEncInfo->frameBufPool[i] = bufArray[i];
  2304. }
  2305. }
  2306. }
  2307. if (pEncInfo->frameAllocExt == FALSE) {
  2308. fb = pEncInfo->frameBufPool;
  2309. if (bufArray) {
  2310. if (bufArray[0].bufCb == (PhysicalAddress)-1 && bufArray[0].bufCr == (PhysicalAddress)-1) {
  2311. Uint32 size;
  2312. pEncInfo->frameAllocExt = TRUE;
  2313. size = ProductCalculateFrameBufSize(pCodecInst, pCodecInst->productId, stride, height,
  2314. (TiledMapType)mapType, (FrameBufferFormat)openParam->srcFormat,
  2315. (BOOL)openParam->cbcrInterleave, NULL);
  2316. if (mapType == LINEAR_FRAME_MAP) {
  2317. pEncInfo->vbFrame.phys_addr = bufArray[0].bufY;
  2318. pEncInfo->vbFrame.size = size * num;
  2319. }
  2320. }
  2321. }
  2322. ret = ProductVpuAllocateFramebuffer(
  2323. pCodecInst, fb, (TiledMapType)mapType, num, stride, height, (FrameBufferFormat)openParam->srcFormat,
  2324. openParam->cbcrInterleave, FALSE, openParam->frameEndian, &pEncInfo->vbFrame, 0, FB_TYPE_CODEC);
  2325. if (ret != RETCODE_SUCCESS) {
  2326. SetPendingInst(pCodecInst->coreIdx, 0);
  2327. LeaveLock(pCodecInst->coreIdx);
  2328. return ret;
  2329. }
  2330. }
  2331. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  2332. SetPendingInst(pCodecInst->coreIdx, 0);
  2333. LeaveLock(pCodecInst->coreIdx);
  2334. return ret;
  2335. }
  2336. RetCode VPU_EncGetBitstreamBuffer( EncHandle handle,
  2337. PhysicalAddress * prdPrt,
  2338. PhysicalAddress * pwrPtr,
  2339. int * size)
  2340. {
  2341. CodecInst * pCodecInst;
  2342. EncInfo * pEncInfo;
  2343. PhysicalAddress rdPtr;
  2344. PhysicalAddress wrPtr;
  2345. Uint32 room;
  2346. RetCode ret;
  2347. ret = CheckEncInstanceValidity(handle);
  2348. if (ret != RETCODE_SUCCESS)
  2349. return ret;
  2350. if ( prdPrt == 0 || pwrPtr == 0 || size == 0) {
  2351. return RETCODE_INVALID_PARAM;
  2352. }
  2353. pCodecInst = handle;
  2354. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2355. rdPtr = pEncInfo->streamRdPtr;
  2356. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2357. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2358. else {
  2359. if (handle->productId == PRODUCT_ID_521) {
  2360. EnterLock(pCodecInst->coreIdx);
  2361. ProductVpuEncGetRdWrPtr(pCodecInst, &rdPtr, &wrPtr);
  2362. LeaveLock(pCodecInst->coreIdx);
  2363. }
  2364. else
  2365. wrPtr = pEncInfo->streamWrPtr;
  2366. }
  2367. if(pEncInfo->ringBufferEnable == 1 || pEncInfo->lineBufIntEn == 1) {
  2368. if (wrPtr >= rdPtr) {
  2369. room = wrPtr - rdPtr;
  2370. }
  2371. else {
  2372. room = (pEncInfo->streamBufEndAddr - rdPtr) + (wrPtr - pEncInfo->streamBufStartAddr);
  2373. }
  2374. }
  2375. else {
  2376. if(wrPtr >= rdPtr)
  2377. room = wrPtr - rdPtr;
  2378. else
  2379. return RETCODE_INVALID_PARAM;
  2380. }
  2381. *prdPrt = rdPtr;
  2382. *pwrPtr = wrPtr;
  2383. *size = room;
  2384. return RETCODE_SUCCESS;
  2385. }
  2386. RetCode VPU_EncUpdateBitstreamBuffer(
  2387. EncHandle handle,
  2388. int size)
  2389. {
  2390. CodecInst * pCodecInst;
  2391. EncInfo * pEncInfo;
  2392. PhysicalAddress wrPtr;
  2393. PhysicalAddress rdPtr;
  2394. RetCode ret;
  2395. int room = 0;
  2396. ret = CheckEncInstanceValidity(handle);
  2397. if (ret != RETCODE_SUCCESS){
  2398. VLOG(INFO,"%s %d ret %d\n",__func__,__LINE__,ret);
  2399. return ret;
  2400. }
  2401. pCodecInst = handle;
  2402. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2403. rdPtr = pEncInfo->streamRdPtr;
  2404. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2405. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2406. else
  2407. wrPtr = pEncInfo->streamWrPtr;
  2408. if ( rdPtr < wrPtr ) {
  2409. if ( rdPtr + size > wrPtr ) {
  2410. VLOG(INFO,"%s %d rdPtr 0x%x,size 0x%x,wrPtr 0x%x\n",__func__,__LINE__,rdPtr,size,wrPtr);
  2411. return RETCODE_INVALID_PARAM;
  2412. }
  2413. }
  2414. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId)) {
  2415. //************** for CODA *********************/
  2416. if (pEncInfo->ringBufferEnable == TRUE || pEncInfo->lineBufIntEn == TRUE) {
  2417. rdPtr += size;
  2418. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2419. if (pEncInfo->lineBufIntEn == TRUE) {
  2420. VLOG(INFO,"%s %d rdPtr 0x%x pEncInfo->streamBufEndAddr 0x%x\n",__func__,__LINE__,rdPtr,pEncInfo->streamBufEndAddr);
  2421. return RETCODE_INVALID_PARAM;
  2422. }
  2423. room = rdPtr - pEncInfo->streamBufEndAddr;
  2424. rdPtr = pEncInfo->streamBufStartAddr;
  2425. rdPtr += room;
  2426. }
  2427. if (rdPtr == pEncInfo->streamBufEndAddr)
  2428. rdPtr = pEncInfo->streamBufStartAddr;
  2429. }
  2430. else {
  2431. rdPtr = pEncInfo->streamBufStartAddr;
  2432. }
  2433. }
  2434. else {
  2435. //************** for WAVE5 *********************/
  2436. if (size > 0) {
  2437. if (pEncInfo->ringBufferEnable == TRUE) {
  2438. rdPtr += size;
  2439. if (pEncInfo->ringBufferWrapEnable == TRUE) {
  2440. //======== [case1]. ring=1 & wrap=1 ===================
  2441. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2442. if (pEncInfo->lineBufIntEn == TRUE) {
  2443. VLOG(INFO,"%s %d rdPtr 0x%x pEncInfo->streamBufEndAddr 0x%x\n",__func__,__LINE__,rdPtr,pEncInfo->streamBufEndAddr);
  2444. return RETCODE_INVALID_PARAM;
  2445. }
  2446. room = rdPtr - pEncInfo->streamBufEndAddr;
  2447. rdPtr = pEncInfo->streamBufStartAddr;
  2448. rdPtr += room;
  2449. }
  2450. pEncInfo->streamRdPtr = rdPtr;
  2451. EnterLock(pCodecInst->coreIdx);
  2452. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2453. LeaveLock(pCodecInst->coreIdx);
  2454. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2455. //set EndAddr to FW and set StartAddr to API
  2456. rdPtr = pEncInfo->streamBufStartAddr; // wrap-around
  2457. }
  2458. }
  2459. else {
  2460. //========= [case2]. ring=1 & wrap=0 ===================
  2461. pEncInfo->streamRdPtr = rdPtr;
  2462. EnterLock(pCodecInst->coreIdx);
  2463. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2464. LeaveLock(pCodecInst->coreIdx);
  2465. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2466. //set EndAddr to FW and set StartAddr to API
  2467. rdPtr = pEncInfo->streamBufStartAddr; // start? end? [FIX ME]
  2468. }
  2469. }
  2470. }
  2471. else {
  2472. //========= [case3]. Line buffer mode ===================
  2473. if (VPU_ALIGN16(wrPtr) >= pEncInfo->streamRdPtr + pEncInfo->streamBufSize) { // linebuffer full detected. already host read whole bistream in bitstreamBuffer.
  2474. EnterLock(pCodecInst->coreIdx);
  2475. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2476. LeaveLock(pCodecInst->coreIdx);
  2477. }
  2478. }
  2479. }
  2480. else {
  2481. //************ update new CPB buffer addr/size ***************/
  2482. if (size == UPDATE_NEW_BS_BUF) {
  2483. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2484. pEncInfo->streamBufTobeReadStartAddr = pEncInfo->streamBufStartAddr;
  2485. pEncInfo->streamBufTobeReadSize = pEncInfo->streamBufSize;
  2486. pEncInfo->streamBufTobeReadEndAddr = pEncInfo->streamBufStartAddr + pEncInfo->streamBufSize;
  2487. EnterLock(pCodecInst->coreIdx);
  2488. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2489. LeaveLock(pCodecInst->coreIdx);
  2490. rdPtr = pEncInfo->streamBufStartAddr;
  2491. }
  2492. }
  2493. }
  2494. pEncInfo->streamRdPtr = rdPtr;
  2495. pEncInfo->streamWrPtr = wrPtr;
  2496. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2497. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, rdPtr);
  2498. if (pEncInfo->ringBufferEnable == FALSE && pEncInfo->lineBufIntEn == TRUE) {
  2499. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2500. }
  2501. return RETCODE_SUCCESS;
  2502. }
  2503. RetCode VPU_EncStartOneFrame(
  2504. EncHandle handle,
  2505. EncParam * param
  2506. )
  2507. {
  2508. CodecInst* pCodecInst;
  2509. EncInfo* pEncInfo;
  2510. RetCode ret;
  2511. VpuAttr* pAttr = NULL;
  2512. vpu_instance_pool_t* vip;
  2513. ret = CheckEncInstanceValidity(handle);
  2514. if (ret != RETCODE_SUCCESS)
  2515. return ret;
  2516. pCodecInst = handle;
  2517. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2518. vip = (vpu_instance_pool_t *)vdi_get_instance_pool(pCodecInst->coreIdx);
  2519. if (!vip) {
  2520. return RETCODE_INVALID_HANDLE;
  2521. }
  2522. if (pEncInfo->stride == 0) { // This means frame buffers have not been registered.
  2523. return RETCODE_WRONG_CALL_SEQUENCE;
  2524. }
  2525. ret = CheckEncParam(handle, param);
  2526. if (ret != RETCODE_SUCCESS) {
  2527. return ret;
  2528. }
  2529. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2530. EnterLock(pCodecInst->coreIdx);
  2531. pEncInfo->ptsMap[param->srcIdx] = (pEncInfo->openParam.enablePTS == TRUE) ? GetTimestamp(handle) : param->pts;
  2532. if (GetPendingInst(pCodecInst->coreIdx)) {
  2533. LeaveLock(pCodecInst->coreIdx);
  2534. return RETCODE_FRAME_NOT_COMPLETE;
  2535. }
  2536. ret = ProductVpuEncode(pCodecInst, param);
  2537. if (pAttr->supportCommandQueue == TRUE) {
  2538. SetPendingInst(pCodecInst->coreIdx, NULL);
  2539. LeaveLock(pCodecInst->coreIdx);
  2540. }
  2541. else {
  2542. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2543. }
  2544. return ret;
  2545. }
  2546. RetCode VPU_EncGetOutputInfo(
  2547. EncHandle handle,
  2548. EncOutputInfo* info
  2549. )
  2550. {
  2551. CodecInst* pCodecInst;
  2552. EncInfo* pEncInfo;
  2553. RetCode ret;
  2554. VpuAttr* pAttr;
  2555. ret = CheckEncInstanceValidity(handle);
  2556. if (ret != RETCODE_SUCCESS) {
  2557. return ret;
  2558. }
  2559. if (info == 0) {
  2560. return RETCODE_INVALID_PARAM;
  2561. }
  2562. pCodecInst = handle;
  2563. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2564. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2565. if (pAttr->supportCommandQueue == TRUE) {
  2566. EnterLock(pCodecInst->coreIdx);
  2567. }
  2568. else {
  2569. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  2570. SetPendingInst(pCodecInst->coreIdx, 0);
  2571. LeaveLock(pCodecInst->coreIdx);
  2572. return RETCODE_WRONG_CALL_SEQUENCE;
  2573. }
  2574. }
  2575. ret = ProductVpuEncGetResult(pCodecInst, info);
  2576. if (ret == RETCODE_SUCCESS) {
  2577. if (info->encSrcIdx >= 0 && info->reconFrameIndex >= 0 )
  2578. info->pts = pEncInfo->ptsMap[info->encSrcIdx];
  2579. }
  2580. else {
  2581. info->pts = 0LL;
  2582. }
  2583. SetPendingInst(pCodecInst->coreIdx, 0);
  2584. LeaveLock(pCodecInst->coreIdx);
  2585. return ret;
  2586. }
  2587. RetCode VPU_EncGiveCommand(
  2588. EncHandle handle,
  2589. CodecCommand cmd,
  2590. void* param
  2591. )
  2592. {
  2593. CodecInst* pCodecInst;
  2594. EncInfo* pEncInfo;
  2595. RetCode ret;
  2596. ret = CheckEncInstanceValidity(handle);
  2597. if (ret != RETCODE_SUCCESS) {
  2598. return ret;
  2599. }
  2600. pCodecInst = handle;
  2601. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2602. switch (cmd)
  2603. {
  2604. case ENABLE_ROTATION :
  2605. {
  2606. pEncInfo->rotationEnable = 1;
  2607. }
  2608. break;
  2609. case DISABLE_ROTATION :
  2610. {
  2611. pEncInfo->rotationEnable = 0;
  2612. }
  2613. break;
  2614. case ENABLE_MIRRORING :
  2615. {
  2616. pEncInfo->mirrorEnable = 1;
  2617. }
  2618. break;
  2619. case DISABLE_MIRRORING :
  2620. {
  2621. pEncInfo->mirrorEnable = 0;
  2622. }
  2623. break;
  2624. case SET_MIRROR_DIRECTION :
  2625. {
  2626. MirrorDirection mirDir;
  2627. if (param == 0) {
  2628. return RETCODE_INVALID_PARAM;
  2629. }
  2630. mirDir = *(MirrorDirection *)param;
  2631. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  2632. return RETCODE_INVALID_PARAM;
  2633. }
  2634. pEncInfo->mirrorDirection = mirDir;
  2635. }
  2636. break;
  2637. case SET_ROTATION_ANGLE :
  2638. {
  2639. int angle;
  2640. if (param == 0) {
  2641. return RETCODE_INVALID_PARAM;
  2642. }
  2643. angle = *(int *)param;
  2644. if (angle != 0 && angle != 90 &&
  2645. angle != 180 && angle != 270) {
  2646. return RETCODE_INVALID_PARAM;
  2647. }
  2648. if (pEncInfo->initialInfoObtained && (angle == 90 || angle ==270)) {
  2649. return RETCODE_INVALID_PARAM;
  2650. }
  2651. pEncInfo->rotationAngle = angle;
  2652. }
  2653. break;
  2654. case SET_CACHE_CONFIG:
  2655. {
  2656. MaverickCacheConfig *mcCacheConfig;
  2657. if (param == 0) {
  2658. return RETCODE_INVALID_PARAM;
  2659. }
  2660. mcCacheConfig = (MaverickCacheConfig *)param;
  2661. pEncInfo->cacheConfig = *mcCacheConfig;
  2662. }
  2663. break;
  2664. case ENC_PUT_VIDEO_HEADER:
  2665. {
  2666. EncHeaderParam *encHeaderParam;
  2667. if (param == 0) {
  2668. return RETCODE_INVALID_PARAM;
  2669. }
  2670. encHeaderParam = (EncHeaderParam *)param;
  2671. if (pCodecInst->codecMode == MP4_ENC ) {
  2672. if (!( VOL_HEADER<=encHeaderParam->headerType && encHeaderParam->headerType <= VIS_HEADER)) {
  2673. return RETCODE_INVALID_PARAM;
  2674. }
  2675. }
  2676. else if (pCodecInst->codecMode == AVC_ENC) {
  2677. if (!( SPS_RBSP<=encHeaderParam->headerType && encHeaderParam->headerType <= PPS_RBSP_MVC)) {
  2678. return RETCODE_INVALID_PARAM;
  2679. }
  2680. }
  2681. else if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2682. if (!( CODEOPT_ENC_VPS<=encHeaderParam->headerType && encHeaderParam->headerType <= (CODEOPT_ENC_VPS|CODEOPT_ENC_SPS|CODEOPT_ENC_PPS))) {
  2683. return RETCODE_INVALID_PARAM;
  2684. }
  2685. if (pEncInfo->ringBufferEnable == 0 ) {
  2686. if (encHeaderParam->buf % 16 || encHeaderParam->size == 0)
  2687. return RETCODE_INVALID_PARAM;
  2688. }
  2689. if (encHeaderParam->headerType & CODEOPT_ENC_VCL) // ENC_PUT_VIDEO_HEADER encode only non-vcl header.
  2690. return RETCODE_INVALID_PARAM;
  2691. }
  2692. else
  2693. return RETCODE_INVALID_PARAM;
  2694. if (pEncInfo->ringBufferEnable == 0 ) {
  2695. if (encHeaderParam->buf % 8 || encHeaderParam->size == 0) {
  2696. return RETCODE_INVALID_PARAM;
  2697. }
  2698. }
  2699. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2700. if (handle->productId == PRODUCT_ID_521)
  2701. return Wave5VpuEncGetHeader(handle, encHeaderParam);
  2702. else
  2703. return RETCODE_INVALID_PARAM;
  2704. }
  2705. else {
  2706. return GetEncHeader(handle, encHeaderParam);
  2707. }
  2708. }
  2709. case ENC_SET_PARAM:
  2710. {
  2711. if (param == 0) {
  2712. return RETCODE_INVALID_PARAM;
  2713. }
  2714. pEncInfo->openParam = *(EncOpenParam *)param;
  2715. if (pCodecInst->codecMode != AVC_ENC)
  2716. return RETCODE_INVALID_COMMAND;
  2717. ret = EncParaSet(handle, SPS_RBSP);
  2718. if (ret != RETCODE_SUCCESS)
  2719. return ret;
  2720. ret = EncParaSet(handle, PPS_RBSP);
  2721. if (ret != RETCODE_SUCCESS)
  2722. return ret;
  2723. return ret;
  2724. }
  2725. case ENC_SET_GOP_NUMBER:
  2726. {
  2727. int *pGopNumber =(int *)param;
  2728. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2729. return RETCODE_INVALID_COMMAND;
  2730. }
  2731. if (*pGopNumber < 0)
  2732. return RETCODE_INVALID_PARAM;
  2733. pEncInfo->openParam.gopSize = *pGopNumber;
  2734. SetGopNumber(handle, (Uint32 *)pGopNumber);
  2735. }
  2736. break;
  2737. case ENC_SET_INTRA_QP:
  2738. {
  2739. int *pIntraQp =(int *)param;
  2740. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2741. return RETCODE_INVALID_COMMAND;
  2742. }
  2743. if (pCodecInst->codecMode == MP4_ENC)
  2744. {
  2745. if(*pIntraQp<1 || *pIntraQp>31)
  2746. return RETCODE_INVALID_PARAM;
  2747. }
  2748. if (pCodecInst->codecMode == AVC_ENC)
  2749. {
  2750. if(*pIntraQp<0 || *pIntraQp>51)
  2751. return RETCODE_INVALID_PARAM;
  2752. }
  2753. SetIntraQp(handle, (Uint32 *)pIntraQp);
  2754. }
  2755. break;
  2756. case ENC_SET_BITRATE:
  2757. {
  2758. int *pBitrate = (int *)param;
  2759. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2760. return RETCODE_INVALID_COMMAND;
  2761. }
  2762. {
  2763. if (*pBitrate < 0 || *pBitrate> 32767) {
  2764. return RETCODE_INVALID_PARAM;
  2765. }
  2766. }
  2767. SetBitrate(handle, (Uint32 *)pBitrate);
  2768. }
  2769. break;
  2770. case ENC_SET_FRAME_RATE:
  2771. {
  2772. int *pFramerate = (int *)param;
  2773. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2774. return RETCODE_INVALID_COMMAND;
  2775. }
  2776. if (*pFramerate <= 0) {
  2777. return RETCODE_INVALID_PARAM;
  2778. }
  2779. SetFramerate(handle, (Uint32 *)pFramerate);
  2780. }
  2781. break;
  2782. case ENC_SET_INTRA_MB_REFRESH_NUMBER:
  2783. {
  2784. int *pIntraRefreshNum =(int *)param;
  2785. SetIntraRefreshNum(handle, (Uint32 *)pIntraRefreshNum);
  2786. }
  2787. break;
  2788. case ENC_SET_SLICE_INFO:
  2789. {
  2790. EncSliceMode *pSliceMode = (EncSliceMode *)param;
  2791. if(pSliceMode->sliceMode<0 || pSliceMode->sliceMode>1)
  2792. {
  2793. return RETCODE_INVALID_PARAM;
  2794. }
  2795. if(pSliceMode->sliceSizeMode<0 || pSliceMode->sliceSizeMode>1)
  2796. {
  2797. return RETCODE_INVALID_PARAM;
  2798. }
  2799. SetSliceMode(handle, (EncSliceMode *)pSliceMode);
  2800. }
  2801. break;
  2802. case ENC_ENABLE_HEC:
  2803. {
  2804. if (pCodecInst->codecMode != MP4_ENC) {
  2805. return RETCODE_INVALID_COMMAND;
  2806. }
  2807. SetHecMode(handle, 1);
  2808. }
  2809. break;
  2810. case ENC_DISABLE_HEC:
  2811. {
  2812. if (pCodecInst->codecMode != MP4_ENC) {
  2813. return RETCODE_INVALID_COMMAND;
  2814. }
  2815. SetHecMode(handle, 0);
  2816. }
  2817. break;
  2818. case SET_SEC_AXI:
  2819. {
  2820. SecAxiUse secAxiUse;
  2821. if (param == 0) {
  2822. return RETCODE_INVALID_PARAM;
  2823. }
  2824. secAxiUse = *(SecAxiUse *)param;
  2825. if (handle->productId == PRODUCT_ID_521) {
  2826. pEncInfo->secAxiInfo.u.wave.useEncRdoEnable = secAxiUse.u.wave.useEncRdoEnable;
  2827. pEncInfo->secAxiInfo.u.wave.useEncLfEnable = secAxiUse.u.wave.useEncLfEnable;
  2828. }
  2829. else { // coda9 or coda7q or ...
  2830. pEncInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  2831. pEncInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  2832. pEncInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  2833. pEncInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  2834. pEncInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  2835. pEncInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  2836. }
  2837. }
  2838. break;
  2839. case GET_TILEDMAP_CONFIG:
  2840. {
  2841. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  2842. if (!pMapCfg) {
  2843. return RETCODE_INVALID_PARAM;
  2844. }
  2845. *pMapCfg = pEncInfo->mapCfg;
  2846. break;
  2847. }
  2848. case SET_DRAM_CONFIG:
  2849. {
  2850. DRAMConfig *cfg = (DRAMConfig *)param;
  2851. if (!cfg) {
  2852. return RETCODE_INVALID_PARAM;
  2853. }
  2854. pEncInfo->dramCfg = *cfg;
  2855. break;
  2856. }
  2857. case GET_DRAM_CONFIG:
  2858. {
  2859. DRAMConfig *cfg = (DRAMConfig *)param;
  2860. if (!cfg) {
  2861. return RETCODE_INVALID_PARAM;
  2862. }
  2863. *cfg = pEncInfo->dramCfg;
  2864. break;
  2865. }
  2866. case ENABLE_LOGGING:
  2867. {
  2868. pCodecInst->loggingEnable = 1;
  2869. }
  2870. break;
  2871. case DISABLE_LOGGING:
  2872. {
  2873. pCodecInst->loggingEnable = 0;
  2874. }
  2875. break;
  2876. case ENC_SET_PARA_CHANGE:
  2877. {
  2878. EncChangeParam* option = (EncChangeParam*)param;
  2879. if (handle->productId == PRODUCT_ID_521)
  2880. return Wave5VpuEncParaChange(handle, option);
  2881. else
  2882. return RETCODE_INVALID_PARAM;
  2883. }
  2884. case GET_BANDWIDTH_REPORT :
  2885. return ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2886. case ENC_GET_QUEUE_STATUS:
  2887. {
  2888. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  2889. queueInfo->instanceQueueCount = pEncInfo->instanceQueueCount;
  2890. queueInfo->reportQueueCount = pEncInfo->reportQueueCount;
  2891. break;
  2892. }
  2893. case ENC_WRPTR_SEL:
  2894. {
  2895. pEncInfo->encWrPtrSel = *(int *)param;
  2896. }
  2897. break;
  2898. case SET_CYCLE_PER_TICK:
  2899. {
  2900. pEncInfo->cyclePerTick = *(Uint32 *)param;
  2901. }
  2902. break;
  2903. case ENC_GET_SRC_BUF_FLAG:
  2904. return ProductVpuGetSrcBufFlag(pCodecInst, (Uint32*)param);
  2905. case GET_DEBUG_INFORM:
  2906. return ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2907. #ifdef SUPPORT_LOOK_AHEAD_RC
  2908. case ENC_SET_LARC_DATA:
  2909. {
  2910. EncLarcInfo* larcInfo = (EncLarcInfo*)param;
  2911. if (handle->productId == PRODUCT_ID_521)
  2912. return Wave5VpuEncSetLarcData(handle, *larcInfo);
  2913. else
  2914. return RETCODE_INVALID_PARAM;
  2915. }
  2916. break;
  2917. #endif
  2918. default:
  2919. return RETCODE_INVALID_COMMAND;
  2920. }
  2921. return RETCODE_SUCCESS;
  2922. }
  2923. RetCode VPU_EncAllocateFrameBuffer(EncHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2924. {
  2925. CodecInst* pCodecInst;
  2926. EncInfo* pEncInfo;
  2927. RetCode ret;
  2928. int gdiIndex;
  2929. ret = CheckEncInstanceValidity(handle);
  2930. if (ret != RETCODE_SUCCESS)
  2931. return ret;
  2932. pCodecInst = handle;
  2933. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2934. if (!frameBuffer) {
  2935. return RETCODE_INVALID_PARAM;
  2936. }
  2937. if (info.num == 0 || info.num < 0) {
  2938. return RETCODE_INVALID_PARAM;
  2939. }
  2940. if (info.stride == 0 || info.stride < 0) {
  2941. return RETCODE_INVALID_PARAM;
  2942. }
  2943. if (info.height == 0 || info.height < 0) {
  2944. return RETCODE_INVALID_PARAM;
  2945. }
  2946. if (info.type == FB_TYPE_PPU) {
  2947. if (pEncInfo->numFrameBuffers == 0) {
  2948. return RETCODE_WRONG_CALL_SEQUENCE;
  2949. }
  2950. pEncInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2951. gdiIndex = pEncInfo->numFrameBuffers;
  2952. ret = ProductVpuAllocateFramebuffer(pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2953. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21,
  2954. info.endian, &pEncInfo->vbPPU, gdiIndex, (FramebufferAllocType)info.type);
  2955. }
  2956. else if (info.type == FB_TYPE_CODEC) {
  2957. gdiIndex = 0;
  2958. pEncInfo->frameAllocExt = frameBuffer[0].updateFbInfo;
  2959. ret = ProductVpuAllocateFramebuffer(
  2960. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2961. info.stride, info.height, info.format, info.cbcrInterleave, FALSE, info.endian, &pEncInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2962. }
  2963. else {
  2964. ret = RETCODE_INVALID_PARAM;
  2965. }
  2966. return ret;
  2967. }
  2968. RetCode VPU_EncIssueSeqInit(EncHandle handle)
  2969. {
  2970. CodecInst* pCodecInst;
  2971. RetCode ret;
  2972. VpuAttr* pAttr;
  2973. ret = CheckEncInstanceValidity(handle);
  2974. if (ret != RETCODE_SUCCESS)
  2975. return ret;
  2976. pCodecInst = handle;
  2977. EnterLock(pCodecInst->coreIdx);
  2978. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2979. if (GetPendingInst(pCodecInst->coreIdx)) {
  2980. LeaveLock(pCodecInst->coreIdx);
  2981. return RETCODE_FRAME_NOT_COMPLETE;
  2982. }
  2983. ret = ProductVpuEncInitSeq(handle);
  2984. if (ret == RETCODE_SUCCESS) {
  2985. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2986. }
  2987. if (pAttr->supportCommandQueue == TRUE) {
  2988. SetPendingInst(pCodecInst->coreIdx, NULL);
  2989. LeaveLock(pCodecInst->coreIdx);
  2990. }
  2991. return ret;
  2992. }
  2993. RetCode VPU_EncCompleteSeqInit(EncHandle handle, EncInitialInfo * info)
  2994. {
  2995. CodecInst* pCodecInst;
  2996. EncInfo* pEncInfo;
  2997. RetCode ret;
  2998. VpuAttr* pAttr;
  2999. ret = CheckEncInstanceValidity(handle);
  3000. if (ret != RETCODE_SUCCESS) {
  3001. return ret;
  3002. }
  3003. if (info == 0) {
  3004. return RETCODE_INVALID_PARAM;
  3005. }
  3006. pCodecInst = handle;
  3007. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  3008. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  3009. if (pAttr->supportCommandQueue == TRUE) {
  3010. EnterLock(pCodecInst->coreIdx);
  3011. }
  3012. else {
  3013. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  3014. SetPendingInst(pCodecInst->coreIdx, 0);
  3015. LeaveLock(pCodecInst->coreIdx);
  3016. return RETCODE_WRONG_CALL_SEQUENCE;
  3017. }
  3018. }
  3019. ret = ProductVpuEncGetSeqInfo(handle, info);
  3020. if (ret == RETCODE_SUCCESS) {
  3021. pEncInfo->initialInfoObtained = 1;
  3022. }
  3023. //info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr);
  3024. //info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  3025. //pEncInfo->prevFrameEndPos = info->rdPtr;
  3026. pEncInfo->initialInfo = *info;
  3027. SetPendingInst(pCodecInst->coreIdx, NULL);
  3028. LeaveLock(pCodecInst->coreIdx);
  3029. return ret;
  3030. }