vdi.c 45 KB

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  1. /*
  2. * Copyright (c) 2019, Chips&Media
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice, this
  9. * list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright notice,
  11. * this list of conditions and the following disclaimer in the documentation
  12. * and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  16. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
  18. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  19. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  20. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  21. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  23. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. */
  25. #if defined(linux) || defined(__linux) || defined(ANDROID)
  26. #include <ctype.h>
  27. #include <stdio.h>
  28. #include <stdlib.h>
  29. #include <string.h>
  30. #include <unistd.h>
  31. #ifdef _KERNEL_
  32. #include <linux/delay.h>
  33. #endif
  34. #include <signal.h> /* SIGIO */
  35. #include <fcntl.h> /* fcntl */
  36. #include <pthread.h>
  37. #include <sys/mman.h> /* mmap */
  38. #include <sys/ioctl.h> /* fopen/fread */
  39. #include <sys/errno.h> /* fopen/fread */
  40. #include <sys/types.h>
  41. #include <sys/time.h>
  42. #include "driver/vpu.h"
  43. #include "../vdi.h"
  44. #include "../vdi_osal.h"
  45. #include "coda9/coda9_regdefine.h"
  46. #include "wave/wave5_regdefine.h"
  47. #include "main_helper.h"
  48. #include "misc/debug.h"
  49. #define VPU_DEVICE_NAME "/dev/venc"
  50. typedef pthread_mutex_t MUTEX_HANDLE;
  51. # define SUPPORT_INTERRUPT
  52. # define VDI_SRAM_BASE_ADDR 0x00000000 // if we can know the sram address in SOC directly for vdi layer. it is possible to set in vdi layer without allocation from driver
  53. #define VDI_SYSTEM_ENDIAN VDI_LITTLE_ENDIAN
  54. #define VDI_128BIT_BUS_SYSTEM_ENDIAN VDI_128BIT_LITTLE_ENDIAN
  55. #define VPU_BIT_REG_SIZE (0x4000*MAX_NUM_VPU_CORE)
  56. #define VDI_CODA9_SRAM_SIZE 0x34600 // FHD MAX size, 0x17D00 4K MAX size 0x34600
  57. #define VDI_WAVE511_SRAM_SIZE 0x2D000 /* H.265 Main10 : 8Kx4K -> 184320, 4Kx2K -> 92160
  58. * H.265 Main : 8Kx4K -> 155648, 4Kx2K -> 77824
  59. */
  60. #define VDI_WAVE521_SRAM_SIZE 0x20400 /* 10bit profile : 8Kx8K -> 132096, 4Kx2K -> 66560
  61. * 8bit profile : 8Kx8K -> 99328, 4Kx2K -> 51176
  62. */
  63. #define VDI_WAVE521C_SRAM_SIZE 0x2D000 /* H.265 Main10 : 8Kx4K -> 184320, 4Kx2K -> 92160
  64. * H.265 Main : 8Kx4K -> 155648, 4Kx2K -> 77824
  65. * NOTE: Decoder > Encoder
  66. */
  67. #define VDI_NUM_LOCK_HANDLES 4
  68. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  69. #define VPU_CORE_BASE_OFFSET 0x4000
  70. #endif
  71. typedef struct vpudrv_buffer_pool_t
  72. {
  73. vpudrv_buffer_t vdb;
  74. int inuse;
  75. } vpudrv_buffer_pool_t;
  76. typedef struct {
  77. unsigned long core_idx;
  78. unsigned int product_code;
  79. int vpu_fd;
  80. vpu_instance_pool_t *pvip;
  81. int task_num;
  82. int clock_state;
  83. vpudrv_buffer_t vdb_register;
  84. vpu_buffer_t vpu_common_memory;
  85. vpudrv_buffer_pool_t vpu_buffer_pool[MAX_VPU_BUFFER_POOL];
  86. int vpu_buffer_pool_count;
  87. void* vpu_mutex;
  88. void* vpu_omx_mutex;
  89. void* vpu_disp_mutex;
  90. void* vmem_mutex;
  91. } vdi_info_t;
  92. static vdi_info_t s_vdi_info[MAX_NUM_VPU_CORE];
  93. static int swap_endian(unsigned long core_idx, unsigned char *data, int len, int endian);
  94. void vdi_flush_ddr(unsigned long core_idx,unsigned long start,unsigned long size,unsigned char flag)
  95. {
  96. vdi_info_t *vdi;
  97. vpudrv_flush_cache_t cache_info;
  98. vdi = &s_vdi_info[core_idx];
  99. cache_info.start = start;
  100. cache_info.size = size;
  101. cache_info.flag = flag;
  102. ioctl(vdi->vpu_fd, VDI_IOCTL_FLUSH_DCACHE, &cache_info);
  103. }
  104. static void restore_mutex_in_dead(MUTEX_HANDLE *mutex)
  105. {
  106. int mutex_value;
  107. if (!mutex)
  108. return;
  109. #if defined(ANDROID)
  110. mutex_value = mutex->value;
  111. #else
  112. memcpy(&mutex_value, mutex, sizeof(mutex_value));
  113. #endif
  114. if (mutex_value == (int)0xdead10cc) // destroy by device driver
  115. {
  116. pthread_mutexattr_t mutexattr;
  117. pthread_mutexattr_init(&mutexattr);
  118. pthread_mutexattr_setpshared(&mutexattr, PTHREAD_PROCESS_SHARED);
  119. pthread_mutex_init(mutex, &mutexattr);
  120. }
  121. }
  122. static void vmem_lock(vdi_info_t* vdi)
  123. {
  124. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  125. #else
  126. const int MUTEX_TIMEOUT = 0x7fffffff;
  127. #endif
  128. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  129. restore_mutex_in_dead((MUTEX_HANDLE *)vdi->vmem_mutex);
  130. pthread_mutex_lock((MUTEX_HANDLE*)vdi->vmem_mutex);
  131. #else
  132. if (pthread_mutex_lock((MUTEX_HANDLE *)vdi->vmem_mutex) != 0) {
  133. VLOG(ERR, "%s:%d failed to pthread_mutex_locK\n", __FUNCTION__, __LINE__);
  134. }
  135. #endif
  136. return; //lint !e454
  137. }
  138. static void vmem_unlock(vdi_info_t* vdi)
  139. {
  140. pthread_mutex_unlock((MUTEX_HANDLE *)vdi->vmem_mutex);//lint !e455
  141. }
  142. int vdi_probe(unsigned long core_idx)
  143. {
  144. int ret;
  145. ret = vdi_init(core_idx);
  146. vdi_release(core_idx);
  147. return ret;
  148. }
  149. int vdi_init(unsigned long core_idx)
  150. {
  151. vdi_info_t *vdi;
  152. int i;
  153. if (core_idx >= MAX_NUM_VPU_CORE)
  154. return 0;
  155. vdi = &s_vdi_info[core_idx];
  156. if (vdi->vpu_fd != -1 && vdi->vpu_fd != 0x00)
  157. {
  158. vdi->task_num++;
  159. return 0;
  160. }
  161. vdi->vpu_fd = open(VPU_DEVICE_NAME, O_RDWR); // if this API supports VPU parallel processing using multi VPU. the driver should be made to open multiple times.
  162. if (vdi->vpu_fd < 0) {
  163. VLOG(ERR, "[VDI] Can't open vpu driver. [error=%s]. try to run vdi/linux/driver/load.sh script \n", strerror(errno));
  164. return -1;
  165. }
  166. memset(vdi->vpu_buffer_pool, 0x00, sizeof(vpudrv_buffer_pool_t)*MAX_VPU_BUFFER_POOL);
  167. if (!vdi_get_instance_pool(core_idx))
  168. {
  169. VLOG(INFO, "[VDI] fail to create shared info for saving context \n");
  170. goto ERR_VDI_INIT;
  171. }
  172. if (vdi->pvip->instance_pool_inited == FALSE)
  173. {
  174. int* pCodecInst;
  175. pthread_mutexattr_t mutexattr;
  176. pthread_mutexattr_init(&mutexattr);
  177. pthread_mutexattr_setpshared(&mutexattr, PTHREAD_PROCESS_SHARED);
  178. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  179. #else
  180. /* If a process or a thread is terminated abnormally,
  181. * pthread_mutexattr_setrobust_np(attr, PTHREAD_MUTEX_ROBUST_NP) makes
  182. * next onwer call pthread_mutex_lock() without deadlock.
  183. */
  184. pthread_mutexattr_setrobust_np(&mutexattr, PTHREAD_MUTEX_ROBUST_NP);
  185. #endif
  186. pthread_mutex_init((MUTEX_HANDLE *)vdi->vpu_mutex, &mutexattr);
  187. pthread_mutex_init((MUTEX_HANDLE *)vdi->vpu_disp_mutex, &mutexattr);
  188. pthread_mutex_init((MUTEX_HANDLE *)vdi->vmem_mutex, &mutexattr);
  189. for( i = 0; i < MAX_NUM_INSTANCE; i++) {
  190. pCodecInst = (int *)vdi->pvip->codecInstPool[i];
  191. pCodecInst[1] = i; // indicate instIndex of CodecInst
  192. pCodecInst[0] = 0; // indicate inUse of CodecInst
  193. }
  194. vdi->pvip->instance_pool_inited = TRUE;
  195. }
  196. #ifdef USE_VMALLOC_FOR_INSTANCE_POOL_MEMORY
  197. if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_REGISTER_INFO, &vdi->vdb_register) < 0)
  198. {
  199. VLOG(ERR, "[VDI] fail to get host interface register\n");
  200. goto ERR_VDI_INIT;
  201. }
  202. #endif
  203. #ifdef USE_VMALLOC_FOR_INSTANCE_POOL_MEMORY
  204. vdi->vdb_register.virt_addr = (unsigned long)mmap(NULL, vdi->vdb_register.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, vdi->vdb_register.phys_addr);
  205. #else
  206. vdi->vdb_register.size = VPU_BIT_REG_SIZE;
  207. vdi->vdb_register.virt_addr = (unsigned long)mmap(NULL, vdi->vdb_register.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, 0);
  208. #endif
  209. if ((void *)vdi->vdb_register.virt_addr == MAP_FAILED)
  210. {
  211. VLOG(ERR, "[VDI] fail to map vpu registers \n");
  212. goto ERR_VDI_INIT;
  213. }
  214. VLOG(INFO, "[VDI] map vdb_register core_idx=%d, virtaddr=0x%lx, size=%d\n", core_idx, vdi->vdb_register.virt_addr, vdi->vdb_register.size);
  215. if (vdi_lock(core_idx) < 0)
  216. {
  217. VLOG(ERR, "[VDI] fail to handle lock function\n");
  218. goto ERR_VDI_INIT;
  219. }
  220. vdi_set_clock_gate(core_idx, 1);
  221. vdi->product_code = vdi_read_register(core_idx, VPU_PRODUCT_CODE_REGISTER);
  222. if (vdi_allocate_common_memory(core_idx) < 0)
  223. {
  224. VLOG(ERR, "[VDI] fail to get vpu common buffer from driver\n");
  225. goto ERR_VDI_INIT;
  226. }
  227. vdi->core_idx = core_idx;
  228. vdi->task_num++;
  229. vdi_set_clock_gate(core_idx, 0);
  230. vdi_unlock(core_idx);
  231. VLOG(INFO, "[VDI] success to init driver \n");
  232. return 0;
  233. ERR_VDI_INIT:
  234. vdi_unlock(core_idx);
  235. vdi_release(core_idx);
  236. return -1;
  237. }
  238. int vdi_set_bit_firmware_to_pm(unsigned long core_idx, const unsigned short *code)
  239. {
  240. int i;
  241. vpu_bit_firmware_info_t bit_firmware_info;
  242. vdi_info_t *vdi;
  243. if (core_idx >= MAX_NUM_VPU_CORE)
  244. return 0;
  245. vdi = &s_vdi_info[core_idx];
  246. if (!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  247. return 0;
  248. bit_firmware_info.size = sizeof(vpu_bit_firmware_info_t);
  249. bit_firmware_info.core_idx = core_idx;
  250. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  251. bit_firmware_info.reg_base_offset = (core_idx*VPU_CORE_BASE_OFFSET);
  252. #else
  253. bit_firmware_info.reg_base_offset = 0;
  254. #endif
  255. for (i=0; i<512; i++)
  256. bit_firmware_info.bit_code[i] = code[i];
  257. if (write(vdi->vpu_fd, &bit_firmware_info, bit_firmware_info.size) < 0)
  258. {
  259. VLOG(ERR, "[VDI] fail to vdi_set_bit_firmware core=%d\n", bit_firmware_info.core_idx);
  260. return -1;
  261. }
  262. return 0;
  263. }
  264. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  265. int vdi_get_task_num(unsigned long core_idx)
  266. {
  267. vdi_info_t *vdi;
  268. vdi = &s_vdi_info[core_idx];
  269. if (!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  270. return -1;
  271. return vdi->task_num;
  272. }
  273. #endif
  274. int vdi_release(unsigned long core_idx)
  275. {
  276. int i;
  277. vpudrv_buffer_t vdb;
  278. vdi_info_t *vdi;
  279. if (core_idx >= MAX_NUM_VPU_CORE)
  280. return 0;
  281. vdi = &s_vdi_info[core_idx];
  282. if (!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  283. return 0;
  284. if (vdi_lock(core_idx) < 0)
  285. {
  286. VLOG(ERR, "[VDI] fail to handle lock function\n");
  287. return -1;
  288. }
  289. if (vdi->task_num > 1) // means that the opened instance remains
  290. {
  291. vdi->task_num--;
  292. vdi_unlock(core_idx);
  293. return 0;
  294. }
  295. if (vdi->vdb_register.virt_addr)
  296. munmap((void *)vdi->vdb_register.virt_addr, vdi->vdb_register.size);
  297. osal_memset(&vdi->vdb_register, 0x00, sizeof(vpudrv_buffer_t));
  298. vdb.size = 0;
  299. // get common memory information to free virtual address
  300. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  301. {
  302. if (vdi->vpu_common_memory.phys_addr >= vdi->vpu_buffer_pool[i].vdb.phys_addr &&
  303. vdi->vpu_common_memory.phys_addr < (vdi->vpu_buffer_pool[i].vdb.phys_addr + vdi->vpu_buffer_pool[i].vdb.size))
  304. {
  305. vdi->vpu_buffer_pool[i].inuse = 0;
  306. vdi->vpu_buffer_pool_count--;
  307. vdb = vdi->vpu_buffer_pool[i].vdb;
  308. break;
  309. }
  310. }
  311. vdi_unlock(core_idx);
  312. if (vdb.size > 0)
  313. {
  314. munmap((void *)vdb.virt_addr, vdb.size);
  315. memset(&vdi->vpu_common_memory, 0x00, sizeof(vpu_buffer_t));
  316. }
  317. vdi->task_num--;
  318. if (vdi->vpu_fd != -1 && vdi->vpu_fd != 0x00)
  319. {
  320. close(vdi->vpu_fd);
  321. vdi->vpu_fd = -1;
  322. }
  323. memset(vdi, 0x00, sizeof(vdi_info_t));
  324. return 0;
  325. }
  326. int vdi_get_common_memory(unsigned long core_idx, vpu_buffer_t *vb)
  327. {
  328. vdi_info_t *vdi;
  329. if (core_idx >= MAX_NUM_VPU_CORE)
  330. return -1;
  331. vdi = &s_vdi_info[core_idx];
  332. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd==0x00)
  333. return -1;
  334. osal_memcpy(vb, &vdi->vpu_common_memory, sizeof(vpu_buffer_t));
  335. return 0;
  336. }
  337. int vdi_allocate_common_memory(unsigned long core_idx)
  338. {
  339. vdi_info_t *vdi = &s_vdi_info[core_idx];
  340. vpudrv_buffer_t vdb;
  341. int i;
  342. if (core_idx >= MAX_NUM_VPU_CORE)
  343. return -1;
  344. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd==0x00)
  345. return -1;
  346. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  347. vdb.size = SIZE_COMMON*MAX_NUM_VPU_CORE;
  348. if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_COMMON_MEMORY, &vdb) < 0)
  349. {
  350. VLOG(ERR, "[VDI] fail to vdi_allocate_dma_memory size=%d\n", vdb.size);
  351. return -1;
  352. }
  353. //vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, vdb.phys_addr);
  354. vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, DRAM_MEM2SYS(vdb.phys_addr));
  355. if ((void *)vdb.virt_addr == MAP_FAILED)
  356. {
  357. VLOG(ERR, "[VDI] fail to map common memory phyaddr=0x%lx, size = %d\n", (int)vdb.phys_addr, (int)vdb.size);
  358. return -1;
  359. }
  360. VLOG(INFO, "[VDI] vdi_allocate_common_memory lx, physaddr=0x%lx, virtaddr=0x%lx\n", vdb.phys_addr, vdb.virt_addr);
  361. VLOG(INFO, "[VDI] vdi_allocate_common_memory p, physaddr=0x%p, virtaddr=0x%p\n", vdb.phys_addr, vdb.virt_addr);
  362. // convert os driver buffer type to vpu buffer type
  363. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  364. vdi->pvip->vpu_common_buffer.size = SIZE_COMMON;
  365. vdi->pvip->vpu_common_buffer.phys_addr = (unsigned long)(vdb.phys_addr + (core_idx*SIZE_COMMON));
  366. vdi->pvip->vpu_common_buffer.base = (unsigned long)(vdb.base + (core_idx*SIZE_COMMON));
  367. vdi->pvip->vpu_common_buffer.virt_addr = (unsigned long)(vdb.virt_addr + (core_idx*SIZE_COMMON));
  368. #else
  369. vdi->pvip->vpu_common_buffer.size = SIZE_COMMON;
  370. vdi->pvip->vpu_common_buffer.phys_addr = (unsigned long)(vdb.phys_addr);
  371. vdi->pvip->vpu_common_buffer.base = (unsigned long)(vdb.base);
  372. vdi->pvip->vpu_common_buffer.virt_addr = (unsigned long)(vdb.virt_addr);
  373. #endif
  374. osal_memcpy(&vdi->vpu_common_memory, &vdi->pvip->vpu_common_buffer, sizeof(vpu_buffer_t));
  375. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  376. {
  377. if (vdi->vpu_buffer_pool[i].inuse == 0)
  378. {
  379. vdi->vpu_buffer_pool[i].vdb = vdb;
  380. vdi->vpu_buffer_pool_count++;
  381. vdi->vpu_buffer_pool[i].inuse = 1;
  382. break;
  383. }
  384. }
  385. VLOG(INFO, "[VDI] vdi_get_common_memory physaddr=0x%lx, size=%d, virtaddr=0x%lx\n", vdi->vpu_common_memory.phys_addr, vdi->vpu_common_memory.size, vdi->vpu_common_memory.virt_addr);
  386. return 0;
  387. }
  388. vpu_instance_pool_t *vdi_get_instance_pool(unsigned long core_idx)
  389. {
  390. vdi_info_t *vdi;
  391. vpudrv_buffer_t vdb;
  392. if (core_idx >= MAX_NUM_VPU_CORE)
  393. return NULL;
  394. vdi = &s_vdi_info[core_idx];
  395. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00 )
  396. return NULL;
  397. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  398. if (!vdi->pvip)
  399. {
  400. vdb.size = sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE)*VDI_NUM_LOCK_HANDLES;
  401. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  402. vdb.size *= MAX_NUM_VPU_CORE;
  403. #endif
  404. if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_INSTANCE_POOL, &vdb) < 0)
  405. {
  406. VLOG(ERR, "[VDI] fail to allocate get instance pool physical space=%d\n", (int)vdb.size);
  407. return NULL;
  408. }
  409. #ifdef USE_VMALLOC_FOR_INSTANCE_POOL_MEMORY
  410. vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, 0);
  411. #else
  412. vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE, MAP_SHARED, vdi->vpu_fd, vdb.phys_addr);
  413. #endif
  414. if ((void *)vdb.virt_addr == MAP_FAILED)
  415. {
  416. VLOG(ERR, "[VDI] fail to map instance pool phyaddr=0x%lx, size = %d\n", (int)vdb.phys_addr, (int)vdb.size);
  417. return NULL;
  418. }
  419. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  420. vdi->pvip = (vpu_instance_pool_t *)(vdb.virt_addr + (core_idx*(sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE)*VDI_NUM_LOCK_HANDLES)));
  421. #else
  422. vdi->pvip = (vpu_instance_pool_t *)(vdb.virt_addr);
  423. #endif
  424. vdi->vpu_mutex = (void *)((unsigned long)vdi->pvip + sizeof(vpu_instance_pool_t)); //change the pointer of vpu_mutex to at end pointer of vpu_instance_pool_t to assign at allocated position.
  425. vdi->vpu_disp_mutex = (void *)((unsigned long)vdi->pvip + sizeof(vpu_instance_pool_t) + sizeof(MUTEX_HANDLE));
  426. vdi->vmem_mutex = (void *)((unsigned long)vdi->pvip + sizeof(vpu_instance_pool_t) + 2*sizeof(MUTEX_HANDLE));
  427. VLOG(INFO, "[VDI] instance pool1 physaddr=0x%lx, virtaddr=0x%lx, base=0x%lx, size=%ld\n", (int)vdb.phys_addr, (int)vdb.virt_addr, (int)vdb.base, (int)vdb.size);
  428. }
  429. return (vpu_instance_pool_t *)vdi->pvip;
  430. }
  431. int vdi_open_instance(unsigned long core_idx, unsigned long inst_idx)
  432. {
  433. vdi_info_t *vdi;
  434. vpudrv_inst_info_t inst_info;
  435. if (core_idx >= MAX_NUM_VPU_CORE)
  436. return -1;
  437. vdi = &s_vdi_info[core_idx];
  438. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  439. return -1;
  440. inst_info.core_idx = core_idx;
  441. inst_info.inst_idx = inst_idx;
  442. if (ioctl(vdi->vpu_fd, VDI_IOCTL_OPEN_INSTANCE, &inst_info) < 0)
  443. {
  444. VLOG(ERR, "[VDI] fail to deliver open instance num inst_idx=%d\n", (int)inst_idx);
  445. return -1;
  446. }
  447. vdi->pvip->vpu_instance_num = inst_info.inst_open_count;
  448. return 0;
  449. }
  450. int vdi_close_instance(unsigned long core_idx, unsigned long inst_idx)
  451. {
  452. vdi_info_t *vdi;
  453. vpudrv_inst_info_t inst_info = {0, };;
  454. if (core_idx >= MAX_NUM_VPU_CORE)
  455. return -1;
  456. vdi = &s_vdi_info[core_idx];
  457. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  458. return -1;
  459. inst_info.core_idx = core_idx;
  460. inst_info.inst_idx = inst_idx;
  461. if (ioctl(vdi->vpu_fd, VDI_IOCTL_CLOSE_INSTANCE, &inst_info) < 0)
  462. {
  463. VLOG(ERR, "[VDI] fail to deliver open instance num inst_idx=%d\n", (int)inst_idx);
  464. return -1;
  465. }
  466. vdi->pvip->vpu_instance_num = inst_info.inst_open_count;
  467. return 0;
  468. }
  469. int vdi_get_instance_num(unsigned long core_idx)
  470. {
  471. vdi_info_t *vdi;
  472. if (core_idx >= MAX_NUM_VPU_CORE)
  473. return -1;
  474. vdi = &s_vdi_info[core_idx];
  475. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  476. return -1;
  477. return vdi->pvip->vpu_instance_num;
  478. }
  479. int vdi_hw_reset(unsigned long core_idx) // DEVICE_ADDR_SW_RESET
  480. {
  481. vdi_info_t *vdi;
  482. if (core_idx >= MAX_NUM_VPU_CORE)
  483. return -1;
  484. vdi = &s_vdi_info[core_idx];
  485. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  486. return -1;
  487. return ioctl(vdi->vpu_fd, VDI_IOCTL_RESET, 0);
  488. }
  489. int vdi_lock(unsigned long core_idx)
  490. {
  491. vdi_info_t *vdi;
  492. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  493. #else
  494. const int MUTEX_TIMEOUT = 0x7fffffff;
  495. #endif
  496. if (core_idx >= MAX_NUM_VPU_CORE)
  497. return -1;
  498. vdi = &s_vdi_info[core_idx];
  499. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  500. return -1;
  501. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  502. restore_mutex_in_dead((MUTEX_HANDLE *)vdi->vpu_mutex);
  503. pthread_mutex_lock((MUTEX_HANDLE*)vdi->vpu_mutex);
  504. #else
  505. if (pthread_mutex_lock((MUTEX_HANDLE *)vdi->vpu_mutex) != 0) {
  506. VLOG(ERR, "%s:%d failed to pthread_mutex_locK\n", __FUNCTION__, __LINE__);
  507. return -1;
  508. }
  509. #endif
  510. return 0;//lint !e454
  511. }
  512. void vdi_unlock(unsigned long core_idx)
  513. {
  514. vdi_info_t *vdi;
  515. if (core_idx >= MAX_NUM_VPU_CORE)
  516. return;
  517. vdi = &s_vdi_info[core_idx];
  518. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  519. return;
  520. pthread_mutex_unlock((MUTEX_HANDLE *)vdi->vpu_mutex);//lint !e455
  521. }
  522. int vdi_disp_lock(unsigned long core_idx)
  523. {
  524. vdi_info_t *vdi;
  525. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  526. #else
  527. const int MUTEX_TIMEOUT = 5000; // ms
  528. #endif
  529. if (core_idx >= MAX_NUM_VPU_CORE)
  530. return -1;
  531. vdi = &s_vdi_info[core_idx];
  532. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  533. return -1;
  534. #if defined(ANDROID) || !defined(PTHREAD_MUTEX_ROBUST_NP)
  535. restore_mutex_in_dead((MUTEX_HANDLE *)vdi->vpu_disp_mutex);
  536. pthread_mutex_lock((MUTEX_HANDLE*)vdi->vpu_disp_mutex);
  537. #else
  538. if (pthread_mutex_lock((MUTEX_HANDLE *)vdi->vpu_disp_mutex) != 0)
  539. VLOG(ERR, "%s:%d failed to pthread_mutex_lock\n", __FUNCTION__, __LINE__);
  540. return -1;
  541. }
  542. #endif /* ANDROID */
  543. return 0;//lint !e454
  544. }
  545. void vdi_disp_unlock(unsigned long core_idx)
  546. {
  547. vdi_info_t *vdi;
  548. if (core_idx >= MAX_NUM_VPU_CORE)
  549. return;
  550. vdi = &s_vdi_info[core_idx];
  551. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  552. return;
  553. pthread_mutex_unlock((MUTEX_HANDLE *)vdi->vpu_disp_mutex);//lint !e455
  554. }
  555. void vdi_write_register(unsigned long core_idx, unsigned int addr, unsigned int data)
  556. {
  557. vdi_info_t *vdi;
  558. unsigned long *reg_addr;
  559. if (core_idx >= MAX_NUM_VPU_CORE)
  560. return;
  561. vdi = &s_vdi_info[core_idx];
  562. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  563. return;
  564. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  565. reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr + (core_idx*VPU_CORE_BASE_OFFSET));
  566. #else
  567. reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr);
  568. #endif
  569. *(volatile unsigned int *)reg_addr = data;
  570. }
  571. unsigned int vdi_read_register(unsigned long core_idx, unsigned int addr)
  572. {
  573. vdi_info_t *vdi;
  574. unsigned long *reg_addr;
  575. if (core_idx >= MAX_NUM_VPU_CORE)
  576. return (unsigned int)-1;
  577. vdi = &s_vdi_info[core_idx];
  578. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  579. return (unsigned int)-1;
  580. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  581. reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr + (core_idx*VPU_CORE_BASE_OFFSET));
  582. #else
  583. reg_addr = (unsigned long *)(addr + (unsigned long)vdi->vdb_register.virt_addr);
  584. #endif
  585. //VLOG(INFO, "vdi_read_register addr 0x%lx\n", reg_addr);
  586. return *(volatile unsigned int *)reg_addr;
  587. }
  588. #define FIO_TIMEOUT 100
  589. unsigned int vdi_fio_read_register(unsigned long core_idx, unsigned int addr)
  590. {
  591. unsigned int ctrl;
  592. unsigned int count = 0;
  593. unsigned int data = 0xffffffff;
  594. ctrl = (addr&0xffff);
  595. ctrl |= (0<<16); /* read operation */
  596. vdi_write_register(core_idx, W5_VPU_FIO_CTRL_ADDR, ctrl);
  597. count = FIO_TIMEOUT;
  598. while (count--) {
  599. ctrl = vdi_read_register(core_idx, W5_VPU_FIO_CTRL_ADDR);
  600. if (ctrl & 0x80000000) {
  601. data = vdi_read_register(core_idx, W5_VPU_FIO_DATA);
  602. break;
  603. }
  604. }
  605. return data;
  606. }
  607. void vdi_fio_write_register(unsigned long core_idx, unsigned int addr, unsigned int data)
  608. {
  609. unsigned int ctrl;
  610. unsigned int count = 0;
  611. vdi_write_register(core_idx, W5_VPU_FIO_DATA, data);
  612. ctrl = (addr&0xffff);
  613. ctrl |= (1<<16); /* write operation */
  614. vdi_write_register(core_idx, W5_VPU_FIO_CTRL_ADDR, ctrl);
  615. count = FIO_TIMEOUT;
  616. while (count--) {
  617. ctrl = vdi_read_register(core_idx, W5_VPU_FIO_CTRL_ADDR);
  618. if (ctrl & 0x80000000) {
  619. break;
  620. }
  621. }
  622. }
  623. int vdi_clear_memory(unsigned long core_idx, PhysicalAddress addr, int len, int endian)
  624. {
  625. vdi_info_t *vdi;
  626. vpudrv_buffer_t vdb;
  627. unsigned long offset;
  628. int i;
  629. Uint8* zero;
  630. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  631. core_idx = 0;
  632. #endif
  633. if (core_idx >= MAX_NUM_VPU_CORE)
  634. return -1;
  635. vdi = &s_vdi_info[core_idx];
  636. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  637. return -1;
  638. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  639. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  640. {
  641. if (vdi->vpu_buffer_pool[i].inuse == 1)
  642. {
  643. vdb = vdi->vpu_buffer_pool[i].vdb;
  644. if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size))
  645. break;
  646. }
  647. }
  648. if (!vdb.size) {
  649. VLOG(ERR, "address 0x%08x is not mapped address!!!\n", (int)addr);
  650. return -1;
  651. }
  652. zero = (Uint8*)osal_malloc(len);
  653. osal_memset((void*)zero, 0x00, len);
  654. offset = addr - (unsigned long)vdb.phys_addr;
  655. //osal_memcpy((void *)((unsigned long)vdb.virt_addr+offset), zero, len);
  656. vdi_flush_ddr(core_idx,(unsigned long )(vdb.phys_addr+offset),len,1); //invalid cache before clear
  657. osal_memset((void *)((unsigned long)vdb.virt_addr+offset), 0x00, len);
  658. //vdi_flush_ddr(core_idx,(unsigned long )(vdb.phys_addr+offset),len,1);
  659. osal_free(zero);
  660. return len;
  661. }
  662. int vdi_write_memory(unsigned long core_idx, PhysicalAddress addr, unsigned char *data, int len, int endian)
  663. {
  664. vdi_info_t *vdi;
  665. vpudrv_buffer_t vdb;
  666. unsigned long offset;
  667. int i;
  668. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  669. core_idx = 0;
  670. #endif
  671. if (core_idx >= MAX_NUM_VPU_CORE)
  672. return -1;
  673. if (!data)
  674. return -1;
  675. vdi = &s_vdi_info[core_idx];
  676. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  677. return -1;
  678. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  679. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  680. {
  681. if (vdi->vpu_buffer_pool[i].inuse == 1)
  682. {
  683. vdb = vdi->vpu_buffer_pool[i].vdb;
  684. if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size)) {
  685. break;
  686. }
  687. }
  688. }
  689. if (!vdb.size) {
  690. VLOG(ERR, "address 0x%08x is not mapped address!!!\n", (int)addr);
  691. return -1;
  692. }
  693. #if 0 //def CNM_FPGA_PLATFORM
  694. // to check some writing of common buffer
  695. if (vdb.phys_addr >= vdi->vpu_common_memory.phys_addr &&
  696. vdb.phys_addr < (vdi->vpu_common_memory.phys_addr + SIZE_COMMON))
  697. {
  698. if (PRODUCT_CODE_W_SERIES(vdi->product_code))
  699. {
  700. if (vdi_read_register(core_idx, W5_VCPU_CUR_PC) != 0)
  701. {
  702. VLOG(ERR, "not to permit writing common buffer addr=%lx, size=%d\n", vdb.phys_addr, vdb.size);
  703. VLOG(ERR, "this process will be exit\n");
  704. exit(-1);
  705. }
  706. }
  707. else if (PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  708. }
  709. else {
  710. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  711. return -1;
  712. }
  713. }
  714. #endif
  715. offset = addr - (unsigned long)vdb.phys_addr;
  716. swap_endian(core_idx, data, len, endian);
  717. osal_memcpy((void *)((unsigned long)vdb.virt_addr+offset), data, len);
  718. //vdi_flush_ddr(core_idx,(unsigned long )(vdb.phys_addr+offset),len,1);
  719. return len;
  720. }
  721. int vdi_read_memory(unsigned long core_idx, PhysicalAddress addr, unsigned char *data, int len, int endian)
  722. {
  723. vdi_info_t *vdi;
  724. vpudrv_buffer_t vdb;
  725. unsigned long offset;
  726. int i;
  727. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  728. core_idx = 0;
  729. #endif
  730. if (core_idx >= MAX_NUM_VPU_CORE)
  731. return -1;
  732. vdi = &s_vdi_info[core_idx];
  733. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  734. return -1;
  735. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  736. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  737. {
  738. if (vdi->vpu_buffer_pool[i].inuse == 1)
  739. {
  740. vdb = vdi->vpu_buffer_pool[i].vdb;
  741. if (addr >= vdb.phys_addr && addr < (vdb.phys_addr + vdb.size))
  742. break;
  743. }
  744. }
  745. if (!vdb.size)
  746. return -1;
  747. offset = addr - (unsigned long)vdb.phys_addr;
  748. //vdi_flush_ddr(core_idx,(unsigned long )(vdb.phys_addr+offset),len,1);
  749. osal_memcpy(data, (const void *)((unsigned long)vdb.virt_addr+offset), len);
  750. swap_endian(core_idx, data, len, endian);
  751. return len;
  752. }
  753. int vdi_allocate_dma_memory(unsigned long core_idx, vpu_buffer_t *vb, int memTypes, int instIndex)
  754. {
  755. vdi_info_t *vdi;
  756. int i;
  757. vpudrv_buffer_t vdb;
  758. //vpudrv_flush_cache_t cache_info;
  759. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  760. core_idx = 0;
  761. #endif
  762. if (core_idx >= MAX_NUM_VPU_CORE)
  763. return -1;
  764. vdi = &s_vdi_info[core_idx];
  765. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  766. return -1;
  767. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  768. vdb.size = vb->size;
  769. if (ioctl(vdi->vpu_fd, VDI_IOCTL_ALLOCATE_PHYSICAL_MEMORY, &vdb) < 0)
  770. {
  771. VLOG(ERR, "[VDI] fail to vdi_allocate_dma_memory size=%d\n", vb->size);
  772. return -1;
  773. }
  774. vb->phys_addr = (unsigned long)vdb.phys_addr;
  775. vb->base = (unsigned long)vdb.base;
  776. //map to virtual address
  777. //vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE,
  778. // MAP_SHARED, vdi->vpu_fd, vdb.phys_addr);
  779. vdb.virt_addr = (unsigned long)mmap(NULL, vdb.size, PROT_READ | PROT_WRITE,
  780. MAP_SHARED, vdi->vpu_fd, DRAM_MEM2SYS(vdb.phys_addr));
  781. /*cache_info.start = vdb.phys_addr;
  782. cache_info.size = vdb.size;
  783. cache_info.flag = 1;
  784. ioctl(vdi->vpu_fd, VDI_IOCTL_FLUSH_DCACHE, &cache_info);*/
  785. if ((void *)vdb.virt_addr == MAP_FAILED)
  786. {
  787. memset(vb, 0x00, sizeof(vpu_buffer_t));
  788. return -1;
  789. }
  790. vb->virt_addr = vdb.virt_addr;
  791. vmem_lock(vdi);
  792. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  793. {
  794. if (vdi->vpu_buffer_pool[i].inuse == 0)
  795. {
  796. vdi->vpu_buffer_pool[i].vdb = vdb;
  797. vdi->vpu_buffer_pool_count++;
  798. vdi->vpu_buffer_pool[i].inuse = 1;
  799. break;
  800. }
  801. }
  802. vmem_unlock(vdi);
  803. VLOG(INFO, "[VDI] vdi_allocate_dma_memory, physaddr=0x%lx, virtaddr=0x%lx~0x%lx, size=0x%lx, memType=%d\n",
  804. vb->phys_addr, vb->virt_addr, vb->virt_addr + vb->size, vb->size, memTypes);
  805. return 0;
  806. }
  807. unsigned long vdi_get_dma_memory_free_size(unsigned long coreIdx)
  808. {
  809. vdi_info_t *vdi;
  810. int size;
  811. vdi = &s_vdi_info[coreIdx];
  812. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  813. return (unsigned long)-1;
  814. if (ioctl(vdi->vpu_fd, VDI_IOCTL_GET_FREE_MEM_SIZE, &size) < 0) {
  815. VLOG(ERR, "[VDI] fail VDI_IOCTL_GET_FREE_MEM_SIZE size=%d\n", size);
  816. return 0;
  817. }
  818. return size;
  819. }
  820. int vdi_attach_dma_memory(unsigned long core_idx, vpu_buffer_t *vb)
  821. {
  822. vdi_info_t *vdi;
  823. int i;
  824. vpudrv_buffer_t vdb;
  825. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  826. core_idx = 0;
  827. #endif
  828. if (core_idx >= MAX_NUM_VPU_CORE)
  829. return -1;
  830. vdi = &s_vdi_info[core_idx];
  831. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  832. return -1;
  833. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  834. vdb.size = vb->size;
  835. vdb.phys_addr = vb->phys_addr;
  836. vdb.base = vb->base;
  837. vdb.virt_addr = vb->virt_addr;
  838. vmem_lock(vdi);
  839. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  840. {
  841. if (vdi->vpu_buffer_pool[i].vdb.phys_addr == vb->phys_addr)
  842. {
  843. vdi->vpu_buffer_pool[i].vdb = vdb;
  844. vdi->vpu_buffer_pool[i].inuse = 1;
  845. break;
  846. }
  847. else
  848. {
  849. if (vdi->vpu_buffer_pool[i].inuse == 0)
  850. {
  851. vdi->vpu_buffer_pool[i].vdb = vdb;
  852. vdi->vpu_buffer_pool_count++;
  853. vdi->vpu_buffer_pool[i].inuse = 1;
  854. break;
  855. }
  856. }
  857. }
  858. vmem_unlock(vdi);
  859. //VLOG(INFO, "[VDI] vdi_attach_dma_memory, physaddr=0x%lx, virtaddr=0x%lx, size=%d, index=%d\n", vb->phys_addr, vb->virt_addr, vb->size, i);
  860. return 0;
  861. }
  862. int vdi_dettach_dma_memory(unsigned long core_idx, vpu_buffer_t *vb)
  863. {
  864. vdi_info_t *vdi;
  865. int i;
  866. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  867. core_idx = 0;
  868. #endif
  869. if (core_idx >= MAX_NUM_VPU_CORE)
  870. return -1;
  871. vdi = &s_vdi_info[core_idx];
  872. if(!vb || !vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  873. return -1;
  874. if (vb->size == 0)
  875. return -1;
  876. vmem_lock(vdi);
  877. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  878. {
  879. if (vdi->vpu_buffer_pool[i].vdb.phys_addr == vb->phys_addr)
  880. {
  881. vdi->vpu_buffer_pool[i].inuse = 0;
  882. vdi->vpu_buffer_pool_count--;
  883. break;
  884. }
  885. }
  886. vmem_unlock(vdi);
  887. return 0;
  888. }
  889. void vdi_free_dma_memory(unsigned long core_idx, vpu_buffer_t *vb, int memTypes, int instIndex)
  890. {
  891. vdi_info_t *vdi;
  892. int i;
  893. vpudrv_buffer_t vdb;
  894. #ifdef SUPPORT_MULTI_CORE_IN_ONE_DRIVER
  895. core_idx = 0;
  896. #endif
  897. if (core_idx >= MAX_NUM_VPU_CORE)
  898. return;
  899. vdi = &s_vdi_info[core_idx];
  900. if(!vb || !vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  901. return;
  902. if (vb->size == 0)
  903. return ;
  904. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  905. vmem_lock(vdi);
  906. for (i=0; i<MAX_VPU_BUFFER_POOL; i++)
  907. {
  908. /* add more constraints for finding the correct buffer */
  909. if ((vdi->vpu_buffer_pool[i].vdb.phys_addr == vb->phys_addr)
  910. && (vdi->vpu_buffer_pool[i].vdb.size == vb->size)
  911. && (vdi->vpu_buffer_pool[i].vdb.virt_addr == vb->virt_addr))
  912. {
  913. vdi->vpu_buffer_pool[i].inuse = 0;
  914. vdi->vpu_buffer_pool_count--;
  915. vdb = vdi->vpu_buffer_pool[i].vdb;
  916. break;
  917. }
  918. }
  919. vmem_unlock(vdi);
  920. if (!vdb.size)
  921. {
  922. VLOG(ERR, "[VDI] invalid buffer to free address = 0x%lx\n", (int)vdb.virt_addr);
  923. return ;
  924. }
  925. ioctl(vdi->vpu_fd, VDI_IOCTL_FREE_PHYSICALMEMORY, &vdb);
  926. if (munmap((void *)vdb.virt_addr, vdb.size) != 0)
  927. {
  928. VLOG(ERR, "[VDI] fail to vdi_free_dma_memory virtial address = 0x%lx\n", (int)vdb.virt_addr);
  929. }
  930. osal_memset(vb, 0, sizeof(vpu_buffer_t));
  931. }
  932. int vdi_get_sram_memory(unsigned long core_idx, vpu_buffer_t *vb)
  933. {
  934. vdi_info_t *vdi = NULL;
  935. vpudrv_buffer_t vdb;
  936. unsigned int sram_size = 0;
  937. if (core_idx >= MAX_NUM_VPU_CORE)
  938. return -1;
  939. vdi = &s_vdi_info[core_idx];
  940. if(!vb || !vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  941. return -1;
  942. osal_memset(&vdb, 0x00, sizeof(vpudrv_buffer_t));
  943. switch (vdi->product_code) {
  944. case BODA950_CODE:
  945. case CODA960_CODE:
  946. case CODA980_CODE:
  947. sram_size = VDI_CODA9_SRAM_SIZE; break;
  948. case WAVE511_CODE:
  949. sram_size = VDI_WAVE511_SRAM_SIZE; break;
  950. case WAVE521_CODE:
  951. sram_size = VDI_WAVE521_SRAM_SIZE; break;
  952. case WAVE521C_CODE:
  953. sram_size = VDI_WAVE521C_SRAM_SIZE; break;
  954. case WAVE521C_DUAL_CODE:
  955. sram_size = VDI_WAVE521C_SRAM_SIZE; break;
  956. case WAVE517_CODE:
  957. sram_size = VDI_WAVE521C_SRAM_SIZE; break;
  958. default:
  959. VLOG(ERR, "[VDI] check product_code(%x)\n", vdi->product_code);
  960. break;
  961. }
  962. if (sram_size > 0) // if we can know the sram address directly in vdi layer, we use it first for sdram address
  963. {
  964. vb->phys_addr = VDI_SRAM_BASE_ADDR+(core_idx*sram_size); // HOST can set DRAM base addr to VDI_SRAM_BASE_ADDR.
  965. vb->size = sram_size;
  966. return 0;
  967. }
  968. return 0;
  969. }
  970. int vdi_set_clock_gate(unsigned long core_idx, int enable)
  971. {
  972. vdi_info_t *vdi = NULL;
  973. int ret;
  974. if (core_idx >= MAX_NUM_VPU_CORE)
  975. return -1;
  976. vdi = &s_vdi_info[core_idx];
  977. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  978. return -1;
  979. if (vdi->product_code == WAVE512_CODE || vdi->product_code == WAVE515_CODE || vdi->product_code == WAVE517_CODE ||
  980. vdi->product_code == WAVE521_CODE || vdi->product_code == WAVE521C_CODE || vdi->product_code == WAVE511_CODE || vdi->product_code == WAVE521C_DUAL_CODE ) {
  981. return 0;
  982. }
  983. vdi->clock_state = enable;
  984. ret = ioctl(vdi->vpu_fd, VDI_IOCTL_SET_CLOCK_GATE, &enable);
  985. return ret;
  986. }
  987. int vdi_get_clock_gate(unsigned long core_idx)
  988. {
  989. vdi_info_t *vdi;
  990. int ret;
  991. if (core_idx >= MAX_NUM_VPU_CORE)
  992. return -1;
  993. vdi = &s_vdi_info[core_idx];
  994. if(!vdi || vdi->vpu_fd==-1 || vdi->vpu_fd == 0x00)
  995. return -1;
  996. ret = vdi->clock_state;
  997. return ret;
  998. }
  999. static int get_pc_addr(Uint32 product_code)
  1000. {
  1001. if (PRODUCT_CODE_W_SERIES(product_code)) {
  1002. return W5_VCPU_CUR_PC;
  1003. }
  1004. else if (PRODUCT_CODE_NOT_W_SERIES(product_code)) {
  1005. return BIT_CUR_PC;
  1006. }
  1007. else {
  1008. VLOG(ERR, "Unknown product id : %08x\n", product_code);
  1009. return -1;
  1010. }
  1011. }
  1012. int vdi_wait_bus_busy(unsigned long core_idx, int timeout, unsigned int gdi_busy_flag)
  1013. {
  1014. Uint64 elapse, cur;
  1015. Uint32 pc;
  1016. vdi_info_t *vdi;
  1017. vdi = &s_vdi_info[core_idx];
  1018. elapse = osal_gettime();
  1019. pc = get_pc_addr(vdi->product_code);
  1020. while(1)
  1021. {
  1022. if (vdi->product_code == WAVE521_CODE || vdi->product_code == WAVE521C_CODE || vdi->product_code == WAVE511_CODE || vdi->product_code == WAVE521C_DUAL_CODE ||
  1023. vdi->product_code == WAVE517_CODE) {
  1024. if (vdi_fio_read_register(core_idx, gdi_busy_flag) == 0x3f) break;
  1025. }
  1026. else if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1027. if (vdi_fio_read_register(core_idx, gdi_busy_flag) == 0x738) break;
  1028. }
  1029. else if (PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  1030. if (vdi_read_register(core_idx, gdi_busy_flag) == 0x77) break;
  1031. }
  1032. else {
  1033. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  1034. return -1;
  1035. }
  1036. if (timeout > 0) {
  1037. cur = osal_gettime();
  1038. if ((cur - elapse) > timeout) {
  1039. print_busy_timeout_status(core_idx, vdi->product_code, pc);
  1040. return -1;
  1041. }
  1042. }
  1043. }
  1044. return 0;
  1045. }
  1046. int vdi_wait_vpu_busy(unsigned long core_idx, int timeout, unsigned int addr_bit_busy_flag)
  1047. {
  1048. Uint64 elapse, cur;
  1049. Uint32 pc;
  1050. Uint32 normalReg = TRUE;
  1051. vdi_info_t *vdi;
  1052. vdi = &s_vdi_info[core_idx];
  1053. elapse = osal_gettime();
  1054. pc = get_pc_addr(vdi->product_code);
  1055. if (PRODUCT_CODE_W_SERIES(vdi->product_code) && (addr_bit_busy_flag&0x8000) ) {
  1056. normalReg = FALSE;
  1057. }
  1058. while(1)
  1059. {
  1060. if (normalReg == TRUE) {
  1061. if (vdi_read_register(core_idx, addr_bit_busy_flag) == 0) break;
  1062. }
  1063. else {
  1064. if (vdi_fio_read_register(core_idx, addr_bit_busy_flag) == 0) break;
  1065. }
  1066. if (timeout > 0) {
  1067. cur = osal_gettime();
  1068. if ((cur - elapse) > timeout) {
  1069. print_busy_timeout_status(core_idx, vdi->product_code, pc);
  1070. return -1;
  1071. }
  1072. }
  1073. }
  1074. return 0;
  1075. }
  1076. int vdi_wait_vcpu_bus_busy(unsigned long core_idx, int timeout, unsigned int addr_bit_busy_flag)
  1077. {
  1078. Uint64 elapse, cur;
  1079. Uint32 pc;
  1080. Uint32 normalReg = TRUE;
  1081. vdi_info_t *vdi;
  1082. vdi = &s_vdi_info[core_idx];
  1083. elapse = osal_gettime();
  1084. pc = get_pc_addr(vdi->product_code);
  1085. if (PRODUCT_CODE_W_SERIES(vdi->product_code) && (addr_bit_busy_flag&0x8000) ) {
  1086. normalReg = FALSE;
  1087. }
  1088. while(1)
  1089. {
  1090. if (normalReg == TRUE) {
  1091. if (vdi_read_register(core_idx, addr_bit_busy_flag) == 0x40) break;
  1092. }
  1093. else {
  1094. if (vdi_fio_read_register(core_idx, addr_bit_busy_flag) == 0x40) break;
  1095. }
  1096. if (timeout > 0) {
  1097. cur = osal_gettime();
  1098. if ((cur - elapse) > timeout) {
  1099. print_busy_timeout_status(core_idx, vdi->product_code, pc);
  1100. return -1;
  1101. }
  1102. }
  1103. }
  1104. return 0;
  1105. }
  1106. #ifdef SUPPORT_MULTI_INST_INTR
  1107. int vdi_wait_interrupt(unsigned long coreIdx, unsigned int instIdx, int timeout)
  1108. #else
  1109. int vdi_wait_interrupt(unsigned long coreIdx, int timeout)
  1110. #endif
  1111. {
  1112. int intr_reason = 0;
  1113. #ifdef SUPPORT_INTERRUPT
  1114. int ret;
  1115. #endif
  1116. vdi_info_t *vdi;
  1117. vpudrv_intr_info_t intr_info;
  1118. if (coreIdx >= MAX_NUM_VPU_CORE)
  1119. return -1;
  1120. vdi = &s_vdi_info[coreIdx];
  1121. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  1122. return -1;
  1123. #ifdef SUPPORT_INTERRUPT
  1124. intr_info.timeout = timeout;
  1125. intr_info.intr_reason = 0;
  1126. #ifdef SUPPORT_MULTI_INST_INTR
  1127. intr_info.intr_inst_index = instIdx;
  1128. #endif
  1129. ret = ioctl(vdi->vpu_fd, VDI_IOCTL_WAIT_INTERRUPT, (void*)&intr_info);
  1130. if (ret != 0)
  1131. return -1;
  1132. intr_reason = intr_info.intr_reason;
  1133. #else
  1134. struct timeval tv = {0};
  1135. Uint32 int_sts_reg;
  1136. Uint32 int_reason_reg;
  1137. Uint64 startTime, endTime;
  1138. UNREFERENCED_PARAMETER(intr_info);
  1139. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1140. int_sts_reg = W5_VPU_VPU_INT_STS;
  1141. }
  1142. else if (PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  1143. int_sts_reg = BIT_INT_STS;
  1144. }
  1145. else {
  1146. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  1147. return -1;
  1148. }
  1149. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1150. int_reason_reg = W5_VPU_VINT_REASON;
  1151. }
  1152. else {
  1153. int_reason_reg = BIT_INT_REASON;
  1154. }
  1155. startTime = osal_gettime();
  1156. while (TRUE) {
  1157. if (vdi_read_register(coreIdx, int_sts_reg)) {
  1158. if ((intr_reason=vdi_read_register(coreIdx, int_reason_reg))) {
  1159. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1160. vdi_write_register(coreIdx, W5_VPU_VINT_REASON_CLR, intr_reason);
  1161. vdi_write_register(coreIdx, W5_VPU_VINT_CLEAR, 0x1);
  1162. }
  1163. else {
  1164. vdi_write_register(coreIdx, BIT_INT_CLEAR, 0x1);
  1165. }
  1166. break;
  1167. }
  1168. }
  1169. endTime = osal_gettime();
  1170. if (timeout > 0 && (endTime-startTime) >= timeout) {
  1171. return -1;
  1172. }
  1173. }
  1174. #endif
  1175. return intr_reason;
  1176. }
  1177. //------------------------------------------------------------------------------
  1178. // LOG & ENDIAN functions
  1179. //------------------------------------------------------------------------------
  1180. int vdi_get_system_endian(unsigned long core_idx)
  1181. {
  1182. vdi_info_t *vdi;
  1183. if (core_idx >= MAX_NUM_VPU_CORE)
  1184. return -1;
  1185. vdi = &s_vdi_info[core_idx];
  1186. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  1187. return -1;
  1188. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1189. return VDI_128BIT_BUS_SYSTEM_ENDIAN;
  1190. }
  1191. else if(PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  1192. return VDI_SYSTEM_ENDIAN;
  1193. }
  1194. else {
  1195. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  1196. return -1;
  1197. }
  1198. }
  1199. int vdi_convert_endian(unsigned long core_idx, unsigned int endian)
  1200. {
  1201. vdi_info_t *vdi;
  1202. if (core_idx >= MAX_NUM_VPU_CORE)
  1203. return -1;
  1204. vdi = &s_vdi_info[core_idx];
  1205. if(!vdi || !vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  1206. return -1;
  1207. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1208. switch (endian) {
  1209. case VDI_LITTLE_ENDIAN: endian = 0x00; break;
  1210. case VDI_BIG_ENDIAN: endian = 0x0f; break;
  1211. case VDI_32BIT_LITTLE_ENDIAN: endian = 0x04; break;
  1212. case VDI_32BIT_BIG_ENDIAN: endian = 0x03; break;
  1213. }
  1214. }
  1215. else if(PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  1216. }
  1217. else {
  1218. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  1219. return -1;
  1220. }
  1221. return (endian&0x0f);
  1222. }
  1223. static Uint32 convert_endian_coda9_to_wave4(Uint32 endian)
  1224. {
  1225. Uint32 converted_endian = endian;
  1226. switch(endian) {
  1227. case VDI_LITTLE_ENDIAN: converted_endian = 0; break;
  1228. case VDI_BIG_ENDIAN: converted_endian = 7; break;
  1229. case VDI_32BIT_LITTLE_ENDIAN: converted_endian = 4; break;
  1230. case VDI_32BIT_BIG_ENDIAN: converted_endian = 3; break;
  1231. }
  1232. return converted_endian;
  1233. }
  1234. int swap_endian(unsigned long core_idx, unsigned char *data, int len, int endian)
  1235. {
  1236. vdi_info_t *vdi;
  1237. int changes;
  1238. int sys_endian;
  1239. BOOL byteChange, wordChange, dwordChange, lwordChange;
  1240. if (core_idx >= MAX_NUM_VPU_CORE)
  1241. return -1;
  1242. vdi = &s_vdi_info[core_idx];
  1243. if(!vdi || vdi->vpu_fd == -1 || vdi->vpu_fd == 0x00)
  1244. return -1;
  1245. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1246. sys_endian = VDI_128BIT_BUS_SYSTEM_ENDIAN;
  1247. }
  1248. else if(PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  1249. sys_endian = VDI_SYSTEM_ENDIAN;
  1250. }
  1251. else {
  1252. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  1253. return -1;
  1254. }
  1255. endian = vdi_convert_endian(core_idx, endian);
  1256. sys_endian = vdi_convert_endian(core_idx, sys_endian);
  1257. if (endian == sys_endian)
  1258. return 0;
  1259. if (PRODUCT_CODE_W_SERIES(vdi->product_code)) {
  1260. }
  1261. else if (PRODUCT_CODE_NOT_W_SERIES(vdi->product_code)) {
  1262. endian = convert_endian_coda9_to_wave4(endian);
  1263. sys_endian = convert_endian_coda9_to_wave4(sys_endian);
  1264. }
  1265. else {
  1266. VLOG(ERR, "Unknown product id : %08x\n", vdi->product_code);
  1267. return -1;
  1268. }
  1269. changes = endian ^ sys_endian;
  1270. byteChange = changes&0x01;
  1271. wordChange = ((changes&0x02) == 0x02);
  1272. dwordChange = ((changes&0x04) == 0x04);
  1273. lwordChange = ((changes&0x08) == 0x08);
  1274. if (byteChange) byte_swap(data, len);
  1275. if (wordChange) word_swap(data, len);
  1276. if (dwordChange) dword_swap(data, len);
  1277. if (lwordChange) lword_swap(data, len);
  1278. return 1;
  1279. }
  1280. #endif //#if defined(linux) || defined(__linux) || defined(ANDROID)