UefiCpuPkg.dec 21 KB

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  1. ## @file UefiCpuPkg.dec
  2. # This Package provides UEFI compatible CPU modules and libraries.
  3. #
  4. # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.<BR>
  5. #
  6. # SPDX-License-Identifier: BSD-2-Clause-Patent
  7. #
  8. ##
  9. [Defines]
  10. DEC_SPECIFICATION = 0x00010005
  11. PACKAGE_NAME = UefiCpuPkg
  12. PACKAGE_UNI_FILE = UefiCpuPkg.uni
  13. PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
  14. PACKAGE_VERSION = 0.90
  15. [Includes]
  16. Include
  17. [LibraryClasses]
  18. ## @libraryclass Defines some routines that are generic for IA32 family CPU
  19. ## to be UEFI specification compliant.
  20. ##
  21. UefiCpuLib|Include/Library/UefiCpuLib.h
  22. ## @libraryclass Defines some routines that are used to register/manage/program
  23. ## CPU features.
  24. ##
  25. RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
  26. [LibraryClasses.IA32, LibraryClasses.X64]
  27. ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
  28. ##
  29. MtrrLib|Include/Library/MtrrLib.h
  30. ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.
  31. ##
  32. LocalApicLib|Include/Library/LocalApicLib.h
  33. ## @libraryclass Provides platform specific initialization functions in the SEC phase.
  34. ##
  35. PlatformSecLib|Include/Library/PlatformSecLib.h
  36. ## @libraryclass Public include file for the SMM CPU Platform Hook Library.
  37. ##
  38. SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
  39. ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.
  40. ##
  41. SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
  42. ## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module.
  43. ##
  44. MpInitLib|Include/Library/MpInitLib.h
  45. ## @libraryclass Provides function to support CcExit processing.
  46. CcExitLib|Include/Library/CcExitLib.h
  47. ## @libraryclass Provides function to get CPU cache information.
  48. CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h
  49. ## @libraryclass Provides function for loading microcode.
  50. MicrocodeLib|Include/Library/MicrocodeLib.h
  51. ## @libraryclass Provides function for manipulating x86 paging structures.
  52. CpuPageTableLib|Include/Library/CpuPageTableLib.h
  53. [Guids]
  54. gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
  55. gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
  56. ## Include/Guid/CpuFeaturesSetDone.h
  57. gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
  58. ## Include/Guid/CpuFeaturesInitDone.h
  59. gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}
  60. ## Include/Guid/MicrocodePatchHob.h
  61. gEdkiiMicrocodePatchHobGuid = { 0xd178f11d, 0x8716, 0x418e, { 0xa1, 0x31, 0x96, 0x7d, 0x2a, 0xc4, 0x28, 0x43 }}
  62. [Protocols]
  63. ## Include/Protocol/SmmCpuService.h
  64. gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
  65. gEdkiiSmmCpuRendezvousProtocolGuid = { 0xaa00d50b, 0x4911, 0x428f, { 0xb9, 0x1a, 0xa5, 0x9d, 0xdb, 0x13, 0xe2, 0x4c }}
  66. ## Include/Protocol/SmMonitorInit.h
  67. gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
  68. #
  69. # [Error.gUefiCpuPkgTokenSpaceGuid]
  70. # 0x80000001 | Invalid value provided.
  71. #
  72. [Ppis]
  73. gEdkiiPeiMpServices2PpiGuid = { 0x5cb9cb3d, 0x31a4, 0x480c, { 0x94, 0x98, 0x29, 0xd2, 0x69, 0xba, 0xcf, 0xba}}
  74. ## Include/Ppi/ShadowMicrocode.h
  75. gEdkiiPeiShadowMicrocodePpiGuid = { 0x430f6965, 0x9a69, 0x41c5, { 0x93, 0xed, 0x8b, 0xf0, 0x64, 0x35, 0xc1, 0xc6 }}
  76. ## Include/Ppi/RepublishSecPpi.h
  77. gRepublishSecPpiPpiGuid = { 0x27a71b1e, 0x73ee, 0x43d6, { 0xac, 0xe3, 0x52, 0x1a, 0x2d, 0xc5, 0xd0, 0x92 }}
  78. [PcdsFeatureFlag]
  79. ## Indicates if SMM Profile will be enabled.
  80. # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
  81. # In X64 build, it could not be enabled when PcdCpuSmmRestrictedMemoryAccess is TRUE.
  82. # In IA32 build, the page table memory is not marked as read-only when it is enabled.
  83. # This PCD is only for validation purpose. It should be set to false in production.<BR><BR>
  84. # TRUE - SMM Profile will be enabled.<BR>
  85. # FALSE - SMM Profile will be disabled.<BR>
  86. # @Prompt Enable SMM Profile.
  87. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109
  88. ## Indicates if the SMM profile log buffer is a ring buffer.
  89. # If disabled, no additional log can be done when the buffer is full.<BR><BR>
  90. # TRUE - the SMM profile log buffer is a ring buffer.<BR>
  91. # FALSE - the SMM profile log buffer is a normal buffer.<BR>
  92. # @Prompt The SMM profile log buffer is a ring buffer.
  93. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a
  94. ## Indicates if SMM Startup AP in a blocking fashion.
  95. # TRUE - SMM Startup AP in a blocking fashion.<BR>
  96. # FALSE - SMM Startup AP in a non-blocking fashion.<BR>
  97. # @Prompt SMM Startup AP in a blocking fashion.
  98. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108
  99. ## Indicates if SMM Stack Guard will be enabled.
  100. # If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>
  101. # TRUE - SMM Stack Guard will be enabled.<BR>
  102. # FALSE - SMM Stack Guard will be disabled.<BR>
  103. # @Prompt Enable SMM Stack Guard.
  104. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C
  105. ## Indicates if BSP election in SMM will be enabled.
  106. # If enabled, a BSP will be dynamically elected among all processors in each SMI.
  107. # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>
  108. # TRUE - BSP election in SMM will be enabled.<BR>
  109. # FALSE - BSP election in SMM will be disabled.<BR>
  110. # @Prompt Enable BSP election in SMM.
  111. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106
  112. ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>
  113. # TRUE - SMM CPU hot-plug will be enabled.<BR>
  114. # FALSE - SMM CPU hot-plug will be disabled.<BR>
  115. # @Prompt SMM CPU hot-plug.
  116. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C
  117. ## Indicates if SMM Debug will be enabled.
  118. # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>
  119. # TRUE - SMM Debug will be enabled.<BR>
  120. # FALSE - SMM Debug will be disabled.<BR>
  121. # @Prompt Enable SMM Debug.
  122. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B
  123. ## Indicates if lock SMM Feature Control MSR.<BR><BR>
  124. # TRUE - SMM Feature Control MSR will be locked.<BR>
  125. # FALSE - SMM Feature Control MSR will not be locked.<BR>
  126. # @Prompt Lock SMM Feature Control MSR.
  127. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
  128. ## Indicates if SMRR will be enabled.<BR><BR>
  129. # TRUE - SMRR will be enabled.<BR>
  130. # FALSE - SMRR will not be enabled.<BR>
  131. # @Prompt Enable SMRR.
  132. gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|TRUE|BOOLEAN|0x3213210D
  133. ## Indicates if SmmFeatureControl will be enabled.<BR><BR>
  134. # TRUE - SmmFeatureControl will be enabled.<BR>
  135. # FALSE - SmmFeatureControl will not be enabled.<BR>
  136. # @Prompt Support SmmFeatureControl.
  137. gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|TRUE|BOOLEAN|0x32132110
  138. [PcdsFixedAtBuild]
  139. ## List of exception vectors which need switching stack.
  140. # This PCD will only take into effect if PcdCpuStackGuard is enabled.
  141. # By default exception #DD(8), #PF(14) are supported.
  142. # @Prompt Specify exception vectors which need switching stack.
  143. gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VOID*|0x30002000
  144. ## Size of good stack for an exception.
  145. # This PCD will only take into effect if PcdCpuStackGuard is enabled.
  146. # @Prompt Specify size of good stack of exception which need switching stack.
  147. gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
  148. ## Count of pre allocated SMM MP tokens per chunk.
  149. # @Prompt Specify the count of pre allocated SMM MP tokens per chunk.
  150. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmMpTokenCountPerChunk|64|UINT32|0x30002002
  151. ## Area of memory where the SEV-ES work area block lives.
  152. # @Prompt Configure the SEV-ES work area base
  153. gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|0x0|UINT32|0x30002005
  154. ## Size of teh area of memory where the SEV-ES work area block lives.
  155. # @Prompt Configure the SEV-ES work area base
  156. gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize|0x0|UINT32|0x30002006
  157. [PcdsFixedAtBuild, PcdsPatchableInModule]
  158. ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
  159. # @Prompt Configure base address of CPU Local APIC
  160. # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
  161. gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
  162. ## Specifies delay value in microseconds after sending out an INIT IPI.
  163. # @Prompt Configure delay value after send an INIT IPI
  164. gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
  165. ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
  166. ## aligns the address on a 4-KByte boundary.
  167. # @Prompt Configure stack size for Application Processor (AP)
  168. gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
  169. ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.
  170. # @Prompt Stack size in the temporary RAM.
  171. gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
  172. ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.
  173. # @Prompt SMM profile data buffer size.
  174. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107
  175. ## Specifies stack size in bytes for each processor in SMM.
  176. # @Prompt Processor stack size in SMM.
  177. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
  178. ## Specifies shadow stack size in bytes for each processor in SMM.
  179. # @Prompt Processor shadow stack size in SMM.
  180. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmShadowStackSize|0x2000|UINT32|0x3213210E
  181. ## Indicates if SMM Code Access Check is enabled.
  182. # If enabled, the SMM handler cannot execute the code outside SMM regions.
  183. # This PCD is suggested to TRUE in production image.<BR><BR>
  184. # TRUE - SMM Code Access Check will be enabled.<BR>
  185. # FALSE - SMM Code Access Check will be disabled.<BR>
  186. # @Prompt SMM Code Access Check.
  187. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
  188. ## Specifies the number of variable MTRRs reserved for OS use. The default number of
  189. # MTRRs reserved for OS use is 2.
  190. # @Prompt Number of reserved variable MTRRs.
  191. gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
  192. ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.
  193. # @Prompt STM exception stack size.
  194. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111
  195. ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.
  196. # @Prompt MSEG size.
  197. gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112
  198. ## Specifies the supported CPU features bit in array.
  199. # @Prompt Supported CPU features.
  200. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016
  201. ## Specifies if CPU features will be initialized after SMM relocation.
  202. # @Prompt If CPU features will be initialized after SMM relocation.
  203. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C
  204. ## Specifies if CPU features will be initialized during S3 resume.
  205. # @Prompt If CPU features will be initialized during S3 resume.
  206. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D
  207. ## Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Frequency.
  208. # TSC Frequency = ECX (core crystal clock frequency) * EBX/EAX.
  209. # Intel Xeon Processor Scalable Family with CPUID signature 06_55H = 25000000 (25MHz)
  210. # 6th and 7th generation Intel Core processors and Intel Xeon W Processor Family = 24000000 (24MHz)
  211. # Intel Atom processors based on Goldmont Microarchitecture with CPUID signature 06_5CH = 19200000 (19.2MHz)
  212. # @Prompt This PCD is the nominal frequency of the core crystal clock in Hz as is CPUID Leaf 0x15:ECX
  213. gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|24000000|UINT64|0x32132113
  214. ## Specifies the periodic interval value in microseconds for the status check
  215. # of APs for StartupAllAPs() and StartupThisAP() executed in non-blocking
  216. # mode in DXE phase.
  217. # @Prompt Periodic interval value in microseconds for AP status check in DXE.
  218. gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds|100000|UINT32|0x0000001E
  219. [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
  220. ## Specifies max supported number of Logical Processors.
  221. # @Prompt Configure max supported number of Logical Processors
  222. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
  223. ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
  224. # @Prompt Timeout for the BSP to detect all APs for the first time.
  225. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
  226. ## Specifies the number of Logical Processors that are available in the
  227. # preboot environment after platform reset, including BSP and APs. Possible
  228. # values:<BR><BR>
  229. # zero (default) - PcdCpuBootLogicalProcessorNumber is ignored, and
  230. # PcdCpuApInitTimeOutInMicroSeconds limits the initial AP
  231. # detection by the BSP.<BR>
  232. # nonzero - PcdCpuApInitTimeOutInMicroSeconds is ignored. The initial
  233. # AP detection finishes only when the detected CPU count
  234. # (BSP plus APs) reaches the value of
  235. # PcdCpuBootLogicalProcessorNumber, regardless of how long
  236. # that takes.<BR>
  237. # @Prompt Number of Logical Processors available after platform reset.
  238. gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber|0|UINT32|0x00000008
  239. ## Specifies the base address of the first microcode Patch in the microcode Region.
  240. # @Prompt Microcode Region base address.
  241. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
  242. ## Specifies the size of the microcode Region.
  243. # @Prompt Microcode Region size.
  244. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
  245. ## Specifies the AP wait loop state during POST phase.
  246. # The value is defined as below.<BR><BR>
  247. # 1: Place AP in the Hlt-Loop state.<BR>
  248. # 2: Place AP in the Mwait-Loop state.<BR>
  249. # 3: Place AP in the Run-Loop state.<BR>
  250. # @Prompt The AP wait loop state.
  251. # @ValidRange 0x80000001 | 1 - 3
  252. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006
  253. ## Specifies the AP target C-state for Mwait during POST phase.
  254. # The default value 0 means C1 state.
  255. # The value is defined as below.<BR><BR>
  256. # @Prompt The specified AP target C-state for Mwait.
  257. gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
  258. ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
  259. # @Prompt AP synchronization timeout value in SMM.
  260. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
  261. ## Indicates the CPU synchronization method used when processing an SMI.
  262. # 0x00 - Traditional CPU synchronization method.<BR>
  263. # 0x01 - Relaxed CPU synchronization method.<BR>
  264. # @Prompt SMM CPU Synchronization Method.
  265. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
  266. ## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.
  267. # @Prompt The encoded values for target duty cycle modulation.
  268. # @ValidRange 0x80000001 | 0 - 15
  269. gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A
  270. ## Indicates if the current boot is a power-on reset.<BR><BR>
  271. # TRUE - Current boot is a power-on reset.<BR>
  272. # FALSE - Current boot is not a power-on reset.<BR>
  273. # @Prompt Current boot is a power-on reset.
  274. gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
  275. [PcdsFixedAtBuild.X64, PcdsPatchableInModule.X64, PcdsDynamic.X64, PcdsDynamicEx.X64]
  276. ## Indicate access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.
  277. # MMIO access is always allowed regardless of the value of this PCD.
  278. # Loose of such restriction is only required by RAS components in X64 platforms.
  279. # The PCD value is considered as constantly TRUE in IA32 platforms.
  280. # When the PCD value is TRUE, page table is initialized to cover all memory spaces
  281. # and the memory occupied by page table is protected by page table itself as read-only.
  282. # In X64 build, it cannot be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
  283. # In X64 build, it could not be enabled also at the same time with heap guard feature for SMM
  284. # (PcdHeapGuardPropertyMask in MdeModulePkg).
  285. # In IA32 build, page table memory is not marked as read-only when either SMM profile feature (PcdCpuSmmProfileEnable)
  286. # or heap guard feature for SMM (PcdHeapGuardPropertyMask in MdeModulePkg) is enabled.
  287. # TRUE - Access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.<BR>
  288. # FALSE - Access to any type of non-SMRAM memory after SmmReadyToLock is allowed.<BR>
  289. # @Prompt Access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.
  290. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|TRUE|BOOLEAN|0x3213210F
  291. [PcdsDynamic, PcdsDynamicEx]
  292. ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
  293. # @Prompt The pointer to a CPU S3 data buffer.
  294. # @ValidList 0x80000001 | 0
  295. gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010
  296. ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.
  297. # @Prompt The pointer to CPU Hot Plug Data.
  298. # @ValidList 0x80000001 | 0
  299. gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
  300. ## Indicates processor feature capabilities, each bit corresponding to a specific feature.
  301. # @Prompt Processor feature capabilities.
  302. # @ValidList 0x80000001 | 0
  303. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018
  304. ## As input, specifies user's desired settings for enabling/disabling processor features.
  305. ## As output, specifies actual settings for processor features, each bit corresponding to a specific feature.
  306. # @Prompt As input, specifies user's desired processor feature settings. As output, specifies actual processor feature settings.
  307. # @ValidList 0x80000001 | 0
  308. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
  309. ## Contains the size of memory required when CPU processor trace is enabled.<BR><BR>
  310. # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
  311. # This PCD is ignored if CPU processor trace is disabled.<BR><BR>
  312. # Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.<BR>
  313. # 0x0 - 4K.<BR>
  314. # 0x1 - 8K.<BR>
  315. # 0x2 - 16K.<BR>
  316. # 0x3 - 32K.<BR>
  317. # 0x4 - 64K.<BR>
  318. # 0x5 - 128K.<BR>
  319. # 0x6 - 256K.<BR>
  320. # 0x7 - 512K.<BR>
  321. # 0x8 - 1M.<BR>
  322. # 0x9 - 2M.<BR>
  323. # 0xA - 4M.<BR>
  324. # 0xB - 8M.<BR>
  325. # 0xC - 16M.<BR>
  326. # 0xD - 32M.<BR>
  327. # 0xE - 64M.<BR>
  328. # 0xF - 128M.<BR>
  329. # @Prompt The memory size used for processor trace if processor trace is enabled.
  330. # @ValidRange 0x80000001 | 0 - 0xF
  331. gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
  332. ## Contains the processor trace output scheme when CPU processor trace is enabled.<BR><BR>
  333. # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
  334. # This PCD is ignored if CPU processor trace is disabled.<BR><BR>
  335. # Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>
  336. # 0 - Single Range output scheme.<BR>
  337. # 1 - ToPA(Table of physical address) scheme.<BR>
  338. # @Prompt The processor trace output scheme used when processor trace is enabled.
  339. # @ValidRange 0x80000001 | 0 - 1
  340. gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
  341. ## This dynamic PCD indicates whether SEV-ES is enabled
  342. # TRUE - SEV-ES is enabled
  343. # FALSE - SEV-ES is not enabled
  344. # @Prompt SEV-ES Status
  345. gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|FALSE|BOOLEAN|0x60000016
  346. ## This dynamic PCD contains the hypervisor features value obtained through the GHCB HYPERVISOR
  347. # features VMGEXIT defined in the version 2 of GHCB spec.
  348. # @Prompt GHCB Hypervisor Features
  349. gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures|0x0|UINT64|0x60000018
  350. [UserExtensions.TianoCore."ExtraFiles"]
  351. UefiCpuPkgExtra.uni