Helper.S 1.4 KB

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  1. #========================================================================================
  2. # Copyright (c) 2011-2017, ARM Limited. All rights reserved.
  3. #
  4. # SPDX-License-Identifier: BSD-2-Clause-Patent
  5. #
  6. #=======================================================================================
  7. #include <AsmMacroIoLibV8.h>
  8. #include <Chipset/AArch64.h>
  9. // Setup EL1 while in EL1
  10. ASM_FUNC(SetupExceptionLevel1)
  11. mov x5, x30 // Save LR
  12. mov x0, #CPACR_CP_FULL_ACCESS
  13. bl ASM_PFX(ArmWriteCpacr) // Disable copro traps to EL1
  14. ret x5
  15. // Setup EL2 while in EL2
  16. ASM_FUNC(SetupExceptionLevel2)
  17. msr sctlr_el2, xzr
  18. mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
  19. // Send all interrupts to their respective Exception levels for EL2
  20. orr x0, x0, #(1 << 3) // Enable EL2 FIQ
  21. orr x0, x0, #(1 << 4) // Enable EL2 IRQ
  22. orr x0, x0, #(1 << 5) // Enable EL2 SError and Abort
  23. msr hcr_el2, x0 // Write back our settings
  24. msr cptr_el2, xzr // Disable copro traps to EL2
  25. // Enable Timer access for non-secure EL1 and EL0
  26. // The cnthctl_el2 register bits are architecturally
  27. // UNKNOWN on reset.
  28. // Disable event stream as it is not in use at this stage
  29. mov x0, #(CNTHCTL_EL2_EL1PCTEN | CNTHCTL_EL2_EL1PCEN)
  30. msr cnthctl_el2, x0
  31. ret
  32. ASM_FUNCTION_REMOVE_IF_UNREFERENCED