PL011UartLib.h 7.0 KB

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  1. /** @file
  2. *
  3. * Copyright (c) 2011-2016, ARM Limited. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: BSD-2-Clause-Patent
  6. *
  7. **/
  8. #ifndef __PL011_UART_LIB_H__
  9. #define __PL011_UART_LIB_H__
  10. #include <Uefi/UefiBaseType.h>
  11. #include <Protocol/SerialIo.h>
  12. /**
  13. Initialise the serial port to the specified settings.
  14. All unspecified settings will be set to the default values.
  15. @param[in] UartBase The base address of the serial device.
  16. @param[in] UartClkInHz The clock in Hz for the serial device.
  17. Ignored if the PCD PL011UartInteger is not 0
  18. @param[in out] BaudRate The baud rate of the serial device. If the
  19. baud rate is not supported, the speed will be
  20. reduced to the nearest supported one and the
  21. variable's value will be updated accordingly.
  22. @param[in out] ReceiveFifoDepth The number of characters the device will
  23. buffer on input. Value of 0 will use the
  24. device's default FIFO depth.
  25. @param[in out] Parity If applicable, this is the EFI_PARITY_TYPE
  26. that is computed or checked as each character
  27. is transmitted or received. If the device
  28. does not support parity, the value is the
  29. default parity value.
  30. @param[in out] DataBits The number of data bits in each character.
  31. @param[in out] StopBits If applicable, the EFI_STOP_BITS_TYPE number
  32. of stop bits per character.
  33. If the device does not support stop bits, the
  34. value is the default stop bit value.
  35. @retval RETURN_SUCCESS All attributes were set correctly on the
  36. serial device.
  37. @retval RETURN_INVALID_PARAMETER One or more of the attributes has an
  38. unsupported value.
  39. **/
  40. RETURN_STATUS
  41. EFIAPI
  42. PL011UartInitializePort (
  43. IN UINTN UartBase,
  44. IN UINT32 UartClkInHz,
  45. IN OUT UINT64 *BaudRate,
  46. IN OUT UINT32 *ReceiveFifoDepth,
  47. IN OUT EFI_PARITY_TYPE *Parity,
  48. IN OUT UINT8 *DataBits,
  49. IN OUT EFI_STOP_BITS_TYPE *StopBits
  50. );
  51. /**
  52. Assert or deassert the control signals on a serial port.
  53. The following control signals are set according their bit settings :
  54. . Request to Send
  55. . Data Terminal Ready
  56. @param[in] UartBase UART registers base address
  57. @param[in] Control The following bits are taken into account :
  58. . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the
  59. "Request To Send" control signal if this bit is
  60. equal to one/zero.
  61. . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert
  62. the "Data Terminal Ready" control signal if this
  63. bit is equal to one/zero.
  64. . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable
  65. the hardware loopback if this bit is equal to
  66. one/zero.
  67. . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.
  68. . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/
  69. disable the hardware flow control based on CTS (Clear
  70. To Send) and RTS (Ready To Send) control signals.
  71. @retval RETURN_SUCCESS The new control bits were set on the device.
  72. @retval RETURN_UNSUPPORTED The device does not support this operation.
  73. **/
  74. RETURN_STATUS
  75. EFIAPI
  76. PL011UartSetControl (
  77. IN UINTN UartBase,
  78. IN UINT32 Control
  79. );
  80. /**
  81. Retrieve the status of the control bits on a serial device.
  82. @param[in] UartBase UART registers base address
  83. @param[out] Control Status of the control bits on a serial device :
  84. . EFI_SERIAL_DATA_CLEAR_TO_SEND,
  85. EFI_SERIAL_DATA_SET_READY,
  86. EFI_SERIAL_RING_INDICATE,
  87. EFI_SERIAL_CARRIER_DETECT,
  88. EFI_SERIAL_REQUEST_TO_SEND,
  89. EFI_SERIAL_DATA_TERMINAL_READY
  90. are all related to the DTE (Data Terminal Equipment)
  91. and DCE (Data Communication Equipment) modes of
  92. operation of the serial device.
  93. . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the
  94. receive buffer is empty, 0 otherwise.
  95. . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the
  96. transmit buffer is empty, 0 otherwise.
  97. . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if
  98. the hardware loopback is enabled (the ouput feeds the
  99. receive buffer), 0 otherwise.
  100. . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if
  101. a loopback is accomplished by software, 0 otherwise.
  102. . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to
  103. one if the hardware flow control based on CTS (Clear
  104. To Send) and RTS (Ready To Send) control signals is
  105. enabled, 0 otherwise.
  106. @retval RETURN_SUCCESS The control bits were read from the serial device.
  107. **/
  108. RETURN_STATUS
  109. EFIAPI
  110. PL011UartGetControl (
  111. IN UINTN UartBase,
  112. OUT UINT32 *Control
  113. );
  114. /**
  115. Write data to serial device.
  116. @param Buffer Point of data buffer which need to be written.
  117. @param NumberOfBytes Number of output bytes which are cached in Buffer.
  118. @retval 0 Write data failed.
  119. @retval !0 Actual number of bytes written to serial device.
  120. **/
  121. UINTN
  122. EFIAPI
  123. PL011UartWrite (
  124. IN UINTN UartBase,
  125. IN UINT8 *Buffer,
  126. IN UINTN NumberOfBytes
  127. );
  128. /**
  129. Read data from serial device and save the data in buffer.
  130. @param Buffer Point of data buffer which need to be written.
  131. @param NumberOfBytes Number of output bytes which are cached in Buffer.
  132. @retval 0 Read data failed.
  133. @retval !0 Actual number of bytes read from serial device.
  134. **/
  135. UINTN
  136. EFIAPI
  137. PL011UartRead (
  138. IN UINTN UartBase,
  139. OUT UINT8 *Buffer,
  140. IN UINTN NumberOfBytes
  141. );
  142. /**
  143. Check to see if any data is available to be read from the debug device.
  144. @retval TRUE At least one byte of data is available to be read
  145. @retval FALSE No data is available to be read
  146. **/
  147. BOOLEAN
  148. EFIAPI
  149. PL011UartPoll (
  150. IN UINTN UartBase
  151. );
  152. #endif