NorFlashDxe.h 11 KB

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  1. /** @file NorFlashDxe.h
  2. Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef __NOR_FLASH_DXE_H__
  6. #define __NOR_FLASH_DXE_H__
  7. #include <Base.h>
  8. #include <PiDxe.h>
  9. #include <Guid/EventGroup.h>
  10. #include <Protocol/BlockIo.h>
  11. #include <Protocol/DiskIo.h>
  12. #include <Protocol/FirmwareVolumeBlock.h>
  13. #include <Library/DebugLib.h>
  14. #include <Library/IoLib.h>
  15. #include <Library/NorFlashPlatformLib.h>
  16. #include <Library/UefiLib.h>
  17. #include <Library/UefiRuntimeLib.h>
  18. #define NOR_FLASH_ERASE_RETRY 10
  19. // Device access macros
  20. // These are necessary because we use 2 x 16bit parts to make up 32bit data
  21. #define HIGH_16_BITS 0xFFFF0000
  22. #define LOW_16_BITS 0x0000FFFF
  23. #define LOW_8_BITS 0x000000FF
  24. #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
  25. #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
  26. #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
  27. // Each command must be sent simultaneously to both chips,
  28. // i.e. at the lower 16 bits AND at the higher 16 bits
  29. #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
  30. #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
  31. #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
  32. #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
  33. // Status Register Bits
  34. #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
  35. #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
  36. #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
  37. #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
  38. #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
  39. #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
  40. #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
  41. #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
  42. // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
  43. // On chip buffer size for buffered programming operations
  44. // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
  45. // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
  46. #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
  47. #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
  48. #define MAX_BUFFERED_PROG_ITERATIONS 10000000
  49. #define BOUNDARY_OF_32_WORDS 0x7F
  50. // CFI Addresses
  51. #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
  52. #define P30_CFI_ADDR_VENDOR_ID 0x13
  53. // CFI Data
  54. #define CFI_QRY 0x00595251
  55. // READ Commands
  56. #define P30_CMD_READ_DEVICE_ID 0x0090
  57. #define P30_CMD_READ_STATUS_REGISTER 0x0070
  58. #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
  59. #define P30_CMD_READ_ARRAY 0x00FF
  60. #define P30_CMD_READ_CFI_QUERY 0x0098
  61. // WRITE Commands
  62. #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
  63. #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
  64. #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
  65. #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
  66. #define P30_CMD_BEFP_SETUP 0x0080
  67. #define P30_CMD_BEFP_CONFIRM 0x00D0
  68. // ERASE Commands
  69. #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
  70. #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
  71. // SUSPEND Commands
  72. #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
  73. #define P30_CMD_SUSPEND_RESUME 0x00D0
  74. // BLOCK LOCKING / UNLOCKING Commands
  75. #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
  76. #define P30_CMD_LOCK_BLOCK 0x0001
  77. #define P30_CMD_UNLOCK_BLOCK 0x00D0
  78. #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
  79. // PROTECTION Commands
  80. #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
  81. // CONFIGURATION Commands
  82. #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
  83. #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
  84. #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
  85. #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
  86. #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
  87. #define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)
  88. typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
  89. #pragma pack (1)
  90. typedef struct {
  91. VENDOR_DEVICE_PATH Vendor;
  92. UINT8 Index;
  93. EFI_DEVICE_PATH_PROTOCOL End;
  94. } NOR_FLASH_DEVICE_PATH;
  95. #pragma pack ()
  96. struct _NOR_FLASH_INSTANCE {
  97. UINT32 Signature;
  98. EFI_HANDLE Handle;
  99. UINTN DeviceBaseAddress;
  100. UINTN RegionBaseAddress;
  101. UINTN Size;
  102. EFI_LBA StartLba;
  103. EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
  104. EFI_BLOCK_IO_MEDIA Media;
  105. EFI_DISK_IO_PROTOCOL DiskIoProtocol;
  106. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
  107. VOID* ShadowBuffer;
  108. NOR_FLASH_DEVICE_PATH DevicePath;
  109. };
  110. EFI_STATUS
  111. NorFlashReadCfiData (
  112. IN UINTN DeviceBaseAddress,
  113. IN UINTN CFI_Offset,
  114. IN UINT32 NumberOfBytes,
  115. OUT UINT32 *Data
  116. );
  117. EFI_STATUS
  118. NorFlashWriteBuffer (
  119. IN NOR_FLASH_INSTANCE *Instance,
  120. IN UINTN TargetAddress,
  121. IN UINTN BufferSizeInBytes,
  122. IN UINT32 *Buffer
  123. );
  124. //
  125. // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
  126. //
  127. EFI_STATUS
  128. EFIAPI
  129. NorFlashBlockIoReset (
  130. IN EFI_BLOCK_IO_PROTOCOL *This,
  131. IN BOOLEAN ExtendedVerification
  132. );
  133. //
  134. // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
  135. //
  136. EFI_STATUS
  137. EFIAPI
  138. NorFlashBlockIoReadBlocks (
  139. IN EFI_BLOCK_IO_PROTOCOL *This,
  140. IN UINT32 MediaId,
  141. IN EFI_LBA Lba,
  142. IN UINTN BufferSizeInBytes,
  143. OUT VOID *Buffer
  144. );
  145. //
  146. // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
  147. //
  148. EFI_STATUS
  149. EFIAPI
  150. NorFlashBlockIoWriteBlocks (
  151. IN EFI_BLOCK_IO_PROTOCOL *This,
  152. IN UINT32 MediaId,
  153. IN EFI_LBA Lba,
  154. IN UINTN BufferSizeInBytes,
  155. IN VOID *Buffer
  156. );
  157. //
  158. // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
  159. //
  160. EFI_STATUS
  161. EFIAPI
  162. NorFlashBlockIoFlushBlocks (
  163. IN EFI_BLOCK_IO_PROTOCOL *This
  164. );
  165. //
  166. // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
  167. //
  168. EFI_STATUS
  169. EFIAPI
  170. NorFlashDiskIoReadDisk (
  171. IN EFI_DISK_IO_PROTOCOL *This,
  172. IN UINT32 MediaId,
  173. IN UINT64 Offset,
  174. IN UINTN BufferSize,
  175. OUT VOID *Buffer
  176. );
  177. //
  178. // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
  179. //
  180. EFI_STATUS
  181. EFIAPI
  182. NorFlashDiskIoWriteDisk (
  183. IN EFI_DISK_IO_PROTOCOL *This,
  184. IN UINT32 MediaId,
  185. IN UINT64 Offset,
  186. IN UINTN BufferSize,
  187. IN VOID *Buffer
  188. );
  189. //
  190. // NorFlashFvbDxe.c
  191. //
  192. EFI_STATUS
  193. EFIAPI
  194. NorFlashFvbInitialize (
  195. IN NOR_FLASH_INSTANCE* Instance
  196. );
  197. EFI_STATUS
  198. EFIAPI
  199. FvbGetAttributes(
  200. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  201. OUT EFI_FVB_ATTRIBUTES_2 *Attributes
  202. );
  203. EFI_STATUS
  204. EFIAPI
  205. FvbSetAttributes(
  206. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  207. IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
  208. );
  209. EFI_STATUS
  210. EFIAPI
  211. FvbGetPhysicalAddress(
  212. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  213. OUT EFI_PHYSICAL_ADDRESS *Address
  214. );
  215. EFI_STATUS
  216. EFIAPI
  217. FvbGetBlockSize(
  218. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  219. IN EFI_LBA Lba,
  220. OUT UINTN *BlockSize,
  221. OUT UINTN *NumberOfBlocks
  222. );
  223. EFI_STATUS
  224. EFIAPI
  225. FvbRead(
  226. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  227. IN EFI_LBA Lba,
  228. IN UINTN Offset,
  229. IN OUT UINTN *NumBytes,
  230. IN OUT UINT8 *Buffer
  231. );
  232. EFI_STATUS
  233. EFIAPI
  234. FvbWrite(
  235. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  236. IN EFI_LBA Lba,
  237. IN UINTN Offset,
  238. IN OUT UINTN *NumBytes,
  239. IN UINT8 *Buffer
  240. );
  241. EFI_STATUS
  242. EFIAPI
  243. FvbEraseBlocks(
  244. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  245. ...
  246. );
  247. //
  248. // NorFlashDxe.c
  249. //
  250. EFI_STATUS
  251. NorFlashUnlockAndEraseSingleBlock (
  252. IN NOR_FLASH_INSTANCE *Instance,
  253. IN UINTN BlockAddress
  254. );
  255. EFI_STATUS
  256. NorFlashWriteSingleBlock (
  257. IN NOR_FLASH_INSTANCE *Instance,
  258. IN EFI_LBA Lba,
  259. IN UINTN Offset,
  260. IN OUT UINTN *NumBytes,
  261. IN UINT8 *Buffer
  262. );
  263. EFI_STATUS
  264. NorFlashWriteBlocks (
  265. IN NOR_FLASH_INSTANCE *Instance,
  266. IN EFI_LBA Lba,
  267. IN UINTN BufferSizeInBytes,
  268. IN VOID *Buffer
  269. );
  270. EFI_STATUS
  271. NorFlashReadBlocks (
  272. IN NOR_FLASH_INSTANCE *Instance,
  273. IN EFI_LBA Lba,
  274. IN UINTN BufferSizeInBytes,
  275. OUT VOID *Buffer
  276. );
  277. EFI_STATUS
  278. NorFlashRead (
  279. IN NOR_FLASH_INSTANCE *Instance,
  280. IN EFI_LBA Lba,
  281. IN UINTN Offset,
  282. IN UINTN BufferSizeInBytes,
  283. OUT VOID *Buffer
  284. );
  285. EFI_STATUS
  286. NorFlashWrite (
  287. IN NOR_FLASH_INSTANCE *Instance,
  288. IN EFI_LBA Lba,
  289. IN UINTN Offset,
  290. IN OUT UINTN *NumBytes,
  291. IN UINT8 *Buffer
  292. );
  293. EFI_STATUS
  294. NorFlashReset (
  295. IN NOR_FLASH_INSTANCE *Instance
  296. );
  297. #endif /* __NOR_FLASH_DXE_H__ */