PcAtChipsetPkg.dec 7.6 KB

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  1. ## @file
  2. # Public definitions for PcAtChipset package.
  3. #
  4. # This package is designed to public interfaces and implementation which follows
  5. # PcAt defacto standard.
  6. #
  7. # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
  8. # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
  9. # Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>
  10. #
  11. # SPDX-License-Identifier: BSD-2-Clause-Patent
  12. #
  13. ##
  14. [Defines]
  15. DEC_SPECIFICATION = 0x00010005
  16. PACKAGE_NAME = PcAtChipsetPkg
  17. PACKAGE_UNI_FILE = PcAtChipsetPkg.uni
  18. PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC
  19. PACKAGE_VERSION = 0.3
  20. [Includes]
  21. Include
  22. [LibraryClasses]
  23. ## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.
  24. #
  25. IoApicLib|Include/Library/IoApicLib.h
  26. [Guids]
  27. gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
  28. #
  29. # [Error.gPcAtChipsetPkgTokenSpaceGuid]
  30. # 0x80000001 | Invalid value provided.
  31. #
  32. [PcdsFeatureFlag]
  33. ## Indicates the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them, or use I/O APIC interrupts.<BR><BR>
  34. # TRUE - Configures the HPET Timer to use MSI interrupts if the HPET Timer supports them.<BR>
  35. # FALSE - Configures the HPET Timer to use I/O APIC interrupts.<BR>
  36. # @Prompt Configure HPET to use MSI.
  37. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
  38. ## Indicates the RTC port registers are in MMIO space, or in I/O space.
  39. # Default is I/O space.<BR><BR>
  40. # TRUE - RTC port registers are in MMIO space.<BR>
  41. # FALSE - RTC port registers are in I/O space.<BR>
  42. # @Prompt RTC port registers use MMIO.
  43. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|FALSE|BOOLEAN|0x00000021
  44. [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
  45. ## This PCD specifies the base address of the HPET timer.
  46. # @Prompt HPET base address.
  47. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009
  48. ## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.
  49. # @Prompt HPET local APIC vector.
  50. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
  51. ## This PCD specifies the default period of the HPET Timer in 100 ns units.
  52. # The default value of 100000 100 ns units is the same as 10 ms.
  53. # @Prompt Default period of HPET timer.
  54. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
  55. ## This PCD specifies the base address of the IO APIC.
  56. # @Prompt IO APIC base address.
  57. gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C
  58. ## This PCD specifies the minimal valid year in RTC.
  59. # @Prompt Minimal valid year in RTC.
  60. gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear|1998|UINT16|0x0000000D
  61. ## This PCD specifies the maximal valid year in RTC.
  62. # @Prompt Maximal valid year in RTC.
  63. # @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100
  64. gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E
  65. ## Specifies RTC Index Register address in MMIO space.
  66. # @Prompt RTC Index Register address
  67. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0|UINT64|0x00000022
  68. ## Specifies RTC Target Register address in MMIO space.
  69. # @Prompt RTC Target Register address
  70. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0|UINT64|0x00000023
  71. ## Specifies RTC Index Register address in I/O space.
  72. # @Prompt RTC Index Register address
  73. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000001E
  74. ## Specifies RTC Target Register address in I/O space.
  75. # @Prompt RTC Target Register address
  76. gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F
  77. [PcdsFixedAtBuild, PcdsPatchableInModule]
  78. ## Defines the ACPI register set base address.
  79. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  80. # @Prompt ACPI Timer IO Port Address
  81. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010
  82. ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  83. # @Prompt ACPI Hardware PCI Bus Number
  84. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011
  85. ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  86. # The invalid 0xFF is as its default value. It must be configured to the real value.
  87. # @Prompt ACPI Hardware PCI Device Number
  88. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012
  89. ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
  90. # The invalid 0xFF is as its default value. It must be configured to the real value.
  91. # @Prompt ACPI Hardware PCI Function Number
  92. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013
  93. ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
  94. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  95. # @Prompt ACPI Hardware PCI Register Offset
  96. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014
  97. ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
  98. # @Prompt ACPI Hardware PCI Bar Enable BitMask
  99. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015
  100. ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
  101. # The invalid 0xFFFF is as its default value. It must be configured to the real value.
  102. # @Prompt ACPI Hardware PCI Bar Register Offset
  103. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016
  104. ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
  105. # @Prompt Offset to 32-bit Timer register in ACPI BAR
  106. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008|UINT16|0x00000017
  107. ## Defines the bit mask to retrieve ACPI IO Port Base Address
  108. # @Prompt ACPI IO Port Base Address Mask
  109. gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask |0xFFFE|UINT16|0x00000018
  110. ## Reset Control Register address in I/O space.
  111. # @Prompt Reset Control Register address
  112. gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlRegister|0x64|UINT64|0x00000019
  113. ## 8bit Reset Control Register value for cold reset.
  114. # @Prompt Reset Control Register value for cold reset
  115. gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UINT8|0x0000001A
  116. ## Specifies the initial value for Register_A in RTC.
  117. # @Prompt Initial value for Register_A in RTC.
  118. gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x0000001B
  119. ## Specifies the initial value for Register_B in RTC.
  120. # @Prompt Initial value for Register_B in RTC.
  121. gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x0000001C
  122. ## Specifies the initial value for Register_D in RTC.
  123. # @Prompt Initial value for Register_D in RTC.
  124. gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D
  125. ## RTC Update Timeout Value(microsecond).
  126. # @Prompt RTC Update Timeout Value.
  127. gPcAtChipsetPkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout|100000|UINT32|0x00000020
  128. [UserExtensions.TianoCore."ExtraFiles"]
  129. PcAtChipsetPkgExtra.uni