AcpiCpuData.h 8.6 KB

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  1. /** @file
  2. Definitions for CPU S3 data.
  3. Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #ifndef _ACPI_CPU_DATA_H_
  7. #define _ACPI_CPU_DATA_H_
  8. //
  9. // This macro definition is used to fix incompatibility issue caused by
  10. // ACPI_CPU_DATA structure update. It will be removed after all the platform
  11. // code uses new ACPI_CPU_DATA structure.
  12. //
  13. #define ACPI_CPU_DATA_STRUCTURE_UPDATE
  14. //
  15. // Register types in register table
  16. //
  17. typedef enum {
  18. Msr,
  19. ControlRegister,
  20. MemoryMapped,
  21. CacheControl,
  22. //
  23. // Semaphore type used to control the execute sequence of the Msr.
  24. // It will be insert between two Msr which has execute dependence.
  25. //
  26. Semaphore,
  27. InvalidReg
  28. } REGISTER_TYPE;
  29. //
  30. // Describe the dependency type for different features.
  31. // The value set to CPU_REGISTER_TABLE_ENTRY.Value when the REGISTER_TYPE is Semaphore.
  32. //
  33. typedef enum {
  34. NoneDepType,
  35. ThreadDepType,
  36. CoreDepType,
  37. PackageDepType,
  38. InvalidDepType
  39. } CPU_FEATURE_DEPENDENCE_TYPE;
  40. //
  41. // CPU information.
  42. //
  43. typedef struct {
  44. //
  45. // Record the package count in this CPU.
  46. //
  47. UINT32 PackageCount;
  48. //
  49. // Record the max core count in this CPU.
  50. // Different packages may have different core count, this value
  51. // save the max core count in all the packages.
  52. //
  53. UINT32 MaxCoreCount;
  54. //
  55. // Record the max thread count in this CPU.
  56. // Different cores may have different thread count, this value
  57. // save the max thread count in all the cores.
  58. //
  59. UINT32 MaxThreadCount;
  60. //
  61. // This field points to an array.
  62. // This array saves thread count (type UINT32) of each package.
  63. // The array has PackageCount elements.
  64. //
  65. // If the platform does not support MSR setting at S3 resume, and
  66. // therefore it doesn't need the dependency semaphores, it should set
  67. // this field to 0.
  68. //
  69. EFI_PHYSICAL_ADDRESS ThreadCountPerPackage;
  70. //
  71. // This field points to an array.
  72. // This array saves thread count (type UINT8) of each core.
  73. // The array has PackageCount * MaxCoreCount elements.
  74. //
  75. // If the platform does not support MSR setting at S3 resume, and
  76. // therefore it doesn't need the dependency semaphores, it should set
  77. // this field to 0.
  78. //
  79. EFI_PHYSICAL_ADDRESS ThreadCountPerCore;
  80. } CPU_STATUS_INFORMATION;
  81. //
  82. // Element of register table entry
  83. //
  84. typedef struct {
  85. REGISTER_TYPE RegisterType; // offset 0 - 3
  86. UINT32 Index; // offset 4 - 7
  87. UINT8 ValidBitStart; // offset 8
  88. UINT8 ValidBitLength; // offset 9
  89. BOOLEAN TestThenWrite; // offset 10
  90. UINT8 Reserved1; // offset 11
  91. UINT32 HighIndex; // offset 12-15, only valid for MemoryMapped
  92. UINT64 Value; // offset 16-23
  93. } CPU_REGISTER_TABLE_ENTRY;
  94. //
  95. // Register table definition, including current table length,
  96. // allocated size of this table, and pointer to the list of table entries.
  97. //
  98. typedef struct {
  99. //
  100. // The number of valid entries in the RegisterTableEntry buffer
  101. //
  102. UINT32 TableLength;
  103. UINT32 NumberBeforeReset;
  104. //
  105. // The size, in bytes, of the RegisterTableEntry buffer
  106. //
  107. UINT32 AllocatedSize;
  108. //
  109. // The initial APIC ID of the CPU this register table applies to
  110. //
  111. UINT32 InitialApicId;
  112. //
  113. // Physical address of CPU_REGISTER_TABLE_ENTRY structures.
  114. //
  115. EFI_PHYSICAL_ADDRESS RegisterTableEntry;
  116. } CPU_REGISTER_TABLE;
  117. //
  118. // Data structure that is used for CPU feature initialization during ACPI S3
  119. // resume.
  120. //
  121. typedef struct {
  122. //
  123. // Physical address of an array of CPU_REGISTER_TABLE structures, with
  124. // NumberOfCpus entries. If a register table is not required, then the
  125. // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
  126. // If TableLength is > 0, then elements of RegisterTableEntry are used to
  127. // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
  128. // before SMBASE relocation is performed.
  129. // If a register table is not required for any one of the CPUs, then
  130. // PreSmmInitRegisterTable may be set to 0.
  131. //
  132. EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;
  133. //
  134. // Physical address of an array of CPU_REGISTER_TABLE structures, with
  135. // NumberOfCpus entries. If a register table is not required, then the
  136. // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
  137. // If TableLength is > 0, then elements of RegisterTableEntry are used to
  138. // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
  139. // after SMBASE relocation is performed.
  140. // If a register table is not required for any one of the CPUs, then
  141. // RegisterTable may be set to 0.
  142. //
  143. EFI_PHYSICAL_ADDRESS RegisterTable;
  144. //
  145. // CPU information which is required when set the register table.
  146. //
  147. CPU_STATUS_INFORMATION CpuStatus;
  148. //
  149. // Location info for each AP.
  150. // It points to an array which saves all APs location info.
  151. // The array count is the AP count in this CPU.
  152. //
  153. // If the platform does not support MSR setting at S3 resume, and
  154. // therefore it doesn't need the dependency semaphores, it should set
  155. // this field to 0.
  156. //
  157. EFI_PHYSICAL_ADDRESS ApLocation;
  158. } CPU_FEATURE_INIT_DATA;
  159. //
  160. // Data structure that is required for ACPI S3 resume. The PCD
  161. // PcdCpuS3DataAddress must be set to the physical address where this structure
  162. // is allocated
  163. //
  164. typedef struct {
  165. //
  166. // Physical address of 4KB buffer allocated below 1MB from memory of type
  167. // EfiReservedMemoryType. The buffer is not required to be initialized, but
  168. // it is recommended that the buffer be zero-filled. This buffer is used to
  169. // wake APs during an ACPI S3 resume.
  170. //
  171. EFI_PHYSICAL_ADDRESS StartupVector;
  172. //
  173. // Physical address of structure of type IA32_DESCRIPTOR. The
  174. // IA32_DESCRIPTOR structure provides the base address and length of a GDT
  175. // The GDT must be filled in with the GDT contents that are
  176. // used during an ACPI S3 resume. This is typically the contents of the GDT
  177. // used by the boot processor when the platform is booted.
  178. //
  179. EFI_PHYSICAL_ADDRESS GdtrProfile;
  180. //
  181. // Physical address of structure of type IA32_DESCRIPTOR. The
  182. // IA32_DESCRIPTOR structure provides the base address and length of an IDT.
  183. // The IDT must be filled in with the IDT contents that are
  184. // used during an ACPI S3 resume. This is typically the contents of the IDT
  185. // used by the boot processor when the platform is booted.
  186. //
  187. EFI_PHYSICAL_ADDRESS IdtrProfile;
  188. //
  189. // Physical address of a buffer that is used as stacks during ACPI S3 resume.
  190. // The total size of this buffer, in bytes, is NumberOfCpus * StackSize. This
  191. // structure must be allocated from memory of type EfiACPIMemoryNVS.
  192. //
  193. EFI_PHYSICAL_ADDRESS StackAddress;
  194. //
  195. // The size, in bytes, of the stack provided to each CPU during ACPI S3 resume.
  196. //
  197. UINT32 StackSize;
  198. //
  199. // The number of CPUs. If a platform does not support hot plug CPUs, then
  200. // this is the number of CPUs detected when the platform is booted, regardless
  201. // of being enabled or disabled. If a platform does support hot plug CPUs,
  202. // then this is the maximum number of CPUs that the platform supports.
  203. //
  204. UINT32 NumberOfCpus;
  205. //
  206. // Physical address of structure of type MTRR_SETTINGS that contains a copy
  207. // of the MTRR settings that are compatible with the MTRR settings used by
  208. // the boot processor when the platform was booted. These MTRR settings are
  209. // used during an ACPI S3 resume.
  210. //
  211. EFI_PHYSICAL_ADDRESS MtrrTable;
  212. //
  213. // Physical address of a buffer that contains the machine check handler that
  214. // is used during an ACPI S3 Resume. In order for this machine check
  215. // handler to be active on an AP during an ACPI S3 resume, the machine check
  216. // vector in the IDT provided by IdtrProfile must be initialized to transfer
  217. // control to this physical address.
  218. //
  219. EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase;
  220. //
  221. // The size, in bytes, of the machine check handler that is used during an
  222. // ACPI S3 Resume. If this field is 0, then a machine check handler is not
  223. // provided.
  224. //
  225. UINT32 ApMachineCheckHandlerSize;
  226. //
  227. // Data structure that is used for CPU feature initialization during ACPI S3
  228. // resume.
  229. //
  230. CPU_FEATURE_INIT_DATA CpuFeatureInitData;
  231. } ACPI_CPU_DATA;
  232. #endif