VirtNorFlash.h 9.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345
  1. /** @file NorFlash.h
  2. Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef __VIRT_NOR_FLASH__
  6. #define __VIRT_NOR_FLASH__
  7. #include <Base.h>
  8. #include <PiDxe.h>
  9. #include <Guid/EventGroup.h>
  10. #include <Protocol/FirmwareVolumeBlock.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/IoLib.h>
  13. #include <Library/UefiLib.h>
  14. #include <Library/UefiRuntimeLib.h>
  15. #include <Library/VirtNorFlashPlatformLib.h>
  16. #define NOR_FLASH_ERASE_RETRY 10
  17. // Device access macros
  18. // These are necessary because we use 2 x 16bit parts to make up 32bit data
  19. #define HIGH_16_BITS 0xFFFF0000
  20. #define LOW_16_BITS 0x0000FFFF
  21. #define LOW_8_BITS 0x000000FF
  22. #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
  23. #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
  24. #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
  25. // Each command must be sent simultaneously to both chips,
  26. // i.e. at the lower 16 bits AND at the higher 16 bits
  27. #define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
  28. #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
  29. #define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
  30. #define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize) ( BaseAddr + (UINTN)((Lba) * LbaSize) )
  31. // Status Register Bits
  32. #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
  33. #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
  34. #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
  35. #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
  36. #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
  37. #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
  38. #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
  39. #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
  40. // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
  41. // On chip buffer size for buffered programming operations
  42. // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
  43. // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
  44. #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
  45. #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
  46. #define MAX_BUFFERED_PROG_ITERATIONS 10000000
  47. #define BOUNDARY_OF_32_WORDS 0x7F
  48. // CFI Addresses
  49. #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
  50. #define P30_CFI_ADDR_VENDOR_ID 0x13
  51. // CFI Data
  52. #define CFI_QRY 0x00595251
  53. // READ Commands
  54. #define P30_CMD_READ_DEVICE_ID 0x0090
  55. #define P30_CMD_READ_STATUS_REGISTER 0x0070
  56. #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
  57. #define P30_CMD_READ_ARRAY 0x00FF
  58. #define P30_CMD_READ_CFI_QUERY 0x0098
  59. // WRITE Commands
  60. #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
  61. #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
  62. #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
  63. #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
  64. #define P30_CMD_BEFP_SETUP 0x0080
  65. #define P30_CMD_BEFP_CONFIRM 0x00D0
  66. // ERASE Commands
  67. #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
  68. #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
  69. // SUSPEND Commands
  70. #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
  71. #define P30_CMD_SUSPEND_RESUME 0x00D0
  72. // BLOCK LOCKING / UNLOCKING Commands
  73. #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
  74. #define P30_CMD_LOCK_BLOCK 0x0001
  75. #define P30_CMD_UNLOCK_BLOCK 0x00D0
  76. #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
  77. // PROTECTION Commands
  78. #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
  79. // CONFIGURATION Commands
  80. #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
  81. #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
  82. #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
  83. #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
  84. typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
  85. #pragma pack (1)
  86. typedef struct {
  87. VENDOR_DEVICE_PATH Vendor;
  88. UINT8 Index;
  89. EFI_DEVICE_PATH_PROTOCOL End;
  90. } NOR_FLASH_DEVICE_PATH;
  91. #pragma pack ()
  92. struct _NOR_FLASH_INSTANCE {
  93. UINT32 Signature;
  94. EFI_HANDLE Handle;
  95. UINTN DeviceBaseAddress;
  96. UINTN RegionBaseAddress;
  97. UINTN Size;
  98. EFI_LBA StartLba;
  99. EFI_LBA LastBlock;
  100. UINT32 BlockSize;
  101. EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
  102. VOID *ShadowBuffer;
  103. NOR_FLASH_DEVICE_PATH DevicePath;
  104. };
  105. EFI_STATUS
  106. NorFlashReadCfiData (
  107. IN UINTN DeviceBaseAddress,
  108. IN UINTN CFI_Offset,
  109. IN UINT32 NumberOfBytes,
  110. OUT UINT32 *Data
  111. );
  112. EFI_STATUS
  113. NorFlashWriteBuffer (
  114. IN NOR_FLASH_INSTANCE *Instance,
  115. IN UINTN TargetAddress,
  116. IN UINTN BufferSizeInBytes,
  117. IN UINT32 *Buffer
  118. );
  119. //
  120. // NorFlashFvbDxe.c
  121. //
  122. EFI_STATUS
  123. EFIAPI
  124. FvbGetAttributes (
  125. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  126. OUT EFI_FVB_ATTRIBUTES_2 *Attributes
  127. );
  128. EFI_STATUS
  129. EFIAPI
  130. FvbSetAttributes (
  131. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  132. IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
  133. );
  134. EFI_STATUS
  135. EFIAPI
  136. FvbGetPhysicalAddress (
  137. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  138. OUT EFI_PHYSICAL_ADDRESS *Address
  139. );
  140. EFI_STATUS
  141. EFIAPI
  142. FvbGetBlockSize (
  143. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  144. IN EFI_LBA Lba,
  145. OUT UINTN *BlockSize,
  146. OUT UINTN *NumberOfBlocks
  147. );
  148. EFI_STATUS
  149. EFIAPI
  150. FvbRead (
  151. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  152. IN EFI_LBA Lba,
  153. IN UINTN Offset,
  154. IN OUT UINTN *NumBytes,
  155. IN OUT UINT8 *Buffer
  156. );
  157. EFI_STATUS
  158. EFIAPI
  159. FvbWrite (
  160. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  161. IN EFI_LBA Lba,
  162. IN UINTN Offset,
  163. IN OUT UINTN *NumBytes,
  164. IN UINT8 *Buffer
  165. );
  166. EFI_STATUS
  167. EFIAPI
  168. FvbEraseBlocks (
  169. IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
  170. ...
  171. );
  172. EFI_STATUS
  173. ValidateFvHeader (
  174. IN NOR_FLASH_INSTANCE *Instance
  175. );
  176. EFI_STATUS
  177. InitializeFvAndVariableStoreHeaders (
  178. IN NOR_FLASH_INSTANCE *Instance
  179. );
  180. VOID
  181. EFIAPI
  182. FvbVirtualNotifyEvent (
  183. IN EFI_EVENT Event,
  184. IN VOID *Context
  185. );
  186. //
  187. // NorFlashDxe.c
  188. //
  189. EFI_STATUS
  190. NorFlashWriteFullBlock (
  191. IN NOR_FLASH_INSTANCE *Instance,
  192. IN EFI_LBA Lba,
  193. IN UINT32 *DataBuffer,
  194. IN UINT32 BlockSizeInWords
  195. );
  196. EFI_STATUS
  197. NorFlashUnlockAndEraseSingleBlock (
  198. IN NOR_FLASH_INSTANCE *Instance,
  199. IN UINTN BlockAddress
  200. );
  201. EFI_STATUS
  202. NorFlashCreateInstance (
  203. IN UINTN NorFlashDeviceBase,
  204. IN UINTN NorFlashRegionBase,
  205. IN UINTN NorFlashSize,
  206. IN UINT32 Index,
  207. IN UINT32 BlockSize,
  208. IN BOOLEAN SupportFvb,
  209. OUT NOR_FLASH_INSTANCE **NorFlashInstance
  210. );
  211. EFI_STATUS
  212. EFIAPI
  213. NorFlashFvbInitialize (
  214. IN NOR_FLASH_INSTANCE *Instance
  215. );
  216. //
  217. // NorFlash.c
  218. //
  219. EFI_STATUS
  220. NorFlashWriteSingleBlock (
  221. IN NOR_FLASH_INSTANCE *Instance,
  222. IN EFI_LBA Lba,
  223. IN UINTN Offset,
  224. IN OUT UINTN *NumBytes,
  225. IN UINT8 *Buffer
  226. );
  227. EFI_STATUS
  228. NorFlashWriteBlocks (
  229. IN NOR_FLASH_INSTANCE *Instance,
  230. IN EFI_LBA Lba,
  231. IN UINTN BufferSizeInBytes,
  232. IN VOID *Buffer
  233. );
  234. EFI_STATUS
  235. NorFlashReadBlocks (
  236. IN NOR_FLASH_INSTANCE *Instance,
  237. IN EFI_LBA Lba,
  238. IN UINTN BufferSizeInBytes,
  239. OUT VOID *Buffer
  240. );
  241. EFI_STATUS
  242. NorFlashRead (
  243. IN NOR_FLASH_INSTANCE *Instance,
  244. IN EFI_LBA Lba,
  245. IN UINTN Offset,
  246. IN UINTN BufferSizeInBytes,
  247. OUT VOID *Buffer
  248. );
  249. EFI_STATUS
  250. NorFlashWrite (
  251. IN NOR_FLASH_INSTANCE *Instance,
  252. IN EFI_LBA Lba,
  253. IN UINTN Offset,
  254. IN OUT UINTN *NumBytes,
  255. IN UINT8 *Buffer
  256. );
  257. EFI_STATUS
  258. NorFlashReset (
  259. IN NOR_FLASH_INSTANCE *Instance
  260. );
  261. EFI_STATUS
  262. NorFlashEraseSingleBlock (
  263. IN NOR_FLASH_INSTANCE *Instance,
  264. IN UINTN BlockAddress
  265. );
  266. EFI_STATUS
  267. NorFlashUnlockSingleBlockIfNecessary (
  268. IN NOR_FLASH_INSTANCE *Instance,
  269. IN UINTN BlockAddress
  270. );
  271. EFI_STATUS
  272. NorFlashWriteSingleWord (
  273. IN NOR_FLASH_INSTANCE *Instance,
  274. IN UINTN WordAddress,
  275. IN UINT32 WriteData
  276. );
  277. VOID
  278. EFIAPI
  279. NorFlashVirtualNotifyEvent (
  280. IN EFI_EVENT Event,
  281. IN VOID *Context
  282. );
  283. #endif /* __VIRT_NOR_FLASH__ */