PciHotPlugInit.c 26 KB

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  1. /** @file
  2. This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL, providing the PCI bus
  3. driver with resource padding information, for PCIe hotplug purposes.
  4. Copyright (C) 2016, Red Hat, Inc.
  5. SPDX-License-Identifier: BSD-2-Clause-Patent
  6. **/
  7. #include <IndustryStandard/Acpi10.h>
  8. #include <IndustryStandard/Q35MchIch9.h>
  9. #include <IndustryStandard/QemuPciBridgeCapabilities.h>
  10. #include <Library/BaseLib.h>
  11. #include <Library/BaseMemoryLib.h>
  12. #include <Library/DebugLib.h>
  13. #include <Library/DevicePathLib.h>
  14. #include <Library/MemoryAllocationLib.h>
  15. #include <Library/PciCapLib.h>
  16. #include <Library/PciCapPciSegmentLib.h>
  17. #include <Library/PciLib.h>
  18. #include <Library/UefiBootServicesTableLib.h>
  19. #include <Protocol/PciHotPlugInit.h>
  20. #include <Protocol/PciRootBridgeIo.h>
  21. //
  22. // TRUE if the PCI platform supports extended config space, FALSE otherwise.
  23. //
  24. STATIC BOOLEAN mPciExtConfSpaceSupported;
  25. //
  26. // The protocol interface this driver produces.
  27. //
  28. // Refer to 12.6 "PCI Hot Plug PCI Initialization Protocol" in the Platform
  29. // Init 1.4a Spec, Volume 5.
  30. //
  31. STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;
  32. //
  33. // Resource padding template for the GetResourcePadding() protocol member
  34. // function.
  35. //
  36. // Refer to Table 8 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in
  37. // the Platform Init 1.4a Spec, Volume 5.
  38. //
  39. // This structure is interpreted by the ApplyResourcePadding() function in the
  40. // edk2 PCI Bus UEFI_DRIVER.
  41. //
  42. // We can request padding for at most four resource types, each of which is
  43. // optional, independently of the others:
  44. // (a) bus numbers,
  45. // (b) IO space,
  46. // (c) non-prefetchable MMIO space (32-bit only),
  47. // (d) prefetchable MMIO space (either 32-bit or 64-bit, never both).
  48. //
  49. #pragma pack (1)
  50. typedef struct {
  51. EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Padding[4];
  52. EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;
  53. } RESOURCE_PADDING;
  54. #pragma pack ()
  55. /**
  56. Initialize a RESOURCE_PADDING object.
  57. @param[out] ResourcePadding The caller-allocated RESOURCE_PADDING object to
  58. initialize.
  59. **/
  60. STATIC
  61. VOID
  62. InitializeResourcePadding (
  63. OUT RESOURCE_PADDING *ResourcePadding
  64. )
  65. {
  66. UINTN Index;
  67. ZeroMem (ResourcePadding, sizeof *ResourcePadding);
  68. //
  69. // Fill in the Padding fields that don't vary across resource types.
  70. //
  71. for (Index = 0; Index < ARRAY_SIZE (ResourcePadding->Padding); ++Index) {
  72. EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
  73. Descriptor = ResourcePadding->Padding + Index;
  74. Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
  75. Descriptor->Len = (UINT16)(
  76. sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
  77. OFFSET_OF (
  78. EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
  79. ResType
  80. )
  81. );
  82. }
  83. //
  84. // Fill in the End Tag.
  85. //
  86. ResourcePadding->EndDesc.Desc = ACPI_END_TAG_DESCRIPTOR;
  87. }
  88. /**
  89. Set up a descriptor entry for reserving IO space.
  90. @param[in,out] Descriptor The descriptor to configure. The caller shall have
  91. initialized Descriptor earlier, with
  92. InitializeResourcePadding().
  93. @param[in] SizeExponent The size and natural alignment of the reservation
  94. are determined by raising two to this power.
  95. **/
  96. STATIC
  97. VOID
  98. SetIoPadding (
  99. IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor,
  100. IN UINTN SizeExponent
  101. )
  102. {
  103. Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
  104. Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
  105. Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
  106. }
  107. /**
  108. Set up a descriptor entry for reserving MMIO space.
  109. @param[in,out] Descriptor The descriptor to configure. The caller shall
  110. have initialized Descriptor earlier, with
  111. InitializeResourcePadding().
  112. @param[in] Prefetchable TRUE if the descriptor should reserve
  113. prefetchable MMIO space. Pass FALSE for
  114. reserving non-prefetchable MMIO space.
  115. @param[in] ThirtyTwoBitOnly TRUE if the reservation should be limited to
  116. 32-bit address space. FALSE if the reservation
  117. can be satisfied from 64-bit address space.
  118. ThirtyTwoBitOnly is ignored if Prefetchable is
  119. FALSE; in that case ThirtyTwoBitOnly is always
  120. considered TRUE.
  121. @param[in] SizeExponent The size and natural alignment of the
  122. reservation are determined by raising two to
  123. this power.
  124. **/
  125. STATIC
  126. VOID
  127. SetMmioPadding (
  128. IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor,
  129. IN BOOLEAN Prefetchable,
  130. IN BOOLEAN ThirtyTwoBitOnly,
  131. IN UINTN SizeExponent
  132. )
  133. {
  134. Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
  135. if (Prefetchable) {
  136. Descriptor->SpecificFlag =
  137. EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
  138. Descriptor->AddrSpaceGranularity = ThirtyTwoBitOnly ? 32 : 64;
  139. } else {
  140. Descriptor->SpecificFlag =
  141. EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;
  142. Descriptor->AddrSpaceGranularity = 32;
  143. }
  144. Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
  145. Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
  146. }
  147. /**
  148. Round up a positive 32-bit value to the next whole power of two, and return
  149. the bit position of the highest bit set in the result. Equivalent to
  150. ceil(log2(x)).
  151. @param[in] Operand The 32-bit operand to evaluate.
  152. @retval -1 Operand is zero.
  153. @retval -1 Operand is positive, not a whole power of two, and rounding it
  154. up to the next power of two does not fit into 32 bits.
  155. @retval 0..31 Otherwise, return ceil(log2(Value)).
  156. **/
  157. STATIC
  158. INTN
  159. HighBitSetRoundUp32 (
  160. IN UINT32 Operand
  161. )
  162. {
  163. INTN HighBit;
  164. HighBit = HighBitSet32 (Operand);
  165. if (HighBit == -1) {
  166. //
  167. // Operand is zero.
  168. //
  169. return HighBit;
  170. }
  171. if ((Operand & (Operand - 1)) != 0) {
  172. //
  173. // Operand is not a whole power of two.
  174. //
  175. ++HighBit;
  176. }
  177. return (HighBit < 32) ? HighBit : -1;
  178. }
  179. /**
  180. Round up a positive 64-bit value to the next whole power of two, and return
  181. the bit position of the highest bit set in the result. Equivalent to
  182. ceil(log2(x)).
  183. @param[in] Operand The 64-bit operand to evaluate.
  184. @retval -1 Operand is zero.
  185. @retval -1 Operand is positive, not a whole power of two, and rounding it
  186. up to the next power of two does not fit into 64 bits.
  187. @retval 0..63 Otherwise, return ceil(log2(Value)).
  188. **/
  189. STATIC
  190. INTN
  191. HighBitSetRoundUp64 (
  192. IN UINT64 Operand
  193. )
  194. {
  195. INTN HighBit;
  196. HighBit = HighBitSet64 (Operand);
  197. if (HighBit == -1) {
  198. //
  199. // Operand is zero.
  200. //
  201. return HighBit;
  202. }
  203. if ((Operand & (Operand - 1)) != 0) {
  204. //
  205. // Operand is not a whole power of two.
  206. //
  207. ++HighBit;
  208. }
  209. return (HighBit < 64) ? HighBit : -1;
  210. }
  211. /**
  212. Look up the QEMU-specific Resource Reservation capability in the conventional
  213. config space of a Hotplug Controller (that is, PCI Bridge).
  214. On error, the contents of ReservationHint are indeterminate.
  215. @param[in] HpcPciAddress The address of the PCI Bridge -- Bus, Device,
  216. Function -- in UEFI (not PciLib) encoding.
  217. @param[out] ReservationHint The caller-allocated capability structure to
  218. populate from the PCI Bridge's config space.
  219. @retval EFI_SUCCESS The capability has been found, ReservationHint has
  220. been populated.
  221. @retval EFI_NOT_FOUND The capability is missing.
  222. @return Error codes from PciCapPciSegmentLib and PciCapLib.
  223. **/
  224. STATIC
  225. EFI_STATUS
  226. QueryReservationHint (
  227. IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *HpcPciAddress,
  228. OUT QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION *ReservationHint
  229. )
  230. {
  231. UINT16 PciVendorId;
  232. EFI_STATUS Status;
  233. PCI_CAP_DEV *PciDevice;
  234. PCI_CAP_LIST *CapList;
  235. UINT16 VendorInstance;
  236. PCI_CAP *VendorCap;
  237. //
  238. // Check the vendor identifier.
  239. //
  240. PciVendorId = PciRead16 (
  241. PCI_LIB_ADDRESS (
  242. HpcPciAddress->Bus,
  243. HpcPciAddress->Device,
  244. HpcPciAddress->Function,
  245. PCI_VENDOR_ID_OFFSET
  246. )
  247. );
  248. if (PciVendorId != QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT) {
  249. return EFI_NOT_FOUND;
  250. }
  251. //
  252. // Parse the capabilities lists.
  253. //
  254. Status = PciCapPciSegmentDeviceInit (
  255. mPciExtConfSpaceSupported ? PciCapExtended : PciCapNormal,
  256. 0, // Segment
  257. HpcPciAddress->Bus,
  258. HpcPciAddress->Device,
  259. HpcPciAddress->Function,
  260. &PciDevice
  261. );
  262. if (EFI_ERROR (Status)) {
  263. return Status;
  264. }
  265. Status = PciCapListInit (PciDevice, &CapList);
  266. if (EFI_ERROR (Status)) {
  267. goto UninitPciDevice;
  268. }
  269. //
  270. // Scan the vendor capability instances for the Resource Reservation
  271. // capability.
  272. //
  273. VendorInstance = 0;
  274. for ( ; ;) {
  275. UINT8 VendorLength;
  276. UINT8 BridgeCapType;
  277. Status = PciCapListFindCap (
  278. CapList,
  279. PciCapNormal,
  280. EFI_PCI_CAPABILITY_ID_VENDOR,
  281. VendorInstance++,
  282. &VendorCap
  283. );
  284. if (EFI_ERROR (Status)) {
  285. goto UninitCapList;
  286. }
  287. //
  288. // Check the vendor capability length.
  289. //
  290. Status = PciCapRead (
  291. PciDevice,
  292. VendorCap,
  293. OFFSET_OF (EFI_PCI_CAPABILITY_VENDOR_HDR, Length),
  294. &VendorLength,
  295. sizeof VendorLength
  296. );
  297. if (EFI_ERROR (Status)) {
  298. goto UninitCapList;
  299. }
  300. if (VendorLength != sizeof *ReservationHint) {
  301. continue;
  302. }
  303. //
  304. // Check the vendor bridge capability type.
  305. //
  306. Status = PciCapRead (
  307. PciDevice,
  308. VendorCap,
  309. OFFSET_OF (QEMU_PCI_BRIDGE_CAPABILITY_HDR, Type),
  310. &BridgeCapType,
  311. sizeof BridgeCapType
  312. );
  313. if (EFI_ERROR (Status)) {
  314. goto UninitCapList;
  315. }
  316. if (BridgeCapType ==
  317. QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION)
  318. {
  319. //
  320. // We have a match.
  321. //
  322. break;
  323. }
  324. }
  325. //
  326. // Populate ReservationHint.
  327. //
  328. Status = PciCapRead (
  329. PciDevice,
  330. VendorCap,
  331. 0, // SourceOffsetInCap
  332. ReservationHint,
  333. sizeof *ReservationHint
  334. );
  335. UninitCapList:
  336. PciCapListUninit (CapList);
  337. UninitPciDevice:
  338. PciCapPciSegmentDeviceUninit (PciDevice);
  339. return Status;
  340. }
  341. /**
  342. Returns a list of root Hot Plug Controllers (HPCs) that require
  343. initialization during the boot process.
  344. This procedure returns a list of root HPCs. The PCI bus driver must
  345. initialize these controllers during the boot process. The PCI bus driver may
  346. or may not be able to detect these HPCs. If the platform includes a
  347. PCI-to-CardBus bridge, it can be included in this list if it requires
  348. initialization. The HpcList must be self consistent. An HPC cannot control
  349. any of its parent buses. Only one HPC can control a PCI bus. Because this
  350. list includes only root HPCs, no HPC in the list can be a child of another
  351. HPC. This policy must be enforced by the EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
  352. The PCI bus driver may not check for such invalid conditions. The callee
  353. allocates the buffer HpcList
  354. @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
  355. instance.
  356. @param[out] HpcCount The number of root HPCs that were returned.
  357. @param[out] HpcList The list of root HPCs. HpcCount defines the number of
  358. elements in this list.
  359. @retval EFI_SUCCESS HpcList was returned.
  360. @retval EFI_OUT_OF_RESOURCES HpcList was not returned due to insufficient
  361. resources.
  362. @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
  363. **/
  364. STATIC
  365. EFI_STATUS
  366. EFIAPI
  367. GetRootHpcList (
  368. IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
  369. OUT UINTN *HpcCount,
  370. OUT EFI_HPC_LOCATION **HpcList
  371. )
  372. {
  373. if ((HpcCount == NULL) || (HpcList == NULL)) {
  374. return EFI_INVALID_PARAMETER;
  375. }
  376. //
  377. // There are no top-level (i.e., un-enumerable) hot-plug controllers in QEMU
  378. // that would require special initialization.
  379. //
  380. *HpcCount = 0;
  381. *HpcList = NULL;
  382. return EFI_SUCCESS;
  383. }
  384. /**
  385. Initializes one root Hot Plug Controller (HPC). This process may causes
  386. initialization of its subordinate buses.
  387. This function initializes the specified HPC. At the end of initialization,
  388. the hot-plug slots or sockets (controlled by this HPC) are powered and are
  389. connected to the bus. All the necessary registers in the HPC are set up. For
  390. a Standard (PCI) Hot Plug Controller (SHPC), the registers that must be set
  391. up are defined in the PCI Standard Hot Plug Controller and Subsystem
  392. Specification.
  393. @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
  394. instance.
  395. @param[in] HpcDevicePath The device path to the HPC that is being
  396. initialized.
  397. @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
  398. @param[in] Event The event that should be signaled when the HPC
  399. initialization is complete. Set to NULL if the
  400. caller wants to wait until the entire
  401. initialization process is complete.
  402. @param[out] HpcState The state of the HPC hardware. The state is
  403. EFI_HPC_STATE_INITIALIZED or
  404. EFI_HPC_STATE_ENABLED.
  405. @retval EFI_SUCCESS If Event is NULL, the specific HPC was
  406. successfully initialized. If Event is not
  407. NULL, Event will be signaled at a later time
  408. when initialization is complete.
  409. @retval EFI_UNSUPPORTED This instance of
  410. EFI_PCI_HOT_PLUG_INIT_PROTOCOL does not
  411. support the specified HPC.
  412. @retval EFI_OUT_OF_RESOURCES Initialization failed due to insufficient
  413. resources.
  414. @retval EFI_INVALID_PARAMETER HpcState is NULL.
  415. **/
  416. STATIC
  417. EFI_STATUS
  418. EFIAPI
  419. InitializeRootHpc (
  420. IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
  421. IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
  422. IN UINT64 HpcPciAddress,
  423. IN EFI_EVENT Event OPTIONAL,
  424. OUT EFI_HPC_STATE *HpcState
  425. )
  426. {
  427. //
  428. // This function should never be called, due to the information returned by
  429. // GetRootHpcList().
  430. //
  431. ASSERT (FALSE);
  432. if (HpcState == NULL) {
  433. return EFI_INVALID_PARAMETER;
  434. }
  435. return EFI_UNSUPPORTED;
  436. }
  437. /**
  438. Returns the resource padding that is required by the PCI bus that is
  439. controlled by the specified Hot Plug Controller (HPC).
  440. This function returns the resource padding that is required by the PCI bus
  441. that is controlled by the specified HPC. This member function is called for
  442. all the root HPCs and nonroot HPCs that are detected by the PCI bus
  443. enumerator. This function will be called before PCI resource allocation is
  444. completed. This function must be called after all the root HPCs, with the
  445. possible exception of a PCI-to-CardBus bridge, have completed
  446. initialization.
  447. @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
  448. instance.
  449. @param[in] HpcDevicePath The device path to the HPC.
  450. @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
  451. @param[in] HpcState The state of the HPC hardware.
  452. @param[out] Padding The amount of resource padding that is required
  453. by the PCI bus under the control of the specified
  454. HPC.
  455. @param[out] Attributes Describes how padding is accounted for. The
  456. padding is returned in the form of ACPI 2.0
  457. resource descriptors.
  458. @retval EFI_SUCCESS The resource padding was successfully
  459. returned.
  460. @retval EFI_UNSUPPORTED This instance of the
  461. EFI_PCI_HOT_PLUG_INIT_PROTOCOL does not
  462. support the specified HPC.
  463. @retval EFI_NOT_READY This function was called before HPC
  464. initialization is complete.
  465. @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is NULL.
  466. @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for Padding
  467. cannot be allocated due to insufficient
  468. resources.
  469. **/
  470. STATIC
  471. EFI_STATUS
  472. EFIAPI
  473. GetResourcePadding (
  474. IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
  475. IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
  476. IN UINT64 HpcPciAddress,
  477. OUT EFI_HPC_STATE *HpcState,
  478. OUT VOID **Padding,
  479. OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
  480. )
  481. {
  482. EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address;
  483. BOOLEAN DefaultIo;
  484. BOOLEAN DefaultMmio;
  485. BOOLEAN DefaultPrefMmio;
  486. RESOURCE_PADDING ReservationRequest;
  487. EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *FirstResource;
  488. EFI_STATUS ReservationHintStatus;
  489. QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION ReservationHint;
  490. Address = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddress;
  491. DEBUG_CODE_BEGIN ();
  492. CHAR16 *DevicePathString;
  493. DevicePathString = ConvertDevicePathToText (HpcDevicePath, FALSE, FALSE);
  494. DEBUG ((
  495. DEBUG_VERBOSE,
  496. "%a: Address=%02x:%02x.%x DevicePath=%s\n",
  497. __FUNCTION__,
  498. Address->Bus,
  499. Address->Device,
  500. Address->Function,
  501. (DevicePathString == NULL) ? L"<unavailable>" : DevicePathString
  502. ));
  503. if (DevicePathString != NULL) {
  504. FreePool (DevicePathString);
  505. }
  506. DEBUG_CODE_END ();
  507. if ((HpcState == NULL) || (Padding == NULL) || (Attributes == NULL)) {
  508. return EFI_INVALID_PARAMETER;
  509. }
  510. DefaultIo = TRUE;
  511. DefaultMmio = TRUE;
  512. DefaultPrefMmio = TRUE;
  513. //
  514. // Init ReservationRequest, and point FirstResource one past the last
  515. // descriptor entry. We're going to build the entries backwards from
  516. // ReservationRequest.EndDesc.
  517. //
  518. InitializeResourcePadding (&ReservationRequest);
  519. FirstResource = ReservationRequest.Padding +
  520. ARRAY_SIZE (ReservationRequest.Padding);
  521. //
  522. // Try to get the QEMU-specific Resource Reservation capability.
  523. //
  524. ReservationHintStatus = QueryReservationHint (Address, &ReservationHint);
  525. if (!EFI_ERROR (ReservationHintStatus)) {
  526. INTN HighBit;
  527. DEBUG ((
  528. DEBUG_VERBOSE,
  529. "%a: BusNumbers=0x%x Io=0x%Lx NonPrefetchable32BitMmio=0x%x\n"
  530. "%a: Prefetchable32BitMmio=0x%x Prefetchable64BitMmio=0x%Lx\n",
  531. __FUNCTION__,
  532. ReservationHint.BusNumbers,
  533. ReservationHint.Io,
  534. ReservationHint.NonPrefetchable32BitMmio,
  535. __FUNCTION__,
  536. ReservationHint.Prefetchable32BitMmio,
  537. ReservationHint.Prefetchable64BitMmio
  538. ));
  539. //
  540. // (a) Reserve bus numbers.
  541. //
  542. switch (ReservationHint.BusNumbers) {
  543. case 0:
  544. //
  545. // No reservation needed.
  546. //
  547. break;
  548. case MAX_UINT32:
  549. //
  550. // Firmware default (unspecified). Treat it as "no reservation needed".
  551. //
  552. break;
  553. default:
  554. //
  555. // Request the specified amount.
  556. //
  557. --FirstResource;
  558. FirstResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
  559. FirstResource->AddrLen = ReservationHint.BusNumbers;
  560. break;
  561. }
  562. //
  563. // (b) Reserve IO space.
  564. //
  565. switch (ReservationHint.Io) {
  566. case 0:
  567. //
  568. // No reservation needed, disable our built-in.
  569. //
  570. DefaultIo = FALSE;
  571. break;
  572. case MAX_UINT64:
  573. //
  574. // Firmware default (unspecified). Stick with our built-in.
  575. //
  576. break;
  577. default:
  578. //
  579. // Round the specified amount up to the next power of two. If rounding is
  580. // successful, reserve the rounded value. Fall back to the default
  581. // otherwise.
  582. //
  583. HighBit = HighBitSetRoundUp64 (ReservationHint.Io);
  584. if (HighBit != -1) {
  585. SetIoPadding (--FirstResource, (UINTN)HighBit);
  586. DefaultIo = FALSE;
  587. }
  588. break;
  589. }
  590. //
  591. // (c) Reserve non-prefetchable MMIO space (32-bit only).
  592. //
  593. switch (ReservationHint.NonPrefetchable32BitMmio) {
  594. case 0:
  595. //
  596. // No reservation needed, disable our built-in.
  597. //
  598. DefaultMmio = FALSE;
  599. break;
  600. case MAX_UINT32:
  601. //
  602. // Firmware default (unspecified). Stick with our built-in.
  603. //
  604. break;
  605. default:
  606. //
  607. // Round the specified amount up to the next power of two. If rounding is
  608. // successful, reserve the rounded value. Fall back to the default
  609. // otherwise.
  610. //
  611. HighBit = HighBitSetRoundUp32 (ReservationHint.NonPrefetchable32BitMmio);
  612. if (HighBit != -1) {
  613. SetMmioPadding (--FirstResource, FALSE, TRUE, (UINTN)HighBit);
  614. DefaultMmio = FALSE;
  615. }
  616. break;
  617. }
  618. //
  619. // (d) Reserve prefetchable MMIO space (either 32-bit or 64-bit, never
  620. // both).
  621. //
  622. // For either space, we treat 0 as "no reservation needed", and the maximum
  623. // value as "firmware default". The latter is unspecified, and we interpret
  624. // it as the former.
  625. //
  626. // Otherwise, round the specified amount up to the next power of two. If
  627. // rounding is successful, reserve the rounded value. Do not reserve
  628. // prefetchable MMIO space otherwise.
  629. //
  630. if ((ReservationHint.Prefetchable32BitMmio > 0) &&
  631. (ReservationHint.Prefetchable32BitMmio < MAX_UINT32))
  632. {
  633. HighBit = HighBitSetRoundUp32 (ReservationHint.Prefetchable32BitMmio);
  634. if (HighBit != -1) {
  635. SetMmioPadding (--FirstResource, TRUE, TRUE, (UINTN)HighBit);
  636. DefaultPrefMmio = FALSE;
  637. }
  638. } else if ((ReservationHint.Prefetchable64BitMmio > 0) &&
  639. (ReservationHint.Prefetchable64BitMmio < MAX_UINT64))
  640. {
  641. HighBit = HighBitSetRoundUp64 (ReservationHint.Prefetchable64BitMmio);
  642. if (HighBit != -1) {
  643. SetMmioPadding (--FirstResource, TRUE, FALSE, (UINTN)HighBit);
  644. DefaultPrefMmio = FALSE;
  645. }
  646. }
  647. }
  648. if (DefaultIo) {
  649. //
  650. // Request defaults.
  651. //
  652. SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512));
  653. }
  654. if (DefaultMmio) {
  655. //
  656. // Request defaults.
  657. //
  658. SetMmioPadding (
  659. --FirstResource,
  660. FALSE,
  661. TRUE,
  662. (UINTN)HighBitSetRoundUp32 (SIZE_2MB)
  663. );
  664. }
  665. if (DefaultPrefMmio) {
  666. UINT64 Pci64Size = PcdGet64 (PcdPciMmio64Size);
  667. if (Pci64Size > SIZE_32GB) {
  668. SetMmioPadding (
  669. --FirstResource,
  670. TRUE,
  671. FALSE,
  672. (UINTN)HighBitSetRoundUp64 (RShiftU64 (Pci64Size, 8))
  673. );
  674. }
  675. }
  676. //
  677. // Output a copy of ReservationRequest from the lowest-address populated
  678. // entry until the end of the structure (including
  679. // ReservationRequest.EndDesc). If no reservations are necessary, we'll only
  680. // output the End Tag.
  681. //
  682. *Padding = AllocateCopyPool (
  683. (UINT8 *)(&ReservationRequest + 1) - (UINT8 *)FirstResource,
  684. FirstResource
  685. );
  686. if (*Padding == NULL) {
  687. return EFI_OUT_OF_RESOURCES;
  688. }
  689. //
  690. // Resource padding is required.
  691. //
  692. *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
  693. //
  694. // The padding should be applied at PCI bus level, and considered by upstream
  695. // bridges, recursively.
  696. //
  697. *Attributes = EfiPaddingPciBus;
  698. return EFI_SUCCESS;
  699. }
  700. /**
  701. Entry point for this driver.
  702. @param[in] ImageHandle Image handle of this driver.
  703. @param[in] SystemTable Pointer to SystemTable.
  704. @retval EFI_SUCESS Driver has loaded successfully.
  705. @return Error codes from lower level functions.
  706. **/
  707. EFI_STATUS
  708. EFIAPI
  709. DriverInitialize (
  710. IN EFI_HANDLE ImageHandle,
  711. IN EFI_SYSTEM_TABLE *SystemTable
  712. )
  713. {
  714. EFI_STATUS Status;
  715. mPciExtConfSpaceSupported = (PcdGet16 (PcdOvmfHostBridgePciDevId) ==
  716. INTEL_Q35_MCH_DEVICE_ID);
  717. mPciHotPlugInit.GetRootHpcList = GetRootHpcList;
  718. mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;
  719. mPciHotPlugInit.GetResourcePadding = GetResourcePadding;
  720. Status = gBS->InstallMultipleProtocolInterfaces (
  721. &ImageHandle,
  722. &gEfiPciHotPlugInitProtocolGuid,
  723. &mPciHotPlugInit,
  724. NULL
  725. );
  726. return Status;
  727. }