AmdSevDxe.c 5.3 KB

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  1. /** @file
  2. AMD Sev Dxe driver. This driver is dispatched early in DXE, due to being list
  3. in APRIORI. It clears C-bit from MMIO and NonExistent Memory space when SEV
  4. is enabled.
  5. Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>
  6. SPDX-License-Identifier: BSD-2-Clause-Patent
  7. **/
  8. #include <IndustryStandard/Q35MchIch9.h>
  9. #include <Library/BaseLib.h>
  10. #include <Library/BaseMemoryLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/DxeServicesTableLib.h>
  13. #include <Library/MemEncryptSevLib.h>
  14. #include <Library/MemoryAllocationLib.h>
  15. #include <Library/UefiBootServicesTableLib.h>
  16. #include <Guid/ConfidentialComputingSevSnpBlob.h>
  17. #include <Library/PcdLib.h>
  18. STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION mSnpBootDxeTable = {
  19. SIGNATURE_32 ('A', 'M', 'D', 'E'),
  20. 1,
  21. 0,
  22. (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase),
  23. FixedPcdGet32 (PcdOvmfSnpSecretsSize),
  24. (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase),
  25. FixedPcdGet32 (PcdOvmfCpuidSize),
  26. };
  27. EFI_STATUS
  28. EFIAPI
  29. AmdSevDxeEntryPoint (
  30. IN EFI_HANDLE ImageHandle,
  31. IN EFI_SYSTEM_TABLE *SystemTable
  32. )
  33. {
  34. EFI_STATUS Status;
  35. EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
  36. UINTN NumEntries;
  37. UINTN Index;
  38. //
  39. // Do nothing when SEV is not enabled
  40. //
  41. if (!MemEncryptSevIsEnabled ()) {
  42. return EFI_UNSUPPORTED;
  43. }
  44. //
  45. // Iterate through the GCD map and clear the C-bit from MMIO and NonExistent
  46. // memory space. The NonExistent memory space will be used for mapping the
  47. // MMIO space added later (eg PciRootBridge). By clearing both known MMIO and
  48. // NonExistent memory space can gurantee that current and furture MMIO adds
  49. // will have C-bit cleared.
  50. //
  51. Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);
  52. if (!EFI_ERROR (Status)) {
  53. for (Index = 0; Index < NumEntries; Index++) {
  54. CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
  55. Desc = &AllDescMap[Index];
  56. if ((Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) ||
  57. (Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent))
  58. {
  59. Status = MemEncryptSevClearMmioPageEncMask (
  60. 0,
  61. Desc->BaseAddress,
  62. EFI_SIZE_TO_PAGES (Desc->Length)
  63. );
  64. ASSERT_EFI_ERROR (Status);
  65. }
  66. }
  67. FreePool (AllDescMap);
  68. }
  69. //
  70. // If PCI Express is enabled, the MMCONFIG area has been reserved, rather
  71. // than marked as MMIO, and so the C-bit won't be cleared by the above walk
  72. // through the GCD map. Check for the MMCONFIG area and clear the C-bit for
  73. // the range.
  74. //
  75. if (PcdGet16 (PcdOvmfHostBridgePciDevId) == INTEL_Q35_MCH_DEVICE_ID) {
  76. Status = MemEncryptSevClearMmioPageEncMask (
  77. 0,
  78. FixedPcdGet64 (PcdPciExpressBaseAddress),
  79. EFI_SIZE_TO_PAGES (SIZE_256MB)
  80. );
  81. ASSERT_EFI_ERROR (Status);
  82. }
  83. //
  84. // When SMM is enabled, clear the C-bit from SMM Saved State Area
  85. //
  86. // NOTES: The SavedStateArea address cleared here is before SMBASE
  87. // relocation. Currently, we do not clear the SavedStateArea address after
  88. // SMBASE is relocated due to the following reasons:
  89. //
  90. // 1) Guest BIOS never access the relocated SavedStateArea.
  91. //
  92. // 2) The C-bit works on page-aligned address, but the SavedStateArea
  93. // address is not a page-aligned. Theoretically, we could roundup the address
  94. // and clear the C-bit of aligned address but looking carefully we found
  95. // that some portion of the page contains code -- which will causes a bigger
  96. // issues for SEV guest. When SEV is enabled, all the code must be encrypted
  97. // otherwise hardware will cause trap.
  98. //
  99. // We restore the C-bit for this SMM Saved State Area after SMBASE relocation
  100. // is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).
  101. //
  102. if (FeaturePcdGet (PcdSmmSmramRequire)) {
  103. UINTN MapPagesBase;
  104. UINTN MapPagesCount;
  105. Status = MemEncryptSevLocateInitialSmramSaveStateMapPages (
  106. &MapPagesBase,
  107. &MapPagesCount
  108. );
  109. ASSERT_EFI_ERROR (Status);
  110. //
  111. // Although these pages were set aside (i.e., allocated) by PlatformPei, we
  112. // could be after a warm reboot from the OS. Don't leak any stale OS data
  113. // to the hypervisor.
  114. //
  115. ZeroMem ((VOID *)MapPagesBase, EFI_PAGES_TO_SIZE (MapPagesCount));
  116. Status = MemEncryptSevClearPageEncMask (
  117. 0, // Cr3BaseAddress -- use current CR3
  118. MapPagesBase, // BaseAddress
  119. MapPagesCount // NumPages
  120. );
  121. if (EFI_ERROR (Status)) {
  122. DEBUG ((
  123. DEBUG_ERROR,
  124. "%a: MemEncryptSevClearPageEncMask(): %r\n",
  125. __FUNCTION__,
  126. Status
  127. ));
  128. ASSERT (FALSE);
  129. CpuDeadLoop ();
  130. }
  131. }
  132. //
  133. // If its SEV-SNP active guest then install the CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB.
  134. // It contains the location for both the Secrets and CPUID page.
  135. //
  136. if (MemEncryptSevSnpIsEnabled ()) {
  137. return gBS->InstallConfigurationTable (
  138. &gConfidentialComputingSevSnpBlobGuid,
  139. &mSnpBootDxeTable
  140. );
  141. }
  142. return EFI_SUCCESS;
  143. }