123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224 |
- /** @file
- Copyright (c) 2011-2017, ARM Limited. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
- **/
- #include <PiPei.h>
- #include <Library/CacheMaintenanceLib.h>
- #include <Library/DebugAgentLib.h>
- #include <Library/PrePiLib.h>
- #include <Library/PrintLib.h>
- #include <Library/PrePiHobListPointerLib.h>
- #include <Library/TimerLib.h>
- #include <Library/PerformanceLib.h>
- #include <Ppi/GuidedSectionExtraction.h>
- #include <Ppi/ArmMpCoreInfo.h>
- #include <Ppi/SecPerformance.h>
- #include "PrePi.h"
- #define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) ||\
- ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= FixedPcdGet64 (PcdSystemMemoryBase)))
- UINT64 mSystemMemoryEnd = FixedPcdGet64 (PcdSystemMemoryBase) +
- FixedPcdGet64 (PcdSystemMemorySize) - 1;
- EFI_STATUS
- GetPlatformPpi (
- IN EFI_GUID *PpiGuid,
- OUT VOID **Ppi
- )
- {
- UINTN PpiListSize;
- UINTN PpiListCount;
- EFI_PEI_PPI_DESCRIPTOR *PpiList;
- UINTN Index;
- PpiListSize = 0;
- ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);
- PpiListCount = PpiListSize / sizeof (EFI_PEI_PPI_DESCRIPTOR);
- for (Index = 0; Index < PpiListCount; Index++, PpiList++) {
- if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {
- *Ppi = PpiList->Ppi;
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
- }
- VOID
- PrePiMain (
- IN UINTN UefiMemoryBase,
- IN UINTN StacksBase,
- IN UINT64 StartTimeStamp
- )
- {
- EFI_HOB_HANDOFF_INFO_TABLE *HobList;
- ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
- UINTN ArmCoreCount;
- ARM_CORE_INFO *ArmCoreInfoTable;
- EFI_STATUS Status;
- CHAR8 Buffer[100];
- UINTN CharCount;
- UINTN StacksSize;
- FIRMWARE_SEC_PERFORMANCE Performance;
- // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
- ASSERT (
- IS_XIP () ||
- ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
- ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd))
- );
- // Initialize the architecture specific bits
- ArchInitialize ();
- // Initialize the Serial Port
- SerialPortInitialize ();
- CharCount = AsciiSPrint (
- Buffer,
- sizeof (Buffer),
- "UEFI firmware (version %s built at %a on %a)\n\r",
- (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString),
- __TIME__,
- __DATE__
- );
- SerialPortWrite ((UINT8 *)Buffer, CharCount);
- // Initialize the Debug Agent for Source Level Debugging
- InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
- SaveAndSetDebugTimerInterrupt (TRUE);
- // Declare the PI/UEFI memory region
- HobList = HobConstructor (
- (VOID *)UefiMemoryBase,
- FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
- (VOID *)UefiMemoryBase,
- (VOID *)StacksBase // The top of the UEFI Memory is reserved for the stacks
- );
- PrePeiSetHobList (HobList);
- // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
- Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
- ASSERT_EFI_ERROR (Status);
- // Create the Stacks HOB (reserve the memory for all stacks)
- if (ArmIsMpCore ()) {
- StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) +
- ((FixedPcdGet32 (PcdCoreCount) - 1) * FixedPcdGet32 (PcdCPUCoreSecondaryStackSize));
- } else {
- StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
- }
- BuildStackHob (StacksBase, StacksSize);
- // TODO: Call CpuPei as a library
- BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
- if (ArmIsMpCore ()) {
- // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
- Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID **)&ArmMpCoreInfoPpi);
- // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
- ASSERT_EFI_ERROR (Status);
- // Build the MP Core Info Table
- ArmCoreCount = 0;
- Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
- if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {
- // Build MPCore Info HOB
- BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
- }
- }
- // Store timer value logged at the beginning of firmware image execution
- Performance.ResetEnd = GetTimeInNanoSecond (StartTimeStamp);
- // Build SEC Performance Data Hob
- BuildGuidDataHob (&gEfiFirmwarePerformanceGuid, &Performance, sizeof (Performance));
- // Set the Boot Mode
- SetBootMode (ArmPlatformGetBootMode ());
- // Initialize Platform HOBs (CpuHob and FvHob)
- Status = PlatformPeim ();
- ASSERT_EFI_ERROR (Status);
- // Now, the HOB List has been initialized, we can register performance information
- PERF_START (NULL, "PEI", NULL, StartTimeStamp);
- // SEC phase needs to run library constructors by hand.
- ProcessLibraryConstructorList ();
- // Assume the FV that contains the SEC (our code) also contains a compressed FV.
- Status = DecompressFirstFv ();
- ASSERT_EFI_ERROR (Status);
- // Load the DXE Core and transfer control to it
- Status = LoadDxeCoreFromFv (NULL, 0);
- ASSERT_EFI_ERROR (Status);
- }
- VOID
- CEntryPoint (
- IN UINTN MpId,
- IN UINTN UefiMemoryBase,
- IN UINTN StacksBase
- )
- {
- UINT64 StartTimeStamp;
- // Initialize the platform specific controllers
- ArmPlatformInitialize (MpId);
- if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) {
- // Initialize the Timer Library to setup the Timer HW controller
- TimerConstructor ();
- // We cannot call yet the PerformanceLib because the HOB List has not been initialized
- StartTimeStamp = GetPerformanceCounter ();
- } else {
- StartTimeStamp = 0;
- }
- // Data Cache enabled on Primary core when MMU is enabled.
- ArmDisableDataCache ();
- // Invalidate instruction cache
- ArmInvalidateInstructionCache ();
- // Enable Instruction Caches on all cores.
- ArmEnableInstructionCache ();
- // Define the Global Variable region when we are not running in XIP
- if (!IS_XIP ()) {
- if (ArmPlatformIsPrimaryCore (MpId)) {
- if (ArmIsMpCore ()) {
- // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
- ArmCallSEV ();
- }
- } else {
- // Wait the Primary core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)
- ArmCallWFE ();
- }
- }
- // If not primary Jump to Secondary Main
- if (ArmPlatformIsPrimaryCore (MpId)) {
- InvalidateDataCacheRange (
- (VOID *)UefiMemoryBase,
- FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)
- );
- // Goto primary Main.
- PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);
- } else {
- SecondaryMain (MpId);
- }
- // DXE Core should always load and never return
- ASSERT (FALSE);
- }
|