IdeMode.h 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198
  1. /** @file
  2. Header file for IDE mode of ATA host controller.
  3. Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #ifndef __ATA_HC_IDE_MODE_H__
  7. #define __ATA_HC_IDE_MODE_H__
  8. typedef enum {
  9. EfiIdePrimary = 0,
  10. EfiIdeSecondary = 1,
  11. EfiIdeMaxChannel = 2
  12. } EFI_IDE_CHANNEL;
  13. typedef enum {
  14. EfiIdeMaster = 0,
  15. EfiIdeSlave = 1,
  16. EfiIdeMaxDevice = 2
  17. } EFI_IDE_DEVICE;
  18. ///
  19. /// PIO mode definition
  20. ///
  21. typedef enum {
  22. EfiAtaPioModeBelow2,
  23. EfiAtaPioMode2,
  24. EfiAtaPioMode3,
  25. EfiAtaPioMode4
  26. } EFI_ATA_PIO_MODE;
  27. //
  28. // Multi word DMA definition
  29. //
  30. typedef enum {
  31. EfiAtaMdmaMode0,
  32. EfiAtaMdmaMode1,
  33. EfiAtaMdmaMode2
  34. } EFI_ATA_MDMA_MODE;
  35. //
  36. // UDMA mode definition
  37. //
  38. typedef enum {
  39. EfiAtaUdmaMode0,
  40. EfiAtaUdmaMode1,
  41. EfiAtaUdmaMode2,
  42. EfiAtaUdmaMode3,
  43. EfiAtaUdmaMode4,
  44. EfiAtaUdmaMode5
  45. } EFI_ATA_UDMA_MODE;
  46. //
  47. // Bus Master Reg
  48. //
  49. #define BMIC_NREAD BIT3
  50. #define BMIC_START BIT0
  51. #define BMIS_INTERRUPT BIT2
  52. #define BMIS_ERROR BIT1
  53. #define BMIC_OFFSET 0x00
  54. #define BMIS_OFFSET 0x02
  55. #define BMID_OFFSET 0x04
  56. //
  57. // IDE transfer mode
  58. //
  59. #define EFI_ATA_MODE_DEFAULT_PIO 0x00
  60. #define EFI_ATA_MODE_FLOW_PIO 0x01
  61. #define EFI_ATA_MODE_MDMA 0x04
  62. #define EFI_ATA_MODE_UDMA 0x08
  63. typedef struct {
  64. UINT32 RegionBaseAddr;
  65. UINT16 ByteCount;
  66. UINT16 EndOfTable;
  67. } EFI_ATA_DMA_PRD;
  68. typedef struct {
  69. UINT8 ModeNumber : 3;
  70. UINT8 ModeCategory : 5;
  71. } EFI_ATA_TRANSFER_MODE;
  72. typedef struct {
  73. UINT8 Sector;
  74. UINT8 Heads;
  75. UINT8 MultipleSector;
  76. } EFI_ATA_DRIVE_PARMS;
  77. //
  78. // IDE registers set
  79. //
  80. typedef struct {
  81. UINT16 Data;
  82. UINT16 ErrOrFeature;
  83. UINT16 SectorCount;
  84. UINT16 SectorNumber;
  85. UINT16 CylinderLsb;
  86. UINT16 CylinderMsb;
  87. UINT16 Head;
  88. UINT16 CmdOrStatus;
  89. UINT16 AltOrDev;
  90. UINT16 BusMasterBaseAddr;
  91. } EFI_IDE_REGISTERS;
  92. //
  93. // Bit definitions in Programming Interface byte of the Class Code field
  94. // in PCI IDE controller's Configuration Space
  95. //
  96. #define IDE_PRIMARY_OPERATING_MODE BIT0
  97. #define IDE_PRIMARY_PROGRAMMABLE_INDICATOR BIT1
  98. #define IDE_SECONDARY_OPERATING_MODE BIT2
  99. #define IDE_SECONDARY_PROGRAMMABLE_INDICATOR BIT3
  100. /**
  101. Get IDE i/o port registers' base addresses by mode.
  102. In 'Compatibility' mode, use fixed addresses.
  103. In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's
  104. Configuration Space.
  105. The steps to get IDE i/o port registers' base addresses for each channel
  106. as follows:
  107. 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE
  108. controller's Configuration Space to determine the operating mode.
  109. 2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below.
  110. ___________________________________________
  111. | | Command Block | Control Block |
  112. | Channel | Registers | Registers |
  113. |___________|_______________|_______________|
  114. | Primary | 1F0h - 1F7h | 3F6h - 3F7h |
  115. |___________|_______________|_______________|
  116. | Secondary | 170h - 177h | 376h - 377h |
  117. |___________|_______________|_______________|
  118. Table 1. Compatibility resource mappings
  119. b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs
  120. in IDE controller's PCI Configuration Space, shown in the Table 2 below.
  121. ___________________________________________________
  122. | | Command Block | Control Block |
  123. | Channel | Registers | Registers |
  124. |___________|___________________|___________________|
  125. | Primary | BAR at offset 0x10| BAR at offset 0x14|
  126. |___________|___________________|___________________|
  127. | Secondary | BAR at offset 0x18| BAR at offset 0x1C|
  128. |___________|___________________|___________________|
  129. Table 2. BARs for Register Mapping
  130. @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
  131. @param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
  132. store the IDE i/o port registers' base addresses
  133. @retval EFI_UNSUPPORTED Return this value when the BARs is not IO type
  134. @retval EFI_SUCCESS Get the Base address successfully
  135. @retval Other Read the pci configureation data error
  136. **/
  137. EFI_STATUS
  138. EFIAPI
  139. GetIdeRegisterIoAddr (
  140. IN EFI_PCI_IO_PROTOCOL *PciIo,
  141. IN OUT EFI_IDE_REGISTERS *IdeRegisters
  142. );
  143. /**
  144. This function is used to send out ATAPI commands conforms to the Packet Command
  145. with PIO Data In Protocol.
  146. @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
  147. @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
  148. store the IDE i/o port registers' base addresses
  149. @param[in] Channel The channel number of device.
  150. @param[in] Device The device number of device.
  151. @param[in] Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET data structure.
  152. @retval EFI_SUCCESS send out the ATAPI packet command successfully
  153. and device sends data successfully.
  154. @retval EFI_DEVICE_ERROR the device failed to send data.
  155. **/
  156. EFI_STATUS
  157. EFIAPI
  158. AtaPacketCommandExecute (
  159. IN EFI_PCI_IO_PROTOCOL *PciIo,
  160. IN EFI_IDE_REGISTERS *IdeRegisters,
  161. IN UINT8 Channel,
  162. IN UINT8 Device,
  163. IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
  164. );
  165. #endif