ArmVirtGicArchLib.c 4.5 KB

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  1. /** @file
  2. ArmGicArchLib library class implementation for DT based virt platforms
  3. Copyright (c) 2015 - 2016, Linaro Ltd. All rights reserved.<BR>
  4. SPDX-License-Identifier: BSD-2-Clause-Patent
  5. **/
  6. #include <Base.h>
  7. #include <Uefi.h>
  8. #include <Library/ArmGicLib.h>
  9. #include <Library/ArmGicArchLib.h>
  10. #include <Library/BaseLib.h>
  11. #include <Library/DebugLib.h>
  12. #include <Library/PcdLib.h>
  13. #include <Library/UefiBootServicesTableLib.h>
  14. #include <Protocol/FdtClient.h>
  15. STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
  16. RETURN_STATUS
  17. EFIAPI
  18. ArmVirtGicArchLibConstructor (
  19. VOID
  20. )
  21. {
  22. UINT32 IccSre;
  23. FDT_CLIENT_PROTOCOL *FdtClient;
  24. CONST UINT64 *Reg;
  25. UINT32 RegSize;
  26. UINTN AddressCells, SizeCells;
  27. UINTN GicRevision;
  28. EFI_STATUS Status;
  29. UINT64 DistBase, CpuBase, RedistBase;
  30. RETURN_STATUS PcdStatus;
  31. Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
  32. (VOID **)&FdtClient);
  33. ASSERT_EFI_ERROR (Status);
  34. GicRevision = 2;
  35. Status = FdtClient->FindCompatibleNodeReg (FdtClient, "arm,cortex-a15-gic",
  36. (CONST VOID **)&Reg, &AddressCells, &SizeCells,
  37. &RegSize);
  38. if (Status == EFI_NOT_FOUND) {
  39. GicRevision = 3;
  40. Status = FdtClient->FindCompatibleNodeReg (FdtClient, "arm,gic-v3",
  41. (CONST VOID **)&Reg, &AddressCells, &SizeCells,
  42. &RegSize);
  43. }
  44. if (EFI_ERROR (Status)) {
  45. return Status;
  46. }
  47. switch (GicRevision) {
  48. case 3:
  49. //
  50. // The GIC v3 DT binding describes a series of at least 3 physical (base
  51. // addresses, size) pairs: the distributor interface (GICD), at least one
  52. // redistributor region (GICR) containing dedicated redistributor
  53. // interfaces for all individual CPUs, and the CPU interface (GICC).
  54. // Under virtualization, we assume that the first redistributor region
  55. // listed covers the boot CPU. Also, our GICv3 driver only supports the
  56. // system register CPU interface, so we can safely ignore the MMIO version
  57. // which is listed after the sequence of redistributor interfaces.
  58. // This means we are only interested in the first two memory regions
  59. // supplied, and ignore everything else.
  60. //
  61. ASSERT (RegSize >= 32);
  62. // RegProp[0..1] == { GICD base, GICD size }
  63. DistBase = SwapBytes64 (Reg[0]);
  64. ASSERT (DistBase < MAX_UINTN);
  65. // RegProp[2..3] == { GICR base, GICR size }
  66. RedistBase = SwapBytes64 (Reg[2]);
  67. ASSERT (RedistBase < MAX_UINTN);
  68. PcdStatus = PcdSet64S (PcdGicDistributorBase, DistBase);
  69. ASSERT_RETURN_ERROR (PcdStatus);
  70. PcdStatus = PcdSet64S (PcdGicRedistributorsBase, RedistBase);
  71. ASSERT_RETURN_ERROR (PcdStatus);
  72. DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n",
  73. DistBase, RedistBase));
  74. //
  75. // The default implementation of ArmGicArchLib is responsible for enabling
  76. // the system register interface on the GICv3 if one is found. So let's do
  77. // the same here.
  78. //
  79. IccSre = ArmGicV3GetControlSystemRegisterEnable ();
  80. if (!(IccSre & ICC_SRE_EL2_SRE)) {
  81. ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
  82. IccSre = ArmGicV3GetControlSystemRegisterEnable ();
  83. }
  84. //
  85. // Unlike the default implementation, there is no fall through to GICv2
  86. // mode if this GICv3 cannot be driven in native mode due to the fact
  87. // that the System Register interface is unavailable.
  88. //
  89. ASSERT (IccSre & ICC_SRE_EL2_SRE);
  90. mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
  91. break;
  92. case 2:
  93. ASSERT (RegSize == 32);
  94. DistBase = SwapBytes64 (Reg[0]);
  95. CpuBase = SwapBytes64 (Reg[2]);
  96. ASSERT (DistBase < MAX_UINTN);
  97. ASSERT (CpuBase < MAX_UINTN);
  98. PcdStatus = PcdSet64S (PcdGicDistributorBase, DistBase);
  99. ASSERT_RETURN_ERROR (PcdStatus);
  100. PcdStatus = PcdSet64S (PcdGicInterruptInterfaceBase, CpuBase);
  101. ASSERT_RETURN_ERROR (PcdStatus);
  102. DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));
  103. mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
  104. break;
  105. default:
  106. DEBUG ((EFI_D_ERROR, "%a: No GIC revision specified!\n", __FUNCTION__));
  107. return RETURN_NOT_FOUND;
  108. }
  109. return RETURN_SUCCESS;
  110. }
  111. ARM_GIC_ARCH_REVISION
  112. EFIAPI
  113. ArmGicGetSupportedArchRevision (
  114. VOID
  115. )
  116. {
  117. return mGicArchRevision;
  118. }