Isp1761UsbDxe.h 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116
  1. /** @file
  2. Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. **/
  5. #ifndef __ISP1761_USB_DXE_H__
  6. #define __ISP1761_USB_DXE_H__
  7. #define ISP1761_USB_BASE FixedPcdGet32 (PcdIsp1761BaseAddress)
  8. #define READ_REG32(Offset) MmioRead32 (ISP1761_USB_BASE + Offset)
  9. #define READ_REG16(Offset) (UINT16) READ_REG32 (Offset)
  10. #define WRITE_REG32(Offset, Val) MmioWrite32 (ISP1761_USB_BASE + Offset, Val)
  11. #define WRITE_REG16(Offset, Val) MmioWrite32 (ISP1761_USB_BASE + Offset, (UINT32) Val)
  12. #define WRITE_REG8(Offset, Val) MmioWrite32 (ISP1761_USB_BASE + Offset, (UINT32) Val)
  13. // Max packet size in bytes (For Full Speed USB 64 is the only valid value)
  14. #define MAX_PACKET_SIZE_CONTROL 64
  15. #define MAX_PACKET_SIZE_BULK 512
  16. // 8 Endpoints, in and out. Don't count the Endpoint 0 setup buffer
  17. #define ISP1761_NUM_ENDPOINTS 16
  18. // Endpoint Indexes
  19. #define ISP1761_EP0SETUP 0x20
  20. #define ISP1761_EP0RX 0x00
  21. #define ISP1761_EP0TX 0x01
  22. #define ISP1761_EP1RX 0x02
  23. #define ISP1761_EP1TX 0x03
  24. // DcInterrupt bits
  25. #define ISP1761_DC_INTERRUPT_BRESET BIT0
  26. #define ISP1761_DC_INTERRUPT_SOF BIT1
  27. #define ISP1761_DC_INTERRUPT_PSOF BIT2
  28. #define ISP1761_DC_INTERRUPT_SUSP BIT3
  29. #define ISP1761_DC_INTERRUPT_RESUME BIT4
  30. #define ISP1761_DC_INTERRUPT_HS_STAT BIT5
  31. #define ISP1761_DC_INTERRUPT_DMA BIT6
  32. #define ISP1761_DC_INTERRUPT_VBUS BIT7
  33. #define ISP1761_DC_INTERRUPT_EP0SETUP BIT8
  34. #define ISP1761_DC_INTERRUPT_EP0RX BIT10
  35. #define ISP1761_DC_INTERRUPT_EP0TX BIT11
  36. #define ISP1761_DC_INTERRUPT_EP1RX BIT12
  37. #define ISP1761_DC_INTERRUPT_EP1TX BIT13
  38. // All valid peripheral controller interrupts
  39. #define ISP1761_DC_INTERRUPT_MASK 0x003FFFDFF
  40. #define ISP1761_ADDRESS 0x200
  41. #define ISP1761_ADDRESS_DEVEN BIT7
  42. #define ISP1761_MODE 0x20C
  43. #define ISP1761_MODE_DATA_BUS_WIDTH BIT8
  44. #define ISP1761_MODE_CLKAON BIT7
  45. #define ISP1761_MODE_SFRESET BIT4
  46. #define ISP1761_MODE_WKUPCS BIT2
  47. #define ISP1761_ENDPOINT_MAX_PACKET_SIZE 0x204
  48. #define ISP1761_ENDPOINT_TYPE 0x208
  49. #define ISP1761_ENDPOINT_TYPE_NOEMPKT BIT4
  50. #define ISP1761_ENDPOINT_TYPE_ENABLE BIT3
  51. #define ISP1761_INTERRUPT_CONFIG 0x210
  52. // Interrupt config value to only interrupt on ACK of IN and OUT tokens
  53. #define ISP1761_INTERRUPT_CONFIG_ACK_ONLY BIT2 | BIT5 | BIT6
  54. #define ISP1761_DC_INTERRUPT 0x218
  55. #define ISP1761_DC_INTERRUPT_ENABLE 0x214
  56. #define ISP1761_CTRL_FUNCTION 0x228
  57. #define ISP1761_CTRL_FUNCTION_VENDP BIT3
  58. #define ISP1761_CTRL_FUNCTION_DSEN BIT2
  59. #define ISP1761_CTRL_FUNCTION_STATUS BIT1
  60. #define ISP1761_DEVICE_UNLOCK 0x27C
  61. #define ISP1761_DEVICE_UNLOCK_MAGIC 0xAA37
  62. #define ISP1761_SW_RESET_REG 0x30C
  63. #define ISP1761_SW_RESET_ALL BIT0
  64. #define ISP1761_DEVICE_ID 0x370
  65. #define ISP1761_OTG_CTRL_SET 0x374
  66. #define ISP1761_OTG_CTRL_CLR OTG_CTRL_SET + 2
  67. #define ISP1761_OTG_CTRL_OTG_DISABLE BIT10
  68. #define ISP1761_OTG_CTRL_VBUS_CHRG BIT6
  69. #define ISP1761_OTG_CTRL_VBUS_DISCHRG BIT5
  70. #define ISP1761_OTG_CTRL_DM_PULLDOWN BIT2
  71. #define ISP1761_OTG_CTRL_DP_PULLDOWN BIT1
  72. #define ISP1761_OTG_CTRL_DP_PULLUP BIT0
  73. #define ISP1761_OTG_STATUS 0x378
  74. #define ISP1761_OTG_STATUS_B_SESS_END BIT7
  75. #define ISP1761_OTG_STATUS_A_B_SESS_VLD BIT1
  76. #define ISP1761_OTG_INTERRUPT_LATCH_SET 0x37C
  77. #define ISP1761_OTG_INTERRUPT_LATCH_CLR 0x37E
  78. #define ISP1761_OTG_INTERRUPT_ENABLE_RISE 0x384
  79. #define ISP1761_DMA_ENDPOINT_INDEX 0x258
  80. #define ISP1761_ENDPOINT_INDEX 0x22c
  81. #define ISP1761_DATA_PORT 0x220
  82. #define ISP1761_BUFFER_LENGTH 0x21c
  83. // Device ID Values
  84. #define PHILLIPS_VENDOR_ID_VAL 0x04cc
  85. #define ISP1761_PRODUCT_ID_VAL 0x1761
  86. #define ISP1761_DEVICE_ID_VAL ((ISP1761_PRODUCT_ID_VAL << 16) |\
  87. PHILLIPS_VENDOR_ID_VAL)
  88. #endif //ifndef __ISP1761_USB_DXE_H__