PciHostBridgeLib.c 6.9 KB

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  1. /** @file
  2. Library instance of PciHostBridgeLib library class for coreboot.
  3. Copyright (C) 2016, Red Hat, Inc.
  4. Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
  5. This program and the accompanying materials are licensed and made available
  6. under the terms and conditions of the BSD License which accompanies this
  7. distribution. The full text of the license may be found at
  8. http://opensource.org/licenses/bsd-license.php.
  9. THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
  10. WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11. **/
  12. #include <PiDxe.h>
  13. #include <IndustryStandard/Pci.h>
  14. #include <Protocol/PciHostBridgeResourceAllocation.h>
  15. #include <Protocol/PciRootBridgeIo.h>
  16. #include <Library/BaseMemoryLib.h>
  17. #include <Library/DebugLib.h>
  18. #include <Library/DevicePathLib.h>
  19. #include <Library/MemoryAllocationLib.h>
  20. #include <Library/PciHostBridgeLib.h>
  21. #include <Library/PciLib.h>
  22. #include "PciHostBridge.h"
  23. STATIC
  24. CONST
  25. CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
  26. {
  27. {
  28. ACPI_DEVICE_PATH,
  29. ACPI_DP,
  30. {
  31. (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
  32. (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
  33. }
  34. },
  35. EISA_PNP_ID(0x0A03), // HID
  36. 0 // UID
  37. },
  38. {
  39. END_DEVICE_PATH_TYPE,
  40. END_ENTIRE_DEVICE_PATH_SUBTYPE,
  41. {
  42. END_DEVICE_PATH_LENGTH,
  43. 0
  44. }
  45. }
  46. };
  47. /**
  48. Initialize a PCI_ROOT_BRIDGE structure.
  49. @param[in] Supports Supported attributes.
  50. @param[in] Attributes Initial attributes.
  51. @param[in] AllocAttributes Allocation attributes.
  52. @param[in] RootBusNumber The bus number to store in RootBus.
  53. @param[in] MaxSubBusNumber The inclusive maximum bus number that can be
  54. assigned to any subordinate bus found behind any
  55. PCI bridge hanging off this root bus.
  56. The caller is responsible for ensuring that
  57. RootBusNumber <= MaxSubBusNumber. If
  58. RootBusNumber equals MaxSubBusNumber, then the
  59. root bus has no room for subordinate buses.
  60. @param[in] Io IO aperture.
  61. @param[in] Mem MMIO aperture.
  62. @param[in] MemAbove4G MMIO aperture above 4G.
  63. @param[in] PMem Prefetchable MMIO aperture.
  64. @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
  65. @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the
  66. caller) that should be filled in by this
  67. function.
  68. @retval EFI_SUCCESS Initialization successful. A device path
  69. consisting of an ACPI device path node, with
  70. UID = RootBusNumber, has been allocated and
  71. linked into RootBus.
  72. @retval EFI_OUT_OF_RESOURCES Memory allocation failed.
  73. **/
  74. EFI_STATUS
  75. InitRootBridge (
  76. IN UINT64 Supports,
  77. IN UINT64 Attributes,
  78. IN UINT64 AllocAttributes,
  79. IN UINT8 RootBusNumber,
  80. IN UINT8 MaxSubBusNumber,
  81. IN PCI_ROOT_BRIDGE_APERTURE *Io,
  82. IN PCI_ROOT_BRIDGE_APERTURE *Mem,
  83. IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
  84. IN PCI_ROOT_BRIDGE_APERTURE *PMem,
  85. IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
  86. OUT PCI_ROOT_BRIDGE *RootBus
  87. )
  88. {
  89. CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
  90. //
  91. // Be safe if other fields are added to PCI_ROOT_BRIDGE later.
  92. //
  93. ZeroMem (RootBus, sizeof *RootBus);
  94. RootBus->Segment = 0;
  95. RootBus->Supports = Supports;
  96. RootBus->Attributes = Attributes;
  97. RootBus->DmaAbove4G = FALSE;
  98. RootBus->AllocationAttributes = AllocAttributes;
  99. RootBus->Bus.Base = RootBusNumber;
  100. RootBus->Bus.Limit = MaxSubBusNumber;
  101. CopyMem (&RootBus->Io, Io, sizeof (*Io));
  102. CopyMem (&RootBus->Mem, Mem, sizeof (*Mem));
  103. CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));
  104. CopyMem (&RootBus->PMem, PMem, sizeof (*PMem));
  105. CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G));
  106. RootBus->NoExtendedConfigSpace = FALSE;
  107. DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
  108. &mRootBridgeDevicePathTemplate);
  109. if (DevicePath == NULL) {
  110. DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
  111. return EFI_OUT_OF_RESOURCES;
  112. }
  113. DevicePath->AcpiDevicePath.UID = RootBusNumber;
  114. RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
  115. DEBUG ((EFI_D_INFO,
  116. "%a: populated root bus %d, with room for %d subordinate bus(es)\n",
  117. __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));
  118. return EFI_SUCCESS;
  119. }
  120. /**
  121. Return all the root bridge instances in an array.
  122. @param Count Return the count of root bridge instances.
  123. @return All the root bridge instances in an array.
  124. The array should be passed into PciHostBridgeFreeRootBridges()
  125. when it's not used.
  126. **/
  127. PCI_ROOT_BRIDGE *
  128. EFIAPI
  129. PciHostBridgeGetRootBridges (
  130. UINTN *Count
  131. )
  132. {
  133. return ScanForRootBridges (Count);
  134. }
  135. /**
  136. Free the root bridge instances array returned from
  137. PciHostBridgeGetRootBridges().
  138. @param The root bridge instances array.
  139. @param The count of the array.
  140. **/
  141. VOID
  142. EFIAPI
  143. PciHostBridgeFreeRootBridges (
  144. PCI_ROOT_BRIDGE *Bridges,
  145. UINTN Count
  146. )
  147. {
  148. if (Bridges == NULL && Count == 0) {
  149. return;
  150. }
  151. ASSERT (Bridges != NULL && Count > 0);
  152. do {
  153. --Count;
  154. FreePool (Bridges[Count].DevicePath);
  155. } while (Count > 0);
  156. FreePool (Bridges);
  157. }
  158. /**
  159. Inform the platform that the resource conflict happens.
  160. @param HostBridgeHandle Handle of the Host Bridge.
  161. @param Configuration Pointer to PCI I/O and PCI memory resource
  162. descriptors. The Configuration contains the resources
  163. for all the root bridges. The resource for each root
  164. bridge is terminated with END descriptor and an
  165. additional END is appended indicating the end of the
  166. entire resources. The resource descriptor field
  167. values follow the description in
  168. EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
  169. .SubmitResources().
  170. **/
  171. VOID
  172. EFIAPI
  173. PciHostBridgeResourceConflict (
  174. EFI_HANDLE HostBridgeHandle,
  175. VOID *Configuration
  176. )
  177. {
  178. //
  179. // coreboot UEFI Payload does not do PCI enumeration and should not call this
  180. // library interface.
  181. //
  182. ASSERT (FALSE);
  183. }